MdeModulePkg/PciHostBridgeDxe: Honor ResourceAssigned
Change PciHostBridgeDxe driver to not install the PciHostBridgeResourceAllocation protocol and let PciRootBridgeIo.Configuration() return the correct PCI resource assignment information when the ResourceAssigned is TRUE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
This commit is contained in:
@@ -338,6 +338,8 @@ InitializePciHostBridge (
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UINTN Index;
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PCI_ROOT_BRIDGE_APERTURE *MemApertures[4];
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UINTN MemApertureIndex;
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BOOLEAN ResourceAssigned;
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LIST_ENTRY *Link;
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RootBridges = PciHostBridgeGetRootBridges (&RootBridgeCount);
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if ((RootBridges == NULL) || (RootBridgeCount == 0)) {
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@@ -358,27 +360,7 @@ InitializePciHostBridge (
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HostBridge->Signature = PCI_HOST_BRIDGE_SIGNATURE;
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HostBridge->CanRestarted = TRUE;
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InitializeListHead (&HostBridge->RootBridges);
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HostBridge->ResAlloc.NotifyPhase = NotifyPhase;
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HostBridge->ResAlloc.GetNextRootBridge = GetNextRootBridge;
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HostBridge->ResAlloc.GetAllocAttributes = GetAttributes;
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HostBridge->ResAlloc.StartBusEnumeration = StartBusEnumeration;
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HostBridge->ResAlloc.SetBusNumbers = SetBusNumbers;
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HostBridge->ResAlloc.SubmitResources = SubmitResources;
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HostBridge->ResAlloc.GetProposedResources = GetProposedResources;
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HostBridge->ResAlloc.PreprocessController = PreprocessController;
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Status = gBS->InstallMultipleProtocolInterfaces (
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&HostBridge->Handle,
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&gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
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NULL
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);
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR (Status)) {
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FreePool (HostBridge);
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PciHostBridgeFreeRootBridges (RootBridges, RootBridgeCount);
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return Status;
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}
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ResourceAssigned = FALSE;
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//
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// Create Root Bridge Device Handle in this Host Bridge
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@@ -387,18 +369,39 @@ InitializePciHostBridge (
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//
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// Create Root Bridge Handle Instance
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//
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RootBridge = CreateRootBridge (&RootBridges[Index], HostBridge->Handle);
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RootBridge = CreateRootBridge (&RootBridges[Index]);
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ASSERT (RootBridge != NULL);
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if (RootBridge == NULL) {
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continue;
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}
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//
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// Make sure all root bridges share the same ResourceAssigned value.
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//
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if (Index == 0) {
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ResourceAssigned = RootBridges[Index].ResourceAssigned;
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} else {
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ASSERT (ResourceAssigned == RootBridges[Index].ResourceAssigned);
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}
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if (RootBridges[Index].Io.Base <= RootBridges[Index].Io.Limit) {
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Status = AddIoSpace (
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RootBridges[Index].Io.Base,
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RootBridges[Index].Io.Limit - RootBridges[Index].Io.Base + 1
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);
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ASSERT_EFI_ERROR (Status);
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if (ResourceAssigned) {
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Status = gDS->AllocateIoSpace (
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EfiGcdAllocateAddress,
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EfiGcdIoTypeIo,
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0,
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RootBridges[Index].Io.Limit - RootBridges[Index].Io.Base + 1,
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&RootBridges[Index].Io.Base,
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gImageHandle,
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NULL
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);
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ASSERT_EFI_ERROR (Status);
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}
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}
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//
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@@ -428,11 +431,55 @@ InitializePciHostBridge (
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_WARN, "PciHostBridge driver failed to set EFI_MEMORY_UC to MMIO aperture - %r.\n", Status));
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}
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if (ResourceAssigned) {
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Status = gDS->AllocateMemorySpace (
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EfiGcdAllocateAddress,
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EfiGcdMemoryTypeMemoryMappedIo,
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0,
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MemApertures[MemApertureIndex]->Limit - MemApertures[MemApertureIndex]->Base + 1,
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&MemApertures[MemApertureIndex]->Base,
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gImageHandle,
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NULL
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);
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ASSERT_EFI_ERROR (Status);
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}
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}
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}
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//
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// Insert Root Bridge Handle Instance
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//
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InsertTailList (&HostBridge->RootBridges, &RootBridge->Link);
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}
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//
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// When resources were assigned, it's not needed to expose
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// PciHostBridgeResourceAllocation protocol.
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//
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if (!ResourceAssigned) {
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HostBridge->ResAlloc.NotifyPhase = NotifyPhase;
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HostBridge->ResAlloc.GetNextRootBridge = GetNextRootBridge;
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HostBridge->ResAlloc.GetAllocAttributes = GetAttributes;
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HostBridge->ResAlloc.StartBusEnumeration = StartBusEnumeration;
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HostBridge->ResAlloc.SetBusNumbers = SetBusNumbers;
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HostBridge->ResAlloc.SubmitResources = SubmitResources;
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HostBridge->ResAlloc.GetProposedResources = GetProposedResources;
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HostBridge->ResAlloc.PreprocessController = PreprocessController;
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Status = gBS->InstallMultipleProtocolInterfaces (
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&HostBridge->Handle,
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&gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
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NULL
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);
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ASSERT_EFI_ERROR (Status);
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}
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for (Link = GetFirstNode (&HostBridge->RootBridges)
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; !IsNull (&HostBridge->RootBridges, Link)
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; Link = GetNextNode (&HostBridge->RootBridges, Link)
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) {
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RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
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RootBridge->RootBridgeIo.ParentHandle = HostBridge->Handle;
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Status = gBS->InstallMultipleProtocolInterfaces (
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&RootBridge->Handle,
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&gEfiDevicePathProtocolGuid, RootBridge->DevicePath,
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@@ -440,7 +487,6 @@ InitializePciHostBridge (
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NULL
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);
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ASSERT_EFI_ERROR (Status);
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InsertTailList (&HostBridge->RootBridges, &RootBridge->Link);
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}
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PciHostBridgeFreeRootBridges (RootBridges, RootBridgeCount);
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return Status;
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