ArmPlatformPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the ArmPlatformPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Andrew Fish <afish@apple.com>
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@@ -10,188 +10,188 @@
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#include <Protocol/GraphicsOutput.h>
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#define LCD_VRAM_SIZE SIZE_8MB
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#define LCD_VRAM_SIZE SIZE_8MB
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// Modes definitions
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#define VGA 0
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#define SVGA 1
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#define XGA 2
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#define SXGA 3
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#define WSXGA 4
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#define UXGA 5
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#define HD 6
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#define WVGA 7
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#define QHD 8
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#define WSVGA 9
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#define HD720 10
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#define WXGA 11
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#define VGA 0
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#define SVGA 1
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#define XGA 2
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#define SXGA 3
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#define WSXGA 4
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#define UXGA 5
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#define HD 6
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#define WVGA 7
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#define QHD 8
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#define WSVGA 9
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#define HD720 10
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#define WXGA 11
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// VGA Mode: 640 x 480
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#define VGA_H_RES_PIXELS 640
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#define VGA_V_RES_PIXELS 480
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#define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */
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#define VGA_H_RES_PIXELS 640
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#define VGA_V_RES_PIXELS 480
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#define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */
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#define VGA_H_SYNC ( 80 - 1)
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#define VGA_H_FRONT_PORCH ( 16 - 1)
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#define VGA_H_BACK_PORCH ( 64 - 1)
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#define VGA_H_SYNC ( 80 - 1)
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#define VGA_H_FRONT_PORCH ( 16 - 1)
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#define VGA_H_BACK_PORCH ( 64 - 1)
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#define VGA_V_SYNC ( 4 - 1)
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#define VGA_V_FRONT_PORCH ( 3 - 1)
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#define VGA_V_BACK_PORCH ( 13 - 1)
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#define VGA_V_SYNC ( 4 - 1)
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#define VGA_V_FRONT_PORCH ( 3 - 1)
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#define VGA_V_BACK_PORCH ( 13 - 1)
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// SVGA Mode: 800 x 600
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#define SVGA_H_RES_PIXELS 800
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#define SVGA_V_RES_PIXELS 600
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#define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */
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#define SVGA_H_RES_PIXELS 800
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#define SVGA_V_RES_PIXELS 600
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#define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */
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#define SVGA_H_SYNC ( 80 - 1)
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#define SVGA_H_FRONT_PORCH ( 32 - 1)
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#define SVGA_H_BACK_PORCH (112 - 1)
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#define SVGA_H_SYNC ( 80 - 1)
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#define SVGA_H_FRONT_PORCH ( 32 - 1)
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#define SVGA_H_BACK_PORCH (112 - 1)
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#define SVGA_V_SYNC ( 4 - 1)
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#define SVGA_V_FRONT_PORCH ( 3 - 1)
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#define SVGA_V_BACK_PORCH ( 17 - 1)
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#define SVGA_V_SYNC ( 4 - 1)
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#define SVGA_V_FRONT_PORCH ( 3 - 1)
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#define SVGA_V_BACK_PORCH ( 17 - 1)
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// XGA Mode: 1024 x 768
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#define XGA_H_RES_PIXELS 1024
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#define XGA_V_RES_PIXELS 768
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#define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */
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#define XGA_H_RES_PIXELS 1024
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#define XGA_V_RES_PIXELS 768
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#define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */
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#define XGA_H_SYNC (104 - 1)
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#define XGA_H_FRONT_PORCH ( 48 - 1)
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#define XGA_H_BACK_PORCH (152 - 1)
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#define XGA_H_SYNC (104 - 1)
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#define XGA_H_FRONT_PORCH ( 48 - 1)
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#define XGA_H_BACK_PORCH (152 - 1)
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#define XGA_V_SYNC ( 4 - 1)
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#define XGA_V_FRONT_PORCH ( 3 - 1)
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#define XGA_V_BACK_PORCH ( 23 - 1)
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#define XGA_V_SYNC ( 4 - 1)
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#define XGA_V_FRONT_PORCH ( 3 - 1)
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#define XGA_V_BACK_PORCH ( 23 - 1)
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// SXGA Mode: 1280 x 1024
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#define SXGA_H_RES_PIXELS 1280
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#define SXGA_V_RES_PIXELS 1024
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#define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */
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#define SXGA_H_RES_PIXELS 1280
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#define SXGA_V_RES_PIXELS 1024
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#define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */
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#define SXGA_H_SYNC (136 - 1)
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#define SXGA_H_FRONT_PORCH ( 80 - 1)
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#define SXGA_H_BACK_PORCH (216 - 1)
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#define SXGA_H_SYNC (136 - 1)
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#define SXGA_H_FRONT_PORCH ( 80 - 1)
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#define SXGA_H_BACK_PORCH (216 - 1)
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#define SXGA_V_SYNC ( 7 - 1)
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#define SXGA_V_FRONT_PORCH ( 3 - 1)
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#define SXGA_V_BACK_PORCH ( 29 - 1)
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#define SXGA_V_SYNC ( 7 - 1)
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#define SXGA_V_FRONT_PORCH ( 3 - 1)
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#define SXGA_V_BACK_PORCH ( 29 - 1)
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// WSXGA+ Mode: 1680 x 1050
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#define WSXGA_H_RES_PIXELS 1680
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#define WSXGA_V_RES_PIXELS 1050
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#define WSXGA_OSC_FREQUENCY 147000000 /* 0x08C30AC0 */
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#define WSXGA_H_RES_PIXELS 1680
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#define WSXGA_V_RES_PIXELS 1050
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#define WSXGA_OSC_FREQUENCY 147000000 /* 0x08C30AC0 */
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#define WSXGA_H_SYNC (170 - 1)
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#define WSXGA_H_FRONT_PORCH (104 - 1)
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#define WSXGA_H_BACK_PORCH (274 - 1)
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#define WSXGA_H_SYNC (170 - 1)
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#define WSXGA_H_FRONT_PORCH (104 - 1)
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#define WSXGA_H_BACK_PORCH (274 - 1)
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#define WSXGA_V_SYNC ( 5 - 1)
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#define WSXGA_V_FRONT_PORCH ( 4 - 1)
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#define WSXGA_V_BACK_PORCH ( 41 - 1)
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#define WSXGA_V_SYNC ( 5 - 1)
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#define WSXGA_V_FRONT_PORCH ( 4 - 1)
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#define WSXGA_V_BACK_PORCH ( 41 - 1)
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// UXGA Mode: 1600 x 1200
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#define UXGA_H_RES_PIXELS 1600
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#define UXGA_V_RES_PIXELS 1200
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#define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */
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#define UXGA_H_RES_PIXELS 1600
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#define UXGA_V_RES_PIXELS 1200
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#define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */
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#define UXGA_H_SYNC (168 - 1)
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#define UXGA_H_FRONT_PORCH (112 - 1)
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#define UXGA_H_BACK_PORCH (280 - 1)
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#define UXGA_H_SYNC (168 - 1)
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#define UXGA_H_FRONT_PORCH (112 - 1)
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#define UXGA_H_BACK_PORCH (280 - 1)
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#define UXGA_V_SYNC ( 4 - 1)
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#define UXGA_V_FRONT_PORCH ( 3 - 1)
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#define UXGA_V_BACK_PORCH ( 38 - 1)
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#define UXGA_V_SYNC ( 4 - 1)
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#define UXGA_V_FRONT_PORCH ( 3 - 1)
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#define UXGA_V_BACK_PORCH ( 38 - 1)
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// HD Mode: 1920 x 1080
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#define HD_H_RES_PIXELS 1920
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#define HD_V_RES_PIXELS 1080
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#define HD_OSC_FREQUENCY 165000000 /* 0x09D5B340 */
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#define HD_H_RES_PIXELS 1920
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#define HD_V_RES_PIXELS 1080
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#define HD_OSC_FREQUENCY 165000000 /* 0x09D5B340 */
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#define HD_H_SYNC ( 79 - 1)
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#define HD_H_FRONT_PORCH (128 - 1)
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#define HD_H_BACK_PORCH (328 - 1)
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#define HD_H_SYNC ( 79 - 1)
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#define HD_H_FRONT_PORCH (128 - 1)
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#define HD_H_BACK_PORCH (328 - 1)
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#define HD_V_SYNC ( 5 - 1)
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#define HD_V_FRONT_PORCH ( 3 - 1)
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#define HD_V_BACK_PORCH ( 32 - 1)
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#define HD_V_SYNC ( 5 - 1)
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#define HD_V_FRONT_PORCH ( 3 - 1)
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#define HD_V_BACK_PORCH ( 32 - 1)
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// WVGA Mode: 800 x 480
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#define WVGA_H_RES_PIXELS 800
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#define WVGA_V_RES_PIXELS 480
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#define WVGA_OSC_FREQUENCY 29500000 /* 0x01C22260 */
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#define WVGA_H_SYNC ( 72 - 1)
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#define WVGA_H_FRONT_PORCH ( 24 - 1)
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#define WVGA_H_BACK_PORCH ( 96 - 1)
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#define WVGA_V_SYNC ( 7 - 1)
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#define WVGA_V_FRONT_PORCH ( 3 - 1)
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#define WVGA_V_BACK_PORCH ( 10 - 1)
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#define WVGA_H_RES_PIXELS 800
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#define WVGA_V_RES_PIXELS 480
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#define WVGA_OSC_FREQUENCY 29500000 /* 0x01C22260 */
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#define WVGA_H_SYNC ( 72 - 1)
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#define WVGA_H_FRONT_PORCH ( 24 - 1)
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#define WVGA_H_BACK_PORCH ( 96 - 1)
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#define WVGA_V_SYNC ( 7 - 1)
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#define WVGA_V_FRONT_PORCH ( 3 - 1)
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#define WVGA_V_BACK_PORCH ( 10 - 1)
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// QHD Mode: 960 x 540
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#define QHD_H_RES_PIXELS 960
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#define QHD_V_RES_PIXELS 540
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#define QHD_OSC_FREQUENCY 40750000 /* 0x026DCBB0 */
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#define QHD_H_SYNC ( 96 - 1)
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#define QHD_H_FRONT_PORCH ( 32 - 1)
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#define QHD_H_BACK_PORCH (128 - 1)
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#define QHD_V_SYNC ( 5 - 1)
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#define QHD_V_FRONT_PORCH ( 3 - 1)
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#define QHD_V_BACK_PORCH ( 14 - 1)
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#define QHD_H_RES_PIXELS 960
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#define QHD_V_RES_PIXELS 540
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#define QHD_OSC_FREQUENCY 40750000 /* 0x026DCBB0 */
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#define QHD_H_SYNC ( 96 - 1)
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#define QHD_H_FRONT_PORCH ( 32 - 1)
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#define QHD_H_BACK_PORCH (128 - 1)
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#define QHD_V_SYNC ( 5 - 1)
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#define QHD_V_FRONT_PORCH ( 3 - 1)
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#define QHD_V_BACK_PORCH ( 14 - 1)
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// WSVGA Mode: 1024 x 600
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#define WSVGA_H_RES_PIXELS 1024
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#define WSVGA_V_RES_PIXELS 600
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#define WSVGA_OSC_FREQUENCY 49000000 /* 0x02EBAE40 */
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#define WSVGA_H_SYNC (104 - 1)
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#define WSVGA_H_FRONT_PORCH ( 40 - 1)
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#define WSVGA_H_BACK_PORCH (144 - 1)
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#define WSVGA_V_SYNC ( 10 - 1)
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#define WSVGA_V_FRONT_PORCH ( 3 - 1)
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#define WSVGA_V_BACK_PORCH ( 11 - 1)
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#define WSVGA_H_RES_PIXELS 1024
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#define WSVGA_V_RES_PIXELS 600
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#define WSVGA_OSC_FREQUENCY 49000000 /* 0x02EBAE40 */
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#define WSVGA_H_SYNC (104 - 1)
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#define WSVGA_H_FRONT_PORCH ( 40 - 1)
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#define WSVGA_H_BACK_PORCH (144 - 1)
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#define WSVGA_V_SYNC ( 10 - 1)
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#define WSVGA_V_FRONT_PORCH ( 3 - 1)
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#define WSVGA_V_BACK_PORCH ( 11 - 1)
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// HD720 Mode: 1280 x 720
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#define HD720_H_RES_PIXELS 1280
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#define HD720_V_RES_PIXELS 720
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#define HD720_OSC_FREQUENCY 74500000 /* 0x0470C7A0 */
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#define HD720_H_SYNC (128 - 1)
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#define HD720_H_FRONT_PORCH ( 64 - 1)
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#define HD720_H_BACK_PORCH (192 - 1)
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#define HD720_V_SYNC ( 5 - 1)
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#define HD720_V_FRONT_PORCH ( 3 - 1)
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#define HD720_V_BACK_PORCH ( 20 - 1)
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#define HD720_H_RES_PIXELS 1280
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#define HD720_V_RES_PIXELS 720
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#define HD720_OSC_FREQUENCY 74500000 /* 0x0470C7A0 */
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#define HD720_H_SYNC (128 - 1)
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#define HD720_H_FRONT_PORCH ( 64 - 1)
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#define HD720_H_BACK_PORCH (192 - 1)
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#define HD720_V_SYNC ( 5 - 1)
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#define HD720_V_FRONT_PORCH ( 3 - 1)
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#define HD720_V_BACK_PORCH ( 20 - 1)
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// WXGA Mode: 1280 x 800
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#define WXGA_H_RES_PIXELS 1280
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#define WXGA_V_RES_PIXELS 800
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#define WXGA_OSC_FREQUENCY 83500000 /* 0x04FA1BE0 */
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#define WXGA_H_SYNC (128 - 1)
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#define WXGA_H_FRONT_PORCH ( 72 - 1)
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#define WXGA_H_BACK_PORCH (200 - 1)
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#define WXGA_V_SYNC ( 6 - 1)
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#define WXGA_V_FRONT_PORCH ( 3 - 1)
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#define WXGA_V_BACK_PORCH ( 22 - 1)
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#define WXGA_H_RES_PIXELS 1280
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#define WXGA_V_RES_PIXELS 800
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#define WXGA_OSC_FREQUENCY 83500000 /* 0x04FA1BE0 */
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#define WXGA_H_SYNC (128 - 1)
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#define WXGA_H_FRONT_PORCH ( 72 - 1)
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#define WXGA_H_BACK_PORCH (200 - 1)
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#define WXGA_V_SYNC ( 6 - 1)
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#define WXGA_V_FRONT_PORCH ( 3 - 1)
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#define WXGA_V_BACK_PORCH ( 22 - 1)
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// Colour Masks
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#define LCD_24BPP_RED_MASK 0x00FF0000
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#define LCD_24BPP_GREEN_MASK 0x0000FF00
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#define LCD_24BPP_BLUE_MASK 0x000000FF
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#define LCD_24BPP_RESERVED_MASK 0xFF000000
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#define LCD_24BPP_RED_MASK 0x00FF0000
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#define LCD_24BPP_GREEN_MASK 0x0000FF00
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#define LCD_24BPP_BLUE_MASK 0x000000FF
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#define LCD_24BPP_RESERVED_MASK 0xFF000000
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#define LCD_16BPP_555_RED_MASK 0x00007C00
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#define LCD_16BPP_555_GREEN_MASK 0x000003E0
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#define LCD_16BPP_555_BLUE_MASK 0x0000001F
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#define LCD_16BPP_555_RESERVED_MASK 0x00000000
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#define LCD_16BPP_555_RED_MASK 0x00007C00
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#define LCD_16BPP_555_GREEN_MASK 0x000003E0
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#define LCD_16BPP_555_BLUE_MASK 0x0000001F
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#define LCD_16BPP_555_RESERVED_MASK 0x00000000
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#define LCD_16BPP_565_RED_MASK 0x0000F800
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#define LCD_16BPP_565_GREEN_MASK 0x000007E0
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#define LCD_16BPP_565_BLUE_MASK 0x0000001F
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#define LCD_16BPP_565_RESERVED_MASK 0x00008000
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#define LCD_16BPP_565_RED_MASK 0x0000F800
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#define LCD_16BPP_565_GREEN_MASK 0x000007E0
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#define LCD_16BPP_565_BLUE_MASK 0x0000001F
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#define LCD_16BPP_565_RESERVED_MASK 0x00008000
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#define LCD_12BPP_444_RED_MASK 0x00000F00
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#define LCD_12BPP_444_GREEN_MASK 0x000000F0
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#define LCD_12BPP_444_BLUE_MASK 0x0000000F
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#define LCD_12BPP_444_RESERVED_MASK 0x0000F000
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#define LCD_12BPP_444_RED_MASK 0x00000F00
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#define LCD_12BPP_444_GREEN_MASK 0x000000F0
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#define LCD_12BPP_444_BLUE_MASK 0x0000000F
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#define LCD_12BPP_444_RESERVED_MASK 0x0000F000
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/** The enumeration maps the PL111 LcdBpp values used in the LCD Control
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Register
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@@ -210,10 +210,10 @@ typedef enum {
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// Display timing settings.
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typedef struct {
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UINT32 Resolution;
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UINT32 Sync;
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UINT32 BackPorch;
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UINT32 FrontPorch;
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UINT32 Resolution;
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UINT32 Sync;
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UINT32 BackPorch;
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UINT32 FrontPorch;
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} SCAN_TIMINGS;
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/** Platform related initialization function.
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@@ -225,7 +225,7 @@ typedef struct {
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**/
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EFI_STATUS
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LcdPlatformInitializeDisplay (
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IN EFI_HANDLE Handle
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IN EFI_HANDLE Handle
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);
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/** Allocate VRAM memory in DRAM for the framebuffer
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@@ -242,8 +242,8 @@ LcdPlatformInitializeDisplay (
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**/
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EFI_STATUS
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LcdPlatformGetVram (
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OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
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OUT UINTN* VramSize
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OUT EFI_PHYSICAL_ADDRESS *VramBaseAddress,
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OUT UINTN *VramSize
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);
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/** Return total number of modes supported.
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@@ -268,7 +268,7 @@ LcdPlatformGetMaxMode (
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**/
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EFI_STATUS
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LcdPlatformSetMode (
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IN UINT32 ModeNumber
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IN UINT32 ModeNumber
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);
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/** Return information for the requested mode number.
|
||||
@@ -303,9 +303,9 @@ LcdPlatformQueryMode (
|
||||
**/
|
||||
EFI_STATUS
|
||||
LcdPlatformGetTimings (
|
||||
IN UINT32 ModeNumber,
|
||||
OUT SCAN_TIMINGS **Horizontal,
|
||||
OUT SCAN_TIMINGS **Vertical
|
||||
IN UINT32 ModeNumber,
|
||||
OUT SCAN_TIMINGS **Horizontal,
|
||||
OUT SCAN_TIMINGS **Vertical
|
||||
);
|
||||
|
||||
/** Return bits per pixel information for a mode number.
|
||||
@@ -320,8 +320,8 @@ LcdPlatformGetTimings (
|
||||
**/
|
||||
EFI_STATUS
|
||||
LcdPlatformGetBpp (
|
||||
IN UINT32 ModeNumber,
|
||||
OUT LCD_BPP* Bpp
|
||||
IN UINT32 ModeNumber,
|
||||
OUT LCD_BPP *Bpp
|
||||
);
|
||||
|
||||
#endif /* LCD_PLATFORM_LIB_H_ */
|
||||
|
Reference in New Issue
Block a user