Sync EDKII BaseTools to BaseTools project r1971

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10502 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
lgao4
2010-05-18 05:04:32 +00:00
parent 3dc8585e0a
commit 40d841f6a8
417 changed files with 3829 additions and 2563 deletions

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@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'BootSectImage' module build.
#
# Copyright (c) 2009 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'BootSectImage' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -4,8 +4,8 @@ Abstract:
Patch the BPB information in boot sector image file.
Patch the MBR code in MBR image file.
Copyright 2006 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -2,8 +2,8 @@
Fat file system structure and definition.
Copyright 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

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@@ -2,8 +2,8 @@
MBR Partition Entry and Table structure defintions.
Copyright 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

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@@ -2,8 +2,8 @@
Functions to get info and load PE/COFF image.
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
@@ -71,6 +71,14 @@ PeCoffLoaderRelocateIpfImage (
IN UINT64 Adjust
);
RETURN_STATUS
PeCoffLoaderRelocateArmImage (
IN UINT16 **Reloc,
IN OUT CHAR8 *Fixup,
IN OUT CHAR8 **FixupData,
IN UINT64 Adjust
);
STATIC
RETURN_STATUS
PeCoffLoaderGetPeHeader (
@@ -777,9 +785,11 @@ Returns:
default:
switch (MachineType) {
case EFI_IMAGE_MACHINE_IA32:
case EFI_IMAGE_MACHINE_ARMT:
Status = PeCoffLoaderRelocateIa32Image (Reloc, Fixup, &FixupData, Adjust);
break;
case EFI_IMAGE_MACHINE_ARMT:
Status = PeCoffLoaderRelocateArmImage (&Reloc, Fixup, &FixupData, Adjust);
break;
case EFI_IMAGE_MACHINE_X64:
Status = PeCoffLoaderRelocateX64Image (Reloc, Fixup, &FixupData, Adjust);
break;

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@@ -1,7 +1,7 @@
/** @file
Copyright (c) 1999 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 1999 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

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@@ -1,7 +1,7 @@
/** @file
Copyright (c) 1999 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 1999 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

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@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 1999 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 1999 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 1999 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 1999 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

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@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'Common' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'Common' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2007 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2007 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2007 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2007 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

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@@ -1,8 +1,8 @@
/** @file
Function prototypes and defines on Memory Only PE COFF loader
Copyright (c) 2006, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
@@ -144,4 +144,38 @@ PeCoffLoaderGetEntryPoint (
)
;
//
// These functions are used by the ARM PE/COFF relocation code and by
// the ELF to PE/COFF converter so that is why they are public
//
/**
Pass in a pointer to an ARM MOVT or MOVW immediate instruciton and
return the immediate data encoded in the instruction
@param Instruction Pointer to ARM MOVT or MOVW immediate instruction
@return Immediate address encoded in the instruction
**/
UINT16
ThumbMovtImmediateAddress (
IN UINT16 *Instruction
);
/**
Update an ARM MOVT or MOVW immediate instruction immediate data.
@param Instruction Pointer to ARM MOVT or MOVW immediate instruction
@param Address New addres to patch into the instruction
**/
VOID
ThumbMovtImmediatePatch (
IN OUT UINT16 *Instruction,
IN UINT16 Address
);
#endif

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@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
@@ -315,3 +315,121 @@ PeCoffLoaderRelocateX64Image (
return RETURN_SUCCESS;
}
/**
Pass in a pointer to an ARM MOVT or MOVW immediate instruciton and
return the immediate data encoded in the instruction
@param Instruction Pointer to ARM MOVT or MOVW immediate instruction
@return Immediate address encoded in the instruction
**/
UINT16
ThumbMovtImmediateAddress (
IN UINT16 *Instruction
)
{
UINT32 Movt;
UINT16 Address;
// Thumb2 is two 16-bit instructions working together. Not a single 32-bit instruction
// Example MOVT R0, #0 is 0x0000f2c0 or 0xf2c0 0x0000
Movt = (*Instruction << 16) | (*(Instruction + 1));
// imm16 = imm4:i:imm3:imm8
// imm4 -> Bit19:Bit16
// i -> Bit26
// imm3 -> Bit14:Bit12
// imm8 -> Bit7:Bit0
Address = (UINT16)(Movt & 0x000000ff); // imm8
Address |= (UINT16)((Movt >> 4) & 0x0000f700); // imm4 imm3
Address |= (((Movt & BIT26) != 0) ? BIT11 : 0); // i
return Address;
}
/**
Update an ARM MOVT or MOVW immediate instruction immediate data.
@param Instruction Pointer to ARM MOVT or MOVW immediate instruction
@param Address New addres to patch into the instruction
**/
VOID
ThumbMovtImmediatePatch (
IN OUT UINT16 *Instruction,
IN UINT16 Address
)
{
UINT16 Patch;
// First 16-bit chunk of instruciton
Patch = ((Address >> 12) & 0x000f); // imm4
Patch |= (((Address & BIT11) != 0) ? BIT10 : 0); // i
*Instruction = (*Instruction & ~0x040f) | Patch;
// Second 16-bit chunk of instruction
Patch = Address & 0x000000ff; // imm8
Patch |= ((Address << 4) & 0x00007000); // imm3
Instruction++;
*Instruction = (*Instruction & ~0x70ff) | Patch;
}
/**
Performs an ARM-based specific relocation fixup and is a no-op on other
instruction sets.
@param Reloc Pointer to the relocation record.
@param Fixup Pointer to the address to fix up.
@param FixupData Pointer to a buffer to log the fixups.
@param Adjust The offset to adjust the fixup.
@return Status code.
**/
RETURN_STATUS
PeCoffLoaderRelocateArmImage (
IN UINT16 **Reloc,
IN OUT CHAR8 *Fixup,
IN OUT CHAR8 **FixupData,
IN UINT64 Adjust
)
{
UINT16 *Fixup16;
UINT16 FixupVal;
UINT16 *Addend;
Fixup16 = (UINT16 *) Fixup;
switch ((**Reloc) >> 12) {
case EFI_IMAGE_REL_BASED_ARM_THUMB_MOVW:
FixupVal = ThumbMovtImmediateAddress (Fixup16) + (UINT16)Adjust;
ThumbMovtImmediatePatch (Fixup16, FixupVal);
if (*FixupData != NULL) {
*FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT16));
*(UINT16 *)*FixupData = *Fixup16;
*FixupData = *FixupData + sizeof (UINT16);
}
break;
case EFI_IMAGE_REL_BASED_ARM_THUMB_MOVT:
// For MOVT you need to know the lower 16-bits do do the math
// So this relocation entry is really two entries.
*Reloc = *Reloc + 1;
Addend = *Reloc;
FixupVal = (UINT16)(((ThumbMovtImmediateAddress (Fixup16) << 16) + Adjust + *Addend) >> 16);
ThumbMovtImmediatePatch (Fixup16, FixupVal);
if (*FixupData != NULL) {
*FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT16));
*(UINT16 *)*FixupData = *Fixup16;
*FixupData = *FixupData + sizeof (UINT16);
}
break;
default:
return RETURN_UNSUPPORTED;
}
return RETURN_SUCCESS;
}

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@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2007 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/**
Copyright (c) 2007 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright 2006 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

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@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'EfiLdrImage' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'EfiLdrImage' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 1999-2010 Intel Corporation. All rights reserved
Copyright (c) 1999 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 1999-2008 Intel Corporation. All rights reserved
Copyright (c) 1999 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'EfiRom' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'EfiRom' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,9 +1,9 @@
## @file
# GNU Make makefile for C tools build.
#
# Copyright (c) 2007 - 2010, Intel Corporation
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
#
# All rights reserved. This program and the accompanying materials
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -2,8 +2,8 @@
Fat file system structure and definition.
Copyright 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright 2006 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -2,8 +2,8 @@
Get Drv Num offset from Fat file system.
Copyright 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenBootSector' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenCrc32' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2007 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenCrc32' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenFfs' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/**
Copyright (c) 2004-2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenFfs' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenFv' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2007 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
@@ -809,6 +809,10 @@ Returns:
}
if (FfsFile->Type != EFI_FV_FILETYPE_SECURITY_CORE && pImageContext->Machine == EFI_IMAGE_MACHINE_IA64) {
//
// Process IPF PLABEL to get the real address after the image has been rebased.
// PLABEL structure is got by AddressOfEntryPoint offset to ImageBuffer stored in pImageContext->Handle.
//
fprintf (FvMapFile, "EntryPoint=0x%010llx", (unsigned long long) (*(UINT64 *)((UINTN) pImageContext->Handle + (UINTN) AddressOfEntryPoint)));
} else {
fprintf (FvMapFile, "EntryPoint=0x%010llx", (unsigned long long) (ImageBaseAddress + AddressOfEntryPoint));

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenFv' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -0,0 +1,964 @@
/** @file
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "WinNtInclude.h"
#ifndef __GNUC__
#include <windows.h>
#include <io.h>
#endif
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <ctype.h>
#include <Common/UefiBaseTypes.h>
#include <IndustryStandard/PeImage.h>
#include "PeCoffLib.h"
#include "EfiUtilityMsgs.h"
#include "GenFw.h"
#include "ElfConvert.h"
#include "Elf32Convert.h"
STATIC
VOID
ScanSections32 (
VOID
);
STATIC
BOOLEAN
WriteSections32 (
SECTION_FILTER_TYPES FilterType
);
STATIC
VOID
WriteRelocations32 (
VOID
);
STATIC
VOID
WriteDebug32 (
VOID
);
STATIC
VOID
SetImageSize32 (
VOID
);
STATIC
VOID
CleanUp32 (
VOID
);
//
// Rename ELF32 strucutres to common names to help when porting to ELF64.
//
typedef Elf32_Shdr Elf_Shdr;
typedef Elf32_Ehdr Elf_Ehdr;
typedef Elf32_Rel Elf_Rel;
typedef Elf32_Sym Elf_Sym;
typedef Elf32_Phdr Elf_Phdr;
typedef Elf32_Dyn Elf_Dyn;
#define ELFCLASS ELFCLASS32
#define ELF_R_TYPE(r) ELF32_R_TYPE(r)
#define ELF_R_SYM(r) ELF32_R_SYM(r)
//
// Well known ELF structures.
//
STATIC Elf_Ehdr *mEhdr;
STATIC Elf_Shdr *mShdrBase;
STATIC Elf_Phdr *mPhdrBase;
//
// Coff information
//
STATIC const UINT32 mCoffAlignment = 0x20;
//
// PE section alignment.
//
STATIC const UINT16 mCoffNbrSections = 5;
//
// ELF sections to offset in Coff file.
//
STATIC UINT32 *mCoffSectionsOffset = NULL;
//
// Offsets in COFF file
//
STATIC UINT32 mNtHdrOffset;
STATIC UINT32 mTextOffset;
STATIC UINT32 mDataOffset;
STATIC UINT32 mHiiRsrcOffset;
STATIC UINT32 mRelocOffset;
//
// Initialization Function
//
BOOLEAN
InitializeElf32 (
UINT8 *FileBuffer,
ELF_FUNCTION_TABLE *ElfFunctions
)
{
//
// Initialize data pointer and structures.
//
mEhdr = (Elf_Ehdr*) FileBuffer;
//
// Check the ELF32 specific header information.
//
if (mEhdr->e_ident[EI_CLASS] != ELFCLASS32) {
Error (NULL, 0, 3000, "Unsupported", "ELF EI_DATA not ELFCLASS32");
return FALSE;
}
if (mEhdr->e_ident[EI_DATA] != ELFDATA2LSB) {
Error (NULL, 0, 3000, "Unsupported", "ELF EI_DATA not ELFDATA2LSB");
return FALSE;
}
if ((mEhdr->e_type != ET_EXEC) && (mEhdr->e_type != ET_DYN)) {
Error (NULL, 0, 3000, "Unsupported", "ELF e_type not ET_EXEC or ET_DYN");
return FALSE;
}
if (!((mEhdr->e_machine == EM_386) || (mEhdr->e_machine == EM_ARM))) {
Error (NULL, 0, 3000, "Unsupported", "ELF e_machine not EM_386 or EM_ARM");
return FALSE;
}
if (mEhdr->e_version != EV_CURRENT) {
Error (NULL, 0, 3000, "Unsupported", "ELF e_version (%u) not EV_CURRENT (%d)", (unsigned) mEhdr->e_version, EV_CURRENT);
return FALSE;
}
//
// Update section header pointers
//
mShdrBase = (Elf_Shdr *)((UINT8 *)mEhdr + mEhdr->e_shoff);
mPhdrBase = (Elf_Phdr *)((UINT8 *)mEhdr + mEhdr->e_phoff);
//
// Create COFF Section offset buffer and zero.
//
mCoffSectionsOffset = (UINT32 *)malloc(mEhdr->e_shnum * sizeof (UINT32));
memset(mCoffSectionsOffset, 0, mEhdr->e_shnum * sizeof(UINT32));
//
// Fill in function pointers.
//
ElfFunctions->ScanSections = ScanSections32;
ElfFunctions->WriteSections = WriteSections32;
ElfFunctions->WriteRelocations = WriteRelocations32;
ElfFunctions->WriteDebug = WriteDebug32;
ElfFunctions->SetImageSize = SetImageSize32;
ElfFunctions->CleanUp = CleanUp32;
return TRUE;
}
//
// Header by Index functions
//
STATIC
Elf_Shdr*
GetShdrByIndex (
UINT32 Num
)
{
if (Num >= mEhdr->e_shnum)
return NULL;
return (Elf_Shdr*)((UINT8*)mShdrBase + Num * mEhdr->e_shentsize);
}
STATIC
Elf_Phdr*
GetPhdrByIndex (
UINT32 num
)
{
if (num >= mEhdr->e_phnum) {
return NULL;
}
return (Elf_Phdr *)((UINT8*)mPhdrBase + num * mEhdr->e_phentsize);
}
STATIC
UINT32
CoffAlign (
UINT32 Offset
)
{
return (Offset + mCoffAlignment - 1) & ~(mCoffAlignment - 1);
}
//
// filter functions
//
STATIC
BOOLEAN
IsTextShdr (
Elf_Shdr *Shdr
)
{
return (BOOLEAN) ((Shdr->sh_flags & (SHF_WRITE | SHF_ALLOC)) == SHF_ALLOC);
}
STATIC
BOOLEAN
IsHiiRsrcShdr (
Elf_Shdr *Shdr
)
{
Elf_Shdr *Namedr = GetShdrByIndex(mEhdr->e_shstrndx);
return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namedr->sh_offset + Shdr->sh_name, ELF_HII_SECTION_NAME) == 0);
}
STATIC
BOOLEAN
IsDataShdr (
Elf_Shdr *Shdr
)
{
if (IsHiiRsrcShdr(Shdr)) {
return FALSE;
}
return (BOOLEAN) (Shdr->sh_flags & (SHF_WRITE | SHF_ALLOC)) == (SHF_ALLOC | SHF_WRITE);
}
//
// Elf functions interface implementation
//
STATIC
VOID
ScanSections32 (
VOID
)
{
UINT32 i;
EFI_IMAGE_DOS_HEADER *DosHdr;
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
UINT32 CoffEntry;
CoffEntry = 0;
mCoffOffset = 0;
//
// Coff file start with a DOS header.
//
mCoffOffset = sizeof(EFI_IMAGE_DOS_HEADER) + 0x40;
mNtHdrOffset = mCoffOffset;
switch (mEhdr->e_machine) {
case EM_386:
case EM_ARM:
mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS32);
break;
default:
VerboseMsg ("%s unknown e_machine type. Assume IA-32", (UINTN)mEhdr->e_machine);
mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS32);
break;
}
mTableOffset = mCoffOffset;
mCoffOffset += mCoffNbrSections * sizeof(EFI_IMAGE_SECTION_HEADER);
//
// First text sections.
//
mCoffOffset = CoffAlign(mCoffOffset);
mTextOffset = mCoffOffset;
for (i = 0; i < mEhdr->e_shnum; i++) {
Elf_Shdr *shdr = GetShdrByIndex(i);
if (IsTextShdr(shdr)) {
if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
// the alignment field is valid
if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
mCoffOffset = (mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1);
} else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
}
}
/* Relocate entry. */
if ((mEhdr->e_entry >= shdr->sh_addr) &&
(mEhdr->e_entry < shdr->sh_addr + shdr->sh_size)) {
CoffEntry = mCoffOffset + mEhdr->e_entry - shdr->sh_addr;
}
mCoffSectionsOffset[i] = mCoffOffset;
mCoffOffset += shdr->sh_size;
}
}
if (mEhdr->e_machine != EM_ARM) {
mCoffOffset = CoffAlign(mCoffOffset);
}
//
// Then data sections.
//
mDataOffset = mCoffOffset;
for (i = 0; i < mEhdr->e_shnum; i++) {
Elf_Shdr *shdr = GetShdrByIndex(i);
if (IsDataShdr(shdr)) {
if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
// the alignment field is valid
if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
mCoffOffset = (mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1);
} else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
}
}
mCoffSectionsOffset[i] = mCoffOffset;
mCoffOffset += shdr->sh_size;
}
}
mCoffOffset = CoffAlign(mCoffOffset);
//
// The HII resource sections.
//
mHiiRsrcOffset = mCoffOffset;
for (i = 0; i < mEhdr->e_shnum; i++) {
Elf_Shdr *shdr = GetShdrByIndex(i);
if (IsHiiRsrcShdr(shdr)) {
if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
// the alignment field is valid
if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
mCoffOffset = (mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1);
} else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
}
}
if (shdr->sh_size != 0) {
mCoffSectionsOffset[i] = mCoffOffset;
mCoffOffset += shdr->sh_size;
mCoffOffset = CoffAlign(mCoffOffset);
SetHiiResourceHeader ((UINT8*) mEhdr + shdr->sh_offset, mHiiRsrcOffset);
}
break;
}
}
mRelocOffset = mCoffOffset;
//
// Allocate base Coff file. Will be expanded later for relocations.
//
mCoffFile = (UINT8 *)malloc(mCoffOffset);
memset(mCoffFile, 0, mCoffOffset);
//
// Fill headers.
//
DosHdr = (EFI_IMAGE_DOS_HEADER *)mCoffFile;
DosHdr->e_magic = EFI_IMAGE_DOS_SIGNATURE;
DosHdr->e_lfanew = mNtHdrOffset;
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION*)(mCoffFile + mNtHdrOffset);
NtHdr->Pe32.Signature = EFI_IMAGE_NT_SIGNATURE;
switch (mEhdr->e_machine) {
case EM_386:
NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_IA32;
NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
break;
case EM_ARM:
NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_ARMT;
NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
break;
default:
VerboseMsg ("%s unknown e_machine type. Assume IA-32", (UINTN)mEhdr->e_machine);
NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_IA32;
NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
}
NtHdr->Pe32.FileHeader.NumberOfSections = mCoffNbrSections;
NtHdr->Pe32.FileHeader.TimeDateStamp = (UINT32) time(NULL);
mImageTimeStamp = NtHdr->Pe32.FileHeader.TimeDateStamp;
NtHdr->Pe32.FileHeader.PointerToSymbolTable = 0;
NtHdr->Pe32.FileHeader.NumberOfSymbols = 0;
NtHdr->Pe32.FileHeader.SizeOfOptionalHeader = sizeof(NtHdr->Pe32.OptionalHeader);
NtHdr->Pe32.FileHeader.Characteristics = EFI_IMAGE_FILE_EXECUTABLE_IMAGE
| EFI_IMAGE_FILE_LINE_NUMS_STRIPPED
| EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED
| EFI_IMAGE_FILE_32BIT_MACHINE;
NtHdr->Pe32.OptionalHeader.SizeOfCode = mDataOffset - mTextOffset;
NtHdr->Pe32.OptionalHeader.SizeOfInitializedData = mRelocOffset - mDataOffset;
NtHdr->Pe32.OptionalHeader.SizeOfUninitializedData = 0;
NtHdr->Pe32.OptionalHeader.AddressOfEntryPoint = CoffEntry;
NtHdr->Pe32.OptionalHeader.BaseOfCode = mTextOffset;
NtHdr->Pe32.OptionalHeader.BaseOfData = mDataOffset;
NtHdr->Pe32.OptionalHeader.ImageBase = 0;
NtHdr->Pe32.OptionalHeader.SectionAlignment = mCoffAlignment;
NtHdr->Pe32.OptionalHeader.FileAlignment = mCoffAlignment;
NtHdr->Pe32.OptionalHeader.SizeOfImage = 0;
NtHdr->Pe32.OptionalHeader.SizeOfHeaders = mTextOffset;
NtHdr->Pe32.OptionalHeader.NumberOfRvaAndSizes = EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES;
//
// Section headers.
//
if ((mDataOffset - mTextOffset) > 0) {
CreateSectionHeader (".text", mTextOffset, mDataOffset - mTextOffset,
EFI_IMAGE_SCN_CNT_CODE
| EFI_IMAGE_SCN_MEM_EXECUTE
| EFI_IMAGE_SCN_MEM_READ);
} else {
// Don't make a section of size 0.
NtHdr->Pe32.FileHeader.NumberOfSections--;
}
if ((mHiiRsrcOffset - mDataOffset) > 0) {
CreateSectionHeader (".data", mDataOffset, mHiiRsrcOffset - mDataOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_WRITE
| EFI_IMAGE_SCN_MEM_READ);
} else {
// Don't make a section of size 0.
NtHdr->Pe32.FileHeader.NumberOfSections--;
}
if ((mRelocOffset - mHiiRsrcOffset) > 0) {
CreateSectionHeader (".rsrc", mHiiRsrcOffset, mRelocOffset - mHiiRsrcOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_READ);
NtHdr->Pe32.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].Size = mRelocOffset - mHiiRsrcOffset;
NtHdr->Pe32.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].VirtualAddress = mHiiRsrcOffset;
} else {
// Don't make a section of size 0.
NtHdr->Pe32.FileHeader.NumberOfSections--;
}
}
STATIC
BOOLEAN
WriteSections32 (
SECTION_FILTER_TYPES FilterType
)
{
UINT32 Idx;
Elf_Shdr *SecShdr;
UINT32 SecOffset;
BOOLEAN (*Filter)(Elf_Shdr *);
//
// Initialize filter pointer
//
switch (FilterType) {
case SECTION_TEXT:
Filter = IsTextShdr;
break;
case SECTION_HII:
Filter = IsHiiRsrcShdr;
break;
case SECTION_DATA:
Filter = IsDataShdr;
break;
default:
return FALSE;
}
//
// First: copy sections.
//
for (Idx = 0; Idx < mEhdr->e_shnum; Idx++) {
Elf_Shdr *Shdr = GetShdrByIndex(Idx);
if ((*Filter)(Shdr)) {
switch (Shdr->sh_type) {
case SHT_PROGBITS:
/* Copy. */
memcpy(mCoffFile + mCoffSectionsOffset[Idx],
(UINT8*)mEhdr + Shdr->sh_offset,
Shdr->sh_size);
break;
case SHT_NOBITS:
memset(mCoffFile + mCoffSectionsOffset[Idx], 0, Shdr->sh_size);
break;
default:
//
// Ignore for unkown section type.
//
VerboseMsg ("%s unknown section type %x. We directly copy this section into Coff file", mInImageName, (unsigned)Shdr->sh_type);
break;
}
}
}
//
// Second: apply relocations.
//
for (Idx = 0; Idx < mEhdr->e_shnum; Idx++) {
//
// Determine if this is a relocation section.
//
Elf_Shdr *RelShdr = GetShdrByIndex(Idx);
if ((RelShdr->sh_type != SHT_REL) && (RelShdr->sh_type != SHT_RELA)) {
continue;
}
//
// Relocation section found. Now extract section information that the relocations
// apply to in the ELF data and the new COFF data.
//
SecShdr = GetShdrByIndex(RelShdr->sh_info);
SecOffset = mCoffSectionsOffset[RelShdr->sh_info];
//
// Only process relocations for the current filter type.
//
if (RelShdr->sh_type == SHT_REL && (*Filter)(SecShdr)) {
UINT32 RelOffset;
//
// Determine the symbol table referenced by the relocation data.
//
Elf_Shdr *SymtabShdr = GetShdrByIndex(RelShdr->sh_link);
UINT8 *Symtab = (UINT8*)mEhdr + SymtabShdr->sh_offset;
//
// Process all relocation entries for this section.
//
for (RelOffset = 0; RelOffset < RelShdr->sh_size; RelOffset += RelShdr->sh_entsize) {
//
// Set pointer to relocation entry
//
Elf_Rel *Rel = (Elf_Rel *)((UINT8*)mEhdr + RelShdr->sh_offset + RelOffset);
//
// Set pointer to symbol table entry associated with the relocation entry.
//
Elf_Sym *Sym = (Elf_Sym *)(Symtab + ELF_R_SYM(Rel->r_info) * SymtabShdr->sh_entsize);
Elf_Shdr *SymShdr;
UINT8 *Targ;
UINT16 Address;
//
// Check section header index found in symbol table and get the section
// header location.
//
if (Sym->st_shndx == SHN_UNDEF
|| Sym->st_shndx == SHN_ABS
|| Sym->st_shndx > mEhdr->e_shnum) {
Error (NULL, 0, 3000, "Invalid", "%s bad symbol definition.", mInImageName);
}
SymShdr = GetShdrByIndex(Sym->st_shndx);
//
// Convert the relocation data to a pointer into the coff file.
//
// Note:
// r_offset is the virtual address of the storage unit to be relocated.
// sh_addr is the virtual address for the base of the section.
//
Targ = mCoffFile + SecOffset + (Rel->r_offset - SecShdr->sh_addr);
//
// Determine how to handle each relocation type based on the machine type.
//
if (mEhdr->e_machine == EM_386) {
switch (ELF_R_TYPE(Rel->r_info)) {
case R_386_NONE:
break;
case R_386_32:
//
// Absolute relocation.
// Converts Targ from a absolute virtual address to the absolute
// COFF address.
//
*(UINT32 *)Targ = *(UINT32 *)Targ - SymShdr->sh_addr
+ mCoffSectionsOffset[Sym->st_shndx];
break;
case R_386_PC32:
//
// Relative relocation: Symbol - Ip + Addend
//
*(UINT32 *)Targ = *(UINT32 *)Targ
+ (mCoffSectionsOffset[Sym->st_shndx] - SymShdr->sh_addr)
- (SecOffset - SecShdr->sh_addr);
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_386 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
}
} else if (mEhdr->e_machine == EM_ARM) {
switch (ELF32_R_TYPE(Rel->r_info)) {
case R_ARM_RBASE:
// No relocation - no action required
case R_ARM_PC24:
case R_ARM_XPC25:
case R_ARM_THM_PC22:
case R_ARM_THM_JUMP19:
case R_ARM_CALL:
case R_ARM_JMP24:
// Thease are all PC-relative relocations and don't require modification
// GCC does not seem to have the concept of a application that just needs to get relocated.
break;
case R_ARM_THM_MOVW_ABS_NC:
// MOVW is only lower 16-bits of the addres
Address = (UINT16)(Sym->st_value - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]);
ThumbMovtImmediatePatch ((UINT16 *)Targ, Address);
break;
case R_ARM_THM_MOVT_ABS:
// MOVT is only upper 16-bits of the addres
Address = (UINT16)((Sym->st_value - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]) >> 16);
ThumbMovtImmediatePatch ((UINT16 *)Targ, Address);
break;
case R_ARM_ABS32:
case R_ARM_RABS32:
//
// Absolute relocation.
//
*(UINT32 *)Targ = *(UINT32 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
break;
default:
Error (NULL, 0, 3000, "Invalid", "WriteSections (): %s unsupported ELF EM_ARM relocation 0x%x.", mInImageName, (unsigned) ELF32_R_TYPE(Rel->r_info));
}
}
}
}
}
return TRUE;
}
STATIC
VOID
WriteRelocations32 (
VOID
)
{
UINT32 Index;
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
EFI_IMAGE_DATA_DIRECTORY *Dir;
BOOLEAN FoundRelocations;
Elf_Dyn *Dyn;
Elf_Rel *Rel;
UINTN RelElementSize;
UINTN RelSize;
UINTN RelOffset;
UINTN K;
UINT8 *Targ;
Elf32_Phdr *DynamicSegment;
Elf32_Phdr *TargetSegment;
Elf_Sym *Sym;
Elf_Shdr *SymtabShdr;
UINT8 *Symtab;
for (Index = 0, FoundRelocations = FALSE; Index < mEhdr->e_shnum; Index++) {
Elf_Shdr *RelShdr = GetShdrByIndex(Index);
if ((RelShdr->sh_type == SHT_REL) || (RelShdr->sh_type == SHT_RELA)) {
Elf_Shdr *SecShdr = GetShdrByIndex (RelShdr->sh_info);
if (IsTextShdr(SecShdr) || IsDataShdr(SecShdr)) {
UINT32 RelIdx;
SymtabShdr = GetShdrByIndex (RelShdr->sh_link);
Symtab = (UINT8*)mEhdr + SymtabShdr->sh_offset;
FoundRelocations = TRUE;
for (RelIdx = 0; RelIdx < RelShdr->sh_size; RelIdx += RelShdr->sh_entsize) {
Elf_Rel *Rel = (Elf_Rel *)((UINT8*)mEhdr + RelShdr->sh_offset + RelIdx);
Elf_Shdr *SymShdr;
Sym = (Elf_Sym *)(Symtab + ELF_R_SYM(Rel->r_info) * SymtabShdr->sh_entsize);
SymShdr = GetShdrByIndex (Sym->st_shndx);
if (mEhdr->e_machine == EM_386) {
switch (ELF_R_TYPE(Rel->r_info)) {
case R_386_NONE:
case R_386_PC32:
//
// No fixup entry required.
//
break;
case R_386_32:
//
// Creates a relative relocation entry from the absolute entry.
//
CoffAddFixup(mCoffSectionsOffset[RelShdr->sh_info]
+ (Rel->r_offset - SecShdr->sh_addr),
EFI_IMAGE_REL_BASED_HIGHLOW);
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_386 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
}
} else if (mEhdr->e_machine == EM_ARM) {
switch (ELF32_R_TYPE(Rel->r_info)) {
case R_ARM_RBASE:
// No relocation - no action required
case R_ARM_PC24:
case R_ARM_XPC25:
case R_ARM_THM_PC22:
case R_ARM_THM_JUMP19:
case R_ARM_CALL:
case R_ARM_JMP24:
// Thease are all PC-relative relocations and don't require modification
break;
case R_ARM_THM_MOVW_ABS_NC:
CoffAddFixup (
mCoffSectionsOffset[RelShdr->sh_info]
+ (Rel->r_offset - SecShdr->sh_addr),
EFI_IMAGE_REL_BASED_ARM_THUMB_MOVW
);
break;
case R_ARM_THM_MOVT_ABS:
CoffAddFixup (
mCoffSectionsOffset[RelShdr->sh_info]
+ (Rel->r_offset - SecShdr->sh_addr),
EFI_IMAGE_REL_BASED_ARM_THUMB_MOVT
);
// The relocation entry needs to contain the lower 16-bits so we can do math
CoffAddFixupEntry ((UINT16)(Sym->st_value - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]));
break;
case R_ARM_ABS32:
case R_ARM_RABS32:
CoffAddFixup (
mCoffSectionsOffset[RelShdr->sh_info]
+ (Rel->r_offset - SecShdr->sh_addr),
EFI_IMAGE_REL_BASED_HIGHLOW
);
break;
default:
Error (NULL, 0, 3000, "Invalid", "WriteRelocations(): %s unsupported ELF EM_ARM relocation 0x%x.", mInImageName, (unsigned) ELF32_R_TYPE(Rel->r_info));
}
} else {
Error (NULL, 0, 3000, "Not Supported", "This tool does not support relocations for ELF with e_machine %u (processor type).", (unsigned) mEhdr->e_machine);
}
}
}
}
}
if (!FoundRelocations && (mEhdr->e_machine == EM_ARM)) {
/* Try again, but look for PT_DYNAMIC instead of SHT_REL */
for (Index = 0; Index < mEhdr->e_phnum; Index++) {
RelElementSize = 0;
RelSize = 0;
RelOffset = 0;
DynamicSegment = GetPhdrByIndex (Index);
if (DynamicSegment->p_type == PT_DYNAMIC) {
Dyn = (Elf32_Dyn *) ((UINT8 *)mEhdr + DynamicSegment->p_offset);
while (Dyn->d_tag != DT_NULL) {
switch (Dyn->d_tag) {
case DT_REL:
RelOffset = Dyn->d_un.d_val;
break;
case DT_RELSZ:
RelSize = Dyn->d_un.d_val;
break;
case DT_RELENT:
RelElementSize = Dyn->d_un.d_val;
break;
default:
break;
}
Dyn++;
}
if (( RelOffset == 0 ) || ( RelSize == 0 ) || ( RelElementSize == 0 )) {
Error (NULL, 0, 3000, "Invalid", "%s bad ARM dynamic relocations.", mInImageName);
}
for (K = 0; K < RelSize; K += RelElementSize) {
if (DynamicSegment->p_paddr == 0) {
// Older versions of the ARM ELF (SWS ESPC 0003 B-02) specification define DT_REL
// as an offset in the dynamic segment. p_paddr is defined to be zero for ARM tools
Rel = (Elf32_Rel *) ((UINT8 *) mEhdr + DynamicSegment->p_offset + RelOffset + K);
} else {
// This is how it reads in the generic ELF specification
Rel = (Elf32_Rel *) ((UINT8 *) mEhdr + RelOffset + K);
}
switch (ELF32_R_TYPE (Rel->r_info)) {
case R_ARM_RBASE:
break;
case R_ARM_RABS32:
TargetSegment = GetPhdrByIndex (ELF32_R_SYM (Rel->r_info) - 1);
// Note: r_offset in a memory address. Convert it to a pointer in the coff file.
Targ = mCoffFile + mCoffSectionsOffset[ ELF32_R_SYM( Rel->r_info ) ] + Rel->r_offset - TargetSegment->p_vaddr;
*(UINT32 *)Targ = *(UINT32 *)Targ + mCoffSectionsOffset [ELF32_R_SYM( Rel->r_info )];
CoffAddFixup (mCoffSectionsOffset[ELF32_R_SYM (Rel->r_info)] + (Rel->r_offset - TargetSegment->p_vaddr), EFI_IMAGE_REL_BASED_HIGHLOW);
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s bad ARM dynamic relocations, unkown type %d.", mInImageName, ELF32_R_TYPE (Rel->r_info));
break;
}
}
break;
}
}
}
//
// Pad by adding empty entries.
//
while (mCoffOffset & (mCoffAlignment - 1)) {
CoffAddFixupEntry(0);
}
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);
Dir = &NtHdr->Pe32.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC];
Dir->Size = mCoffOffset - mRelocOffset;
if (Dir->Size == 0) {
// If no relocations, null out the directory entry and don't add the .reloc section
Dir->VirtualAddress = 0;
NtHdr->Pe32.FileHeader.NumberOfSections--;
} else {
Dir->VirtualAddress = mRelocOffset;
CreateSectionHeader (".reloc", mRelocOffset, mCoffOffset - mRelocOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_DISCARDABLE
| EFI_IMAGE_SCN_MEM_READ);
}
}
STATIC
VOID
WriteDebug32 (
VOID
)
{
UINT32 Len;
UINT32 DebugOffset;
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
EFI_IMAGE_DATA_DIRECTORY *DataDir;
EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *Dir;
EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY *Nb10;
Len = strlen(mInImageName) + 1;
DebugOffset = mCoffOffset;
mCoffOffset += sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY)
+ sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY)
+ Len;
mCoffOffset = CoffAlign(mCoffOffset);
mCoffFile = realloc(mCoffFile, mCoffOffset);
memset(mCoffFile + DebugOffset, 0, mCoffOffset - DebugOffset);
Dir = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY*)(mCoffFile + DebugOffset);
Dir->Type = EFI_IMAGE_DEBUG_TYPE_CODEVIEW;
Dir->SizeOfData = sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY) + Len;
Dir->RVA = DebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
Dir->FileOffset = DebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
Nb10 = (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY*)(Dir + 1);
Nb10->Signature = CODEVIEW_SIGNATURE_NB10;
strcpy ((char *)(Nb10 + 1), mInImageName);
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);
DataDir = &NtHdr->Pe32.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_DEBUG];
DataDir->VirtualAddress = DebugOffset;
DataDir->Size = mCoffOffset - DebugOffset;
if (DataDir->Size == 0) {
// If no debug, null out the directory entry and don't add the .debug section
DataDir->VirtualAddress = 0;
NtHdr->Pe32.FileHeader.NumberOfSections--;
} else {
DataDir->VirtualAddress = DebugOffset;
CreateSectionHeader (".debug", DebugOffset, mCoffOffset - DebugOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_DISCARDABLE
| EFI_IMAGE_SCN_MEM_READ);
}
}
STATIC
VOID
SetImageSize32 (
VOID
)
{
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
//
// Set image size
//
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);
NtHdr->Pe32.OptionalHeader.SizeOfImage = mCoffOffset;
}
STATIC
VOID
CleanUp32 (
VOID
)
{
if (mCoffSectionsOffset != NULL) {
free (mCoffSectionsOffset);
}
}

View File

@@ -0,0 +1,24 @@
/** @file
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _ELF_32_CONVERT_
#define _ELF_32_CONVERT_
BOOLEAN
InitializeElf32 (
UINT8 *FileBuffer,
ELF_FUNCTION_TABLE *ElfFunctions
);
#endif

View File

@@ -0,0 +1,785 @@
/** @file
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "WinNtInclude.h"
#ifndef __GNUC__
#include <windows.h>
#include <io.h>
#endif
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <ctype.h>
#include <Common/UefiBaseTypes.h>
#include <IndustryStandard/PeImage.h>
#include "PeCoffLib.h"
#include "EfiUtilityMsgs.h"
#include "GenFw.h"
#include "ElfConvert.h"
#include "Elf64Convert.h"
STATIC
VOID
ScanSections64 (
VOID
);
STATIC
BOOLEAN
WriteSections64 (
SECTION_FILTER_TYPES FilterType
);
STATIC
VOID
WriteRelocations64 (
VOID
);
STATIC
VOID
WriteDebug64 (
VOID
);
STATIC
VOID
SetImageSize64 (
VOID
);
STATIC
VOID
CleanUp64 (
VOID
);
//
// Rename ELF32 strucutres to common names to help when porting to ELF64.
//
typedef Elf64_Shdr Elf_Shdr;
typedef Elf64_Ehdr Elf_Ehdr;
typedef Elf64_Rel Elf_Rel;
typedef Elf64_Rela Elf_Rela;
typedef Elf64_Sym Elf_Sym;
typedef Elf64_Phdr Elf_Phdr;
typedef Elf64_Dyn Elf_Dyn;
#define ELFCLASS ELFCLASS64
#define ELF_R_TYPE(r) ELF64_R_TYPE(r)
#define ELF_R_SYM(r) ELF64_R_SYM(r)
//
// Well known ELF structures.
//
STATIC Elf_Ehdr *mEhdr;
STATIC Elf_Shdr *mShdrBase;
STATIC Elf_Phdr *mPhdrBase;
//
// Coff information
//
STATIC const UINT32 mCoffAlignment = 0x20;
//
// PE section alignment.
//
STATIC const UINT16 mCoffNbrSections = 5;
//
// ELF sections to offset in Coff file.
//
STATIC UINT32 *mCoffSectionsOffset = NULL;
//
// Offsets in COFF file
//
STATIC UINT32 mNtHdrOffset;
STATIC UINT32 mTextOffset;
STATIC UINT32 mDataOffset;
STATIC UINT32 mHiiRsrcOffset;
STATIC UINT32 mRelocOffset;
//
// Initialization Function
//
BOOLEAN
InitializeElf64 (
UINT8 *FileBuffer,
ELF_FUNCTION_TABLE *ElfFunctions
)
{
//
// Initialize data pointer and structures.
//
VerboseMsg ("Set EHDR");
mEhdr = (Elf_Ehdr*) FileBuffer;
//
// Check the ELF64 specific header information.
//
VerboseMsg ("Check ELF64 Header Information");
if (mEhdr->e_ident[EI_CLASS] != ELFCLASS64) {
Error (NULL, 0, 3000, "Unsupported", "ELF EI_DATA not ELFCLASS64");
return FALSE;
}
if (mEhdr->e_ident[EI_DATA] != ELFDATA2LSB) {
Error (NULL, 0, 3000, "Unsupported", "ELF EI_DATA not ELFDATA2LSB");
return FALSE;
}
if ((mEhdr->e_type != ET_EXEC) && (mEhdr->e_type != ET_DYN)) {
Error (NULL, 0, 3000, "Unsupported", "ELF e_type not ET_EXEC or ET_DYN");
return FALSE;
}
if (!((mEhdr->e_machine == EM_X86_64))) {
Error (NULL, 0, 3000, "Unsupported", "ELF e_machine not EM_X86_64");
return FALSE;
}
if (mEhdr->e_version != EV_CURRENT) {
Error (NULL, 0, 3000, "Unsupported", "ELF e_version (%u) not EV_CURRENT (%d)", (unsigned) mEhdr->e_version, EV_CURRENT);
return FALSE;
}
//
// Update section header pointers
//
VerboseMsg ("Update Header Pointers");
mShdrBase = (Elf_Shdr *)((UINT8 *)mEhdr + mEhdr->e_shoff);
mPhdrBase = (Elf_Phdr *)((UINT8 *)mEhdr + mEhdr->e_phoff);
//
// Create COFF Section offset buffer and zero.
//
VerboseMsg ("Create COFF Section Offset Buffer");
mCoffSectionsOffset = (UINT32 *)malloc(mEhdr->e_shnum * sizeof (UINT32));
memset(mCoffSectionsOffset, 0, mEhdr->e_shnum * sizeof(UINT32));
//
// Fill in function pointers.
//
VerboseMsg ("Fill in Function Pointers");
ElfFunctions->ScanSections = ScanSections64;
ElfFunctions->WriteSections = WriteSections64;
ElfFunctions->WriteRelocations = WriteRelocations64;
ElfFunctions->WriteDebug = WriteDebug64;
ElfFunctions->SetImageSize = SetImageSize64;
ElfFunctions->CleanUp = CleanUp64;
return TRUE;
}
//
// Header by Index functions
//
STATIC
Elf_Shdr*
GetShdrByIndex (
UINT32 Num
)
{
if (Num >= mEhdr->e_shnum)
return NULL;
return (Elf_Shdr*)((UINT8*)mShdrBase + Num * mEhdr->e_shentsize);
}
STATIC
UINT32
CoffAlign (
UINT32 Offset
)
{
return (Offset + mCoffAlignment - 1) & ~(mCoffAlignment - 1);
}
//
// filter functions
//
STATIC
BOOLEAN
IsTextShdr (
Elf_Shdr *Shdr
)
{
return (BOOLEAN) ((Shdr->sh_flags & (SHF_WRITE | SHF_ALLOC)) == SHF_ALLOC);
}
STATIC
BOOLEAN
IsHiiRsrcShdr (
Elf_Shdr *Shdr
)
{
Elf_Shdr *Namedr = GetShdrByIndex(mEhdr->e_shstrndx);
return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namedr->sh_offset + Shdr->sh_name, ELF_HII_SECTION_NAME) == 0);
}
STATIC
BOOLEAN
IsDataShdr (
Elf_Shdr *Shdr
)
{
if (IsHiiRsrcShdr(Shdr)) {
return FALSE;
}
return (BOOLEAN) (Shdr->sh_flags & (SHF_WRITE | SHF_ALLOC)) == (SHF_ALLOC | SHF_WRITE);
}
//
// Elf functions interface implementation
//
STATIC
VOID
ScanSections64 (
VOID
)
{
UINT32 i;
EFI_IMAGE_DOS_HEADER *DosHdr;
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
UINT32 CoffEntry;
CoffEntry = 0;
mCoffOffset = 0;
//
// Coff file start with a DOS header.
//
mCoffOffset = sizeof(EFI_IMAGE_DOS_HEADER) + 0x40;
mNtHdrOffset = mCoffOffset;
switch (mEhdr->e_machine) {
case EM_X86_64:
case EM_IA_64:
mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS64);
break;
default:
VerboseMsg ("%s unknown e_machine type. Assume X64", (UINTN)mEhdr->e_machine);
mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS64);
break;
}
mTableOffset = mCoffOffset;
mCoffOffset += mCoffNbrSections * sizeof(EFI_IMAGE_SECTION_HEADER);
//
// First text sections.
//
mCoffOffset = CoffAlign(mCoffOffset);
mTextOffset = mCoffOffset;
for (i = 0; i < mEhdr->e_shnum; i++) {
Elf_Shdr *shdr = GetShdrByIndex(i);
if (IsTextShdr(shdr)) {
if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
// the alignment field is valid
if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));
} else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
}
}
/* Relocate entry. */
if ((mEhdr->e_entry >= shdr->sh_addr) &&
(mEhdr->e_entry < shdr->sh_addr + shdr->sh_size)) {
CoffEntry = (UINT32) (mCoffOffset + mEhdr->e_entry - shdr->sh_addr);
}
mCoffSectionsOffset[i] = mCoffOffset;
mCoffOffset += (UINT32) shdr->sh_size;
}
}
if (mEhdr->e_machine != EM_ARM) {
mCoffOffset = CoffAlign(mCoffOffset);
}
//
// Then data sections.
//
mDataOffset = mCoffOffset;
for (i = 0; i < mEhdr->e_shnum; i++) {
Elf_Shdr *shdr = GetShdrByIndex(i);
if (IsDataShdr(shdr)) {
if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
// the alignment field is valid
if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));
} else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
}
}
mCoffSectionsOffset[i] = mCoffOffset;
mCoffOffset += (UINT32) shdr->sh_size;
}
}
mCoffOffset = CoffAlign(mCoffOffset);
//
// The HII resource sections.
//
mHiiRsrcOffset = mCoffOffset;
for (i = 0; i < mEhdr->e_shnum; i++) {
Elf_Shdr *shdr = GetShdrByIndex(i);
if (IsHiiRsrcShdr(shdr)) {
if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
// the alignment field is valid
if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));
} else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
}
}
if (shdr->sh_size != 0) {
mCoffSectionsOffset[i] = mCoffOffset;
mCoffOffset += (UINT32) shdr->sh_size;
mCoffOffset = CoffAlign(mCoffOffset);
SetHiiResourceHeader ((UINT8*) mEhdr + shdr->sh_offset, mHiiRsrcOffset);
}
break;
}
}
mRelocOffset = mCoffOffset;
//
// Allocate base Coff file. Will be expanded later for relocations.
//
mCoffFile = (UINT8 *)malloc(mCoffOffset);
memset(mCoffFile, 0, mCoffOffset);
//
// Fill headers.
//
DosHdr = (EFI_IMAGE_DOS_HEADER *)mCoffFile;
DosHdr->e_magic = EFI_IMAGE_DOS_SIGNATURE;
DosHdr->e_lfanew = mNtHdrOffset;
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION*)(mCoffFile + mNtHdrOffset);
NtHdr->Pe32Plus.Signature = EFI_IMAGE_NT_SIGNATURE;
switch (mEhdr->e_machine) {
case EM_X86_64:
NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;
NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
break;
case EM_IA_64:
NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_IPF;
NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
break;
default:
VerboseMsg ("%s unknown e_machine type. Assume X64", (UINTN)mEhdr->e_machine);
NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;
NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
}
NtHdr->Pe32Plus.FileHeader.NumberOfSections = mCoffNbrSections;
NtHdr->Pe32Plus.FileHeader.TimeDateStamp = (UINT32) time(NULL);
mImageTimeStamp = NtHdr->Pe32Plus.FileHeader.TimeDateStamp;
NtHdr->Pe32Plus.FileHeader.PointerToSymbolTable = 0;
NtHdr->Pe32Plus.FileHeader.NumberOfSymbols = 0;
NtHdr->Pe32Plus.FileHeader.SizeOfOptionalHeader = sizeof(NtHdr->Pe32Plus.OptionalHeader);
NtHdr->Pe32Plus.FileHeader.Characteristics = EFI_IMAGE_FILE_EXECUTABLE_IMAGE
| EFI_IMAGE_FILE_LINE_NUMS_STRIPPED
| EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED
| EFI_IMAGE_FILE_LARGE_ADDRESS_AWARE;
NtHdr->Pe32Plus.OptionalHeader.SizeOfCode = mDataOffset - mTextOffset;
NtHdr->Pe32Plus.OptionalHeader.SizeOfInitializedData = mRelocOffset - mDataOffset;
NtHdr->Pe32Plus.OptionalHeader.SizeOfUninitializedData = 0;
NtHdr->Pe32Plus.OptionalHeader.AddressOfEntryPoint = CoffEntry;
NtHdr->Pe32Plus.OptionalHeader.BaseOfCode = mTextOffset;
NtHdr->Pe32Plus.OptionalHeader.ImageBase = 0;
NtHdr->Pe32Plus.OptionalHeader.SectionAlignment = mCoffAlignment;
NtHdr->Pe32Plus.OptionalHeader.FileAlignment = mCoffAlignment;
NtHdr->Pe32Plus.OptionalHeader.SizeOfImage = 0;
NtHdr->Pe32Plus.OptionalHeader.SizeOfHeaders = mTextOffset;
NtHdr->Pe32Plus.OptionalHeader.NumberOfRvaAndSizes = EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES;
//
// Section headers.
//
if ((mDataOffset - mTextOffset) > 0) {
CreateSectionHeader (".text", mTextOffset, mDataOffset - mTextOffset,
EFI_IMAGE_SCN_CNT_CODE
| EFI_IMAGE_SCN_MEM_EXECUTE
| EFI_IMAGE_SCN_MEM_READ);
} else {
// Don't make a section of size 0.
NtHdr->Pe32Plus.FileHeader.NumberOfSections--;
}
if ((mHiiRsrcOffset - mDataOffset) > 0) {
CreateSectionHeader (".data", mDataOffset, mHiiRsrcOffset - mDataOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_WRITE
| EFI_IMAGE_SCN_MEM_READ);
} else {
// Don't make a section of size 0.
NtHdr->Pe32Plus.FileHeader.NumberOfSections--;
}
if ((mRelocOffset - mHiiRsrcOffset) > 0) {
CreateSectionHeader (".rsrc", mHiiRsrcOffset, mRelocOffset - mHiiRsrcOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_READ);
NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].Size = mRelocOffset - mHiiRsrcOffset;
NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].VirtualAddress = mHiiRsrcOffset;
} else {
// Don't make a section of size 0.
NtHdr->Pe32Plus.FileHeader.NumberOfSections--;
}
}
STATIC
BOOLEAN
WriteSections64 (
SECTION_FILTER_TYPES FilterType
)
{
UINT32 Idx;
Elf_Shdr *SecShdr;
UINT32 SecOffset;
BOOLEAN (*Filter)(Elf_Shdr *);
//
// Initialize filter pointer
//
switch (FilterType) {
case SECTION_TEXT:
Filter = IsTextShdr;
break;
case SECTION_HII:
Filter = IsHiiRsrcShdr;
break;
case SECTION_DATA:
Filter = IsDataShdr;
break;
default:
return FALSE;
}
//
// First: copy sections.
//
for (Idx = 0; Idx < mEhdr->e_shnum; Idx++) {
Elf_Shdr *Shdr = GetShdrByIndex(Idx);
if ((*Filter)(Shdr)) {
switch (Shdr->sh_type) {
case SHT_PROGBITS:
/* Copy. */
memcpy(mCoffFile + mCoffSectionsOffset[Idx],
(UINT8*)mEhdr + Shdr->sh_offset,
(size_t) Shdr->sh_size);
break;
case SHT_NOBITS:
memset(mCoffFile + mCoffSectionsOffset[Idx], 0, (size_t) Shdr->sh_size);
break;
default:
//
// Ignore for unkown section type.
//
VerboseMsg ("%s unknown section type %x. We directly copy this section into Coff file", mInImageName, (unsigned)Shdr->sh_type);
break;
}
}
}
//
// Second: apply relocations.
//
VerboseMsg ("Applying Relocations...");
for (Idx = 0; Idx < mEhdr->e_shnum; Idx++) {
Elf_Shdr *RelShdr = GetShdrByIndex(Idx);
if ((RelShdr->sh_type != SHT_REL) && (RelShdr->sh_type != SHT_RELA)) {
continue;
}
SecShdr = GetShdrByIndex(RelShdr->sh_info);
SecOffset = mCoffSectionsOffset[RelShdr->sh_info];
if (RelShdr->sh_type == SHT_RELA && (*Filter)(SecShdr)) {
UINT64 RelIdx;
Elf_Shdr *SymtabShdr = GetShdrByIndex(RelShdr->sh_link);
UINT8 *Symtab = (UINT8*)mEhdr + SymtabShdr->sh_offset;
for (RelIdx = 0; RelIdx < RelShdr->sh_size; RelIdx += (UINT32) RelShdr->sh_entsize) {
Elf_Rela *Rel = (Elf_Rela *)((UINT8*)mEhdr + RelShdr->sh_offset + RelIdx);
Elf_Sym *Sym = (Elf_Sym *)(Symtab + ELF_R_SYM(Rel->r_info) * SymtabShdr->sh_entsize);
Elf_Shdr *SymShdr;
UINT8 *Targ;
if (Sym->st_shndx == SHN_UNDEF
|| Sym->st_shndx == SHN_ABS
|| Sym->st_shndx > mEhdr->e_shnum) {
Error (NULL, 0, 3000, "Invalid", "%s bad symbol definition.", mInImageName);
}
SymShdr = GetShdrByIndex(Sym->st_shndx);
//
// Note: r_offset in a memory address.
// Convert it to a pointer in the coff file.
//
Targ = mCoffFile + SecOffset + (Rel->r_offset - SecShdr->sh_addr);
if (mEhdr->e_machine == EM_X86_64) {
switch (ELF_R_TYPE(Rel->r_info)) {
case R_X86_64_NONE:
break;
case R_X86_64_64:
//
// Absolute relocation.
//
VerboseMsg ("R_X86_64_64");
VerboseMsg ("Offset: 0x%08X, Addend: 0x%016LX",
(UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),
*(UINT64 *)Targ);
*(UINT64 *)Targ = *(UINT64 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
VerboseMsg ("Relocation: 0x%016LX", *(UINT64*)Targ);
break;
case R_X86_64_32:
VerboseMsg ("R_X86_64_32");
VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",
(UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),
*(UINT32 *)Targ);
*(UINT32 *)Targ = (UINT32)((UINT64)(*(UINT32 *)Targ) - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]);
VerboseMsg ("Relocation: 0x%08X", *(UINT32*)Targ);
break;
case R_X86_64_32S:
VerboseMsg ("R_X86_64_32S");
VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",
(UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),
*(UINT32 *)Targ);
*(INT32 *)Targ = (INT32)((INT64)(*(INT32 *)Targ) - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]);
VerboseMsg ("Relocation: 0x%08X", *(UINT32*)Targ);
break;
case R_X86_64_PC32:
//
// Relative relocation: Symbol - Ip + Addend
//
VerboseMsg ("R_X86_64_PC32");
VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",
(UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),
*(UINT32 *)Targ);
*(UINT32 *)Targ = (UINT32) (*(UINT32 *)Targ
+ (mCoffSectionsOffset[Sym->st_shndx] - SymShdr->sh_addr)
- (SecOffset - SecShdr->sh_addr));
VerboseMsg ("Relocation: 0x%08X", *(UINT32 *)Targ);
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_X86_64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
}
} else {
Error (NULL, 0, 3000, "Invalid", "Not EM_X86_X64");
}
}
}
}
return TRUE;
}
STATIC
VOID
WriteRelocations64 (
VOID
)
{
UINT32 Index;
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
EFI_IMAGE_DATA_DIRECTORY *Dir;
BOOLEAN FoundRelocations;
Elf_Sym *Sym;
Elf_Shdr *SymtabShdr;
UINT8 *Symtab;
for (Index = 0, FoundRelocations = FALSE; Index < mEhdr->e_shnum; Index++) {
Elf_Shdr *RelShdr = GetShdrByIndex(Index);
if ((RelShdr->sh_type == SHT_REL) || (RelShdr->sh_type == SHT_RELA)) {
Elf_Shdr *SecShdr = GetShdrByIndex (RelShdr->sh_info);
if (IsTextShdr(SecShdr) || IsDataShdr(SecShdr)) {
UINT64 RelIdx;
SymtabShdr = GetShdrByIndex (RelShdr->sh_link);
Symtab = (UINT8*)mEhdr + SymtabShdr->sh_offset;
FoundRelocations = TRUE;
for (RelIdx = 0; RelIdx < RelShdr->sh_size; RelIdx += RelShdr->sh_entsize) {
Elf_Rela *Rel = (Elf_Rela *)((UINT8*)mEhdr + RelShdr->sh_offset + RelIdx);
Elf_Shdr *SymShdr;
Sym = (Elf_Sym *)(Symtab + ELF_R_SYM(Rel->r_info) * SymtabShdr->sh_entsize);
SymShdr = GetShdrByIndex (Sym->st_shndx);
if (mEhdr->e_machine == EM_X86_64) {
switch (ELF_R_TYPE(Rel->r_info)) {
case R_X86_64_NONE:
case R_X86_64_PC32:
break;
case R_X86_64_64:
VerboseMsg ("EFI_IMAGE_REL_BASED_DIR64 Offset: 0x%08X",
mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr));
CoffAddFixup(
(UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+ (Rel->r_offset - SecShdr->sh_addr)),
EFI_IMAGE_REL_BASED_DIR64);
break;
case R_X86_64_32S:
case R_X86_64_32:
VerboseMsg ("EFI_IMAGE_REL_BASED_HIGHLOW Offset: 0x%08X",
mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr));
CoffAddFixup(
(UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+ (Rel->r_offset - SecShdr->sh_addr)),
EFI_IMAGE_REL_BASED_HIGHLOW);
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_X86_64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
}
} else {
Error (NULL, 0, 3000, "Not Supported", "This tool does not support relocations for ELF with e_machine %u (processor type).", (unsigned) mEhdr->e_machine);
}
}
}
}
}
//
// Pad by adding empty entries.
//
while (mCoffOffset & (mCoffAlignment - 1)) {
CoffAddFixupEntry(0);
}
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);
Dir = &NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC];
Dir->Size = mCoffOffset - mRelocOffset;
if (Dir->Size == 0) {
// If no relocations, null out the directory entry and don't add the .reloc section
Dir->VirtualAddress = 0;
NtHdr->Pe32Plus.FileHeader.NumberOfSections--;
} else {
Dir->VirtualAddress = mRelocOffset;
CreateSectionHeader (".reloc", mRelocOffset, mCoffOffset - mRelocOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_DISCARDABLE
| EFI_IMAGE_SCN_MEM_READ);
}
}
STATIC
VOID
WriteDebug64 (
VOID
)
{
UINT32 Len;
UINT32 DebugOffset;
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
EFI_IMAGE_DATA_DIRECTORY *DataDir;
EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *Dir;
EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY *Nb10;
Len = strlen(mInImageName) + 1;
DebugOffset = mCoffOffset;
mCoffOffset += sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY)
+ sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY)
+ Len;
mCoffOffset = CoffAlign(mCoffOffset);
mCoffFile = realloc(mCoffFile, mCoffOffset);
memset(mCoffFile + DebugOffset, 0, mCoffOffset - DebugOffset);
Dir = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY*)(mCoffFile + DebugOffset);
Dir->Type = EFI_IMAGE_DEBUG_TYPE_CODEVIEW;
Dir->SizeOfData = sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY) + Len;
Dir->RVA = DebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
Dir->FileOffset = DebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
Nb10 = (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY*)(Dir + 1);
Nb10->Signature = CODEVIEW_SIGNATURE_NB10;
strcpy ((char *)(Nb10 + 1), mInImageName);
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);
DataDir = &NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_DEBUG];
DataDir->VirtualAddress = DebugOffset;
DataDir->Size = mCoffOffset - DebugOffset;
if (DataDir->Size == 0) {
// If no debug, null out the directory entry and don't add the .debug section
DataDir->VirtualAddress = 0;
NtHdr->Pe32Plus.FileHeader.NumberOfSections--;
} else {
DataDir->VirtualAddress = DebugOffset;
CreateSectionHeader (".debug", DebugOffset, mCoffOffset - DebugOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_DISCARDABLE
| EFI_IMAGE_SCN_MEM_READ);
}
}
STATIC
VOID
SetImageSize64 (
VOID
)
{
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
//
// Set image size
//
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);
NtHdr->Pe32Plus.OptionalHeader.SizeOfImage = mCoffOffset;
}
STATIC
VOID
CleanUp64 (
VOID
)
{
if (mCoffSectionsOffset != NULL) {
free (mCoffSectionsOffset);
}
}

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@@ -0,0 +1,24 @@
/** @file
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _ELF_64_CONVERT_
#define _ELF_64_CONVERT_
BOOLEAN
InitializeElf64 (
UINT8 *FileBuffer,
ELF_FUNCTION_TABLE *ElfFunctions
);
#endif

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@@ -0,0 +1,233 @@
/** @file
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "WinNtInclude.h"
#ifndef __GNUC__
#include <windows.h>
#include <io.h>
#endif
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <ctype.h>
#include <Common/UefiBaseTypes.h>
#include <IndustryStandard/PeImage.h>
#include "EfiUtilityMsgs.h"
#include "GenFw.h"
#include "ElfConvert.h"
#include "Elf32Convert.h"
#include "Elf64Convert.h"
//
// Result Coff file in memory.
//
UINT8 *mCoffFile = NULL;
//
// COFF relocation data
//
EFI_IMAGE_BASE_RELOCATION *mCoffBaseRel;
UINT16 *mCoffEntryRel;
//
// Current offset in coff file.
//
UINT32 mCoffOffset;
//
// Offset in Coff file of headers and sections.
//
UINT32 mTableOffset;
//
//*****************************************************************************
// Common ELF Functions
//*****************************************************************************
//
VOID
CoffAddFixupEntry(
UINT16 Val
)
{
*mCoffEntryRel = Val;
mCoffEntryRel++;
mCoffBaseRel->SizeOfBlock += 2;
mCoffOffset += 2;
}
VOID
CoffAddFixup(
UINT32 Offset,
UINT8 Type
)
{
if (mCoffBaseRel == NULL
|| mCoffBaseRel->VirtualAddress != (Offset & ~0xfff)) {
if (mCoffBaseRel != NULL) {
//
// Add a null entry (is it required ?)
//
CoffAddFixupEntry (0);
//
// Pad for alignment.
//
if (mCoffOffset % 4 != 0)
CoffAddFixupEntry (0);
}
mCoffFile = realloc (
mCoffFile,
mCoffOffset + sizeof(EFI_IMAGE_BASE_RELOCATION) + 2*0x1000
);
memset (
mCoffFile + mCoffOffset, 0,
sizeof(EFI_IMAGE_BASE_RELOCATION) + 2*0x1000
);
mCoffBaseRel = (EFI_IMAGE_BASE_RELOCATION*)(mCoffFile + mCoffOffset);
mCoffBaseRel->VirtualAddress = Offset & ~0xfff;
mCoffBaseRel->SizeOfBlock = sizeof(EFI_IMAGE_BASE_RELOCATION);
mCoffEntryRel = (UINT16 *)(mCoffBaseRel + 1);
mCoffOffset += sizeof(EFI_IMAGE_BASE_RELOCATION);
}
//
// Fill the entry.
//
CoffAddFixupEntry((UINT16) ((Type << 12) | (Offset & 0xfff)));
}
VOID
CreateSectionHeader (
const CHAR8 *Name,
UINT32 Offset,
UINT32 Size,
UINT32 Flags
)
{
EFI_IMAGE_SECTION_HEADER *Hdr;
Hdr = (EFI_IMAGE_SECTION_HEADER*)(mCoffFile + mTableOffset);
strcpy((char *)Hdr->Name, Name);
Hdr->Misc.VirtualSize = Size;
Hdr->VirtualAddress = Offset;
Hdr->SizeOfRawData = Size;
Hdr->PointerToRawData = Offset;
Hdr->PointerToRelocations = 0;
Hdr->PointerToLinenumbers = 0;
Hdr->NumberOfRelocations = 0;
Hdr->NumberOfLinenumbers = 0;
Hdr->Characteristics = Flags;
mTableOffset += sizeof (EFI_IMAGE_SECTION_HEADER);
}
//
//*****************************************************************************
// Functions called from GenFw main code.
//*****************************************************************************
//
INTN
IsElfHeader (
UINT8 *FileBuffer
)
{
return (FileBuffer[EI_MAG0] == ELFMAG0 &&
FileBuffer[EI_MAG1] == ELFMAG1 &&
FileBuffer[EI_MAG2] == ELFMAG2 &&
FileBuffer[EI_MAG3] == ELFMAG3);
}
BOOLEAN
ConvertElf (
UINT8 **FileBuffer,
UINT32 *FileLength
)
{
ELF_FUNCTION_TABLE ElfFunctions;
UINT8 EiClass;
//
// Determine ELF type and set function table pointer correctly.
//
VerboseMsg ("Check Efl Image Header");
EiClass = (*FileBuffer)[EI_CLASS];
if (EiClass == ELFCLASS32) {
if (!InitializeElf32 (*FileBuffer, &ElfFunctions)) {
return FALSE;
}
} else if (EiClass == ELFCLASS64) {
if (!InitializeElf64 (*FileBuffer, &ElfFunctions)) {
return FALSE;
}
} else {
Error (NULL, 0, 3000, "Unsupported", "ELF EI_CLASS not supported.");
return FALSE;
}
//
// Compute sections new address.
//
VerboseMsg ("Compute sections new address.");
ElfFunctions.ScanSections ();
//
// Write and relocate sections.
//
VerboseMsg ("Write and relocate sections.");
ElfFunctions.WriteSections (SECTION_TEXT);
ElfFunctions.WriteSections (SECTION_DATA);
ElfFunctions.WriteSections (SECTION_HII);
//
// Translate and write relocations.
//
VerboseMsg ("Translate and write relocations.");
ElfFunctions.WriteRelocations ();
//
// Write debug info.
//
VerboseMsg ("Write debug info.");
ElfFunctions.WriteDebug ();
//
// Make sure image size is correct before returning the new image.
//
VerboseMsg ("Set image size.");
ElfFunctions.SetImageSize ();
//
// Replace.
//
free (*FileBuffer);
*FileBuffer = mCoffFile;
*FileLength = mCoffOffset;
//
// Free resources used by ELF functions.
//
ElfFunctions.CleanUp ();
return TRUE;
}

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@@ -0,0 +1,82 @@
/** @file
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _ELF_CONVERT_H_
#define _ELF_CONVERT_H_
#include "elf_common.h"
#include "elf32.h"
#include "elf64.h"
//
// Externally defined variables
//
extern UINT32 mCoffOffset;
extern CHAR8 *mInImageName;
extern UINT32 mImageTimeStamp;
extern UINT8 *mCoffFile;
extern UINT32 mTableOffset;
//
// Common EFI specific data.
//
#define ELF_HII_SECTION_NAME ".hii"
//
// Filter Types
//
typedef enum {
SECTION_TEXT,
SECTION_HII,
SECTION_DATA
} SECTION_FILTER_TYPES;
//
// FunctionTalbe
//
typedef struct {
VOID (*ScanSections) ();
BOOLEAN (*WriteSections) (SECTION_FILTER_TYPES FilterType);
VOID (*WriteRelocations) ();
VOID (*WriteDebug) ();
VOID (*SetImageSize) ();
VOID (*CleanUp) ();
} ELF_FUNCTION_TABLE;
//
// Common functions
//
VOID
CoffAddFixup (
UINT32 Offset,
UINT8 Type
);
VOID
CoffAddFixupEntry (
UINT16 Val
);
VOID
CreateSectionHeader (
const CHAR8 *Name,
UINT32 Offset,
UINT32 Size,
UINT32 Flags
);
#endif

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenFw' module build.
#
# Copyright (c) 2009 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
@@ -15,7 +15,7 @@ MAKEROOT ?= ..
APPNAME = GenFw
OBJECTS = GenFw.o
OBJECTS = GenFw.o ElfConvert.o Elf32Convert.o Elf64Convert.o
include $(MAKEROOT)/Makefiles/app.makefile

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
@@ -51,10 +51,7 @@ Abstract:
#include "ParseInf.h"
#include "EfiUtilityMsgs.h"
#include "elf_common.h"
#include "elf32.h"
#include "elf64.h"
#include "GenFw.h"
//
// Version of this utility
@@ -68,22 +65,22 @@ Abstract:
//
// Action for this tool.
//
#define FW_DUMMY_IMAGE 0
#define FW_EFI_IMAGE 1
#define FW_TE_IMAGE 2
#define FW_ACPI_IMAGE 3
#define FW_BIN_IMAGE 4
#define FW_ZERO_DEBUG_IMAGE 5
#define FW_SET_STAMP_IMAGE 6
#define FW_MCI_IMAGE 7
#define FW_MERGE_IMAGE 8
#define FW_RELOC_STRIPEED_IMAGE 9
#define FW_HII_PACKAGE_LIST_RCIMAGE 10
#define FW_HII_PACKAGE_LIST_BINIMAGE 11
#define FW_REBASE_IMAGE 12
#define FW_SET_ADDRESS_IMAGE 13
#define FW_DUMMY_IMAGE 0
#define FW_EFI_IMAGE 1
#define FW_TE_IMAGE 2
#define FW_ACPI_IMAGE 3
#define FW_BIN_IMAGE 4
#define FW_ZERO_DEBUG_IMAGE 5
#define FW_SET_STAMP_IMAGE 6
#define FW_MCI_IMAGE 7
#define FW_MERGE_IMAGE 8
#define FW_RELOC_STRIPEED_IMAGE 9
#define FW_HII_PACKAGE_LIST_RCIMAGE 10
#define FW_HII_PACKAGE_LIST_BINIMAGE 11
#define FW_REBASE_IMAGE 12
#define FW_SET_ADDRESS_IMAGE 13
#define DUMP_TE_HEADER 0x11
#define DUMP_TE_HEADER 0x11
#define DEFAULT_MC_PAD_BYTE_VALUE 0xFF
#define DEFAULT_MC_ALIGNMENT 16
@@ -92,7 +89,7 @@ Abstract:
#define _MAX_PATH 500
#endif
#define STATUS_IGNORE 0xA
#define STATUS_IGNORE 0xA
//
// Structure definition for a microcode header
//
@@ -118,13 +115,13 @@ static const char *gHiiPackageRCFileHeader[] = {
NULL
};
STATIC CHAR8 *mInImageName;
//
// Module image information
//
STATIC UINT32 mImageTimeStamp = 0;
STATIC UINT32 mImageSize = 0;
CHAR8 *mInImageName;
UINT32 mImageTimeStamp = 0;
UINT32 mImageSize = 0;
STATIC
EFI_STATUS
@@ -472,186 +469,6 @@ Returns:
return STATUS_SUCCESS;
}
INTN
IsElfHeader(
UINT8 *FileBuffer
)
{
return (FileBuffer[EI_MAG0] == ELFMAG0
&& FileBuffer[EI_MAG1] == ELFMAG1
&& FileBuffer[EI_MAG2] == ELFMAG2
&& FileBuffer[EI_MAG3] == ELFMAG3);
}
typedef Elf32_Shdr Elf_Shdr;
typedef Elf32_Ehdr Elf_Ehdr;
typedef Elf32_Rel Elf_Rel;
typedef Elf32_Sym Elf_Sym;
typedef Elf32_Phdr Elf_Phdr;
typedef Elf32_Dyn Elf_Dyn;
#define ELFCLASS ELFCLASS32
#define ELF_R_TYPE(r) ELF32_R_TYPE(r)
#define ELF_R_SYM(r) ELF32_R_SYM(r)
#define ELF_HII_SECTION_NAME ".hii"
//
// Well known ELF structures.
//
Elf_Ehdr *Ehdr;
Elf_Shdr *ShdrBase;
Elf_Phdr *gPhdrBase;
//
// PE section alignment.
//
const UINT32 CoffAlignment = 0x20;
const UINT16 CoffNbrSections = 5;
//
// Current offset in coff file.
//
UINT32 CoffOffset;
//
// Result Coff file in memory.
//
UINT8 *CoffFile = NULL;
//
// ELF sections to offset in Coff file.
//
UINT32 *CoffSectionsOffset = NULL;
//
// Offset in Coff file of headers and sections.
//
UINT32 NtHdrOffset;
UINT32 TableOffset;
UINT32 TextOffset;
UINT32 DataOffset;
UINT32 HiiRsrcOffset;
UINT32 RelocOffset;
EFI_IMAGE_BASE_RELOCATION *CoffBaseRel;
UINT16 *CoffEntryRel;
UINT32
CoffAlign(
UINT32 Offset
)
{
return (Offset + CoffAlignment - 1) & ~(CoffAlignment - 1);
}
Elf_Shdr *
GetShdrByIndex(
UINT32 Num
)
{
if (Num >= Ehdr->e_shnum)
return NULL;
return (Elf_Shdr*)((UINT8*)ShdrBase + Num * Ehdr->e_shentsize);
}
INTN
CheckElfHeader(
VOID
)
{
//
// Note: Magic has already been tested.
//
if (Ehdr->e_ident[EI_CLASS] != ELFCLASS) {
Error (NULL, 0, 3000, "Unsupported", "%s needs to be ported for 64-bit ELF.", mInImageName);
return 0;
}
if (Ehdr->e_ident[EI_DATA] != ELFDATA2LSB) {
Error (NULL, 0, 3000, "Unsupported", "ELF EI_DATA not ELFDATA2LSB");
return 0;
}
if ((Ehdr->e_type != ET_EXEC) && (Ehdr->e_type != ET_DYN)) {
Error (NULL, 0, 3000, "Unsupported", "ELF e_type not ET_EXEC or ET_DYN");
return 0;
}
if (!((Ehdr->e_machine == EM_386) || (Ehdr->e_machine == EM_ARM))) {
Error (NULL, 0, 3000, "Unsupported", "ELF e_machine not EM_386 or EM_ARM");
return 0;
}
if (Ehdr->e_version != EV_CURRENT) {
Error (NULL, 0, 3000, "Unsupported", "ELF e_version (%u) not EV_CURRENT (%d)", (unsigned) Ehdr->e_version, EV_CURRENT);
return 0;
}
//
// Find the section header table
//
ShdrBase = (Elf_Shdr *)((UINT8 *)Ehdr + Ehdr->e_shoff);
gPhdrBase = (Elf_Phdr *)((UINT8 *)Ehdr + Ehdr->e_phoff);
CoffSectionsOffset = (UINT32 *)malloc(Ehdr->e_shnum * sizeof (UINT32));
memset(CoffSectionsOffset, 0, Ehdr->e_shnum * sizeof(UINT32));
return 1;
}
int
IsTextShdr(
Elf_Shdr *Shdr
)
{
return (Shdr->sh_flags & (SHF_WRITE | SHF_ALLOC)) == SHF_ALLOC;
}
int
IsHiiRsrcShdr(
Elf_Shdr *Shdr
)
{
Elf_Shdr *Namedr = GetShdrByIndex(Ehdr->e_shstrndx);
if (strcmp((CHAR8*)Ehdr + Namedr->sh_offset + Shdr->sh_name, ELF_HII_SECTION_NAME) == 0) {
return 1;
}
return 0;
}
int
IsDataShdr(
Elf_Shdr *Shdr
)
{
if (IsHiiRsrcShdr(Shdr)) {
return 0;
}
return (Shdr->sh_flags & (SHF_WRITE | SHF_ALLOC)) == (SHF_ALLOC | SHF_WRITE);
}
VOID
CreateSectionHeader(
const CHAR8 *Name,
UINT32 Offset,
UINT32 Size,
UINT32 Flags
)
{
EFI_IMAGE_SECTION_HEADER *Hdr;
Hdr = (EFI_IMAGE_SECTION_HEADER*)(CoffFile + TableOffset);
strcpy((char *)Hdr->Name, Name);
Hdr->Misc.VirtualSize = Size;
Hdr->VirtualAddress = Offset;
Hdr->SizeOfRawData = Size;
Hdr->PointerToRawData = Offset;
Hdr->PointerToRelocations = 0;
Hdr->PointerToLinenumbers = 0;
Hdr->NumberOfRelocations = 0;
Hdr->NumberOfLinenumbers = 0;
Hdr->Characteristics = Flags;
TableOffset += sizeof (EFI_IMAGE_SECTION_HEADER);
}
VOID
SetHiiResourceHeader (
UINT8 *HiiBinData,
@@ -712,708 +529,6 @@ SetHiiResourceHeader (
return;
}
VOID
ScanSections(
VOID
)
{
UINT32 i;
EFI_IMAGE_DOS_HEADER *DosHdr;
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
UINT32 CoffEntry;
CoffEntry = 0;
CoffOffset = 0;
//
// Coff file start with a DOS header.
//
CoffOffset = sizeof(EFI_IMAGE_DOS_HEADER) + 0x40;
NtHdrOffset = CoffOffset;
switch (Ehdr->e_machine) {
case EM_386:
case EM_ARM:
CoffOffset += sizeof (EFI_IMAGE_NT_HEADERS32);
break;
case EM_X86_64:
case EM_IA_64:
CoffOffset += sizeof (EFI_IMAGE_NT_HEADERS64);
break;
default:
VerboseMsg ("%s unknown e_machine type. Assume IA-32", (UINTN)Ehdr->e_machine);
CoffOffset += sizeof (EFI_IMAGE_NT_HEADERS32);
break;
}
TableOffset = CoffOffset;
CoffOffset += CoffNbrSections * sizeof(EFI_IMAGE_SECTION_HEADER);
//
// First text sections.
//
CoffOffset = CoffAlign(CoffOffset);
TextOffset = CoffOffset;
for (i = 0; i < Ehdr->e_shnum; i++) {
Elf_Shdr *shdr = GetShdrByIndex(i);
if (IsTextShdr(shdr)) {
if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
// the alignment field is valid
if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
CoffOffset = (CoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1);
} else if ((shdr->sh_addr % shdr->sh_addralign) != (CoffOffset % shdr->sh_addralign)) {
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
}
}
/* Relocate entry. */
if ((Ehdr->e_entry >= shdr->sh_addr) &&
(Ehdr->e_entry < shdr->sh_addr + shdr->sh_size)) {
CoffEntry = CoffOffset + Ehdr->e_entry - shdr->sh_addr;
}
CoffSectionsOffset[i] = CoffOffset;
CoffOffset += shdr->sh_size;
}
}
if (Ehdr->e_machine != EM_ARM) {
CoffOffset = CoffAlign(CoffOffset);
}
//
// Then data sections.
//
DataOffset = CoffOffset;
for (i = 0; i < Ehdr->e_shnum; i++) {
Elf_Shdr *shdr = GetShdrByIndex(i);
if (IsDataShdr(shdr)) {
if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
// the alignment field is valid
if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
CoffOffset = (CoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1);
} else if ((shdr->sh_addr % shdr->sh_addralign) != (CoffOffset % shdr->sh_addralign)) {
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
}
}
CoffSectionsOffset[i] = CoffOffset;
CoffOffset += shdr->sh_size;
}
}
CoffOffset = CoffAlign(CoffOffset);
//
// The HII resource sections.
//
HiiRsrcOffset = CoffOffset;
for (i = 0; i < Ehdr->e_shnum; i++) {
Elf_Shdr *shdr = GetShdrByIndex(i);
if (IsHiiRsrcShdr(shdr)) {
if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
// the alignment field is valid
if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
CoffOffset = (CoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1);
} else if ((shdr->sh_addr % shdr->sh_addralign) != (CoffOffset % shdr->sh_addralign)) {
// ARM RVCT tools have behavior outside of the ELF specification to try
// and make images smaller. If sh_addr is not aligned to sh_addralign
// then the section needs to preserve sh_addr MOD sh_addralign.
// Normally doing nothing here works great.
Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
}
}
if (shdr->sh_size != 0) {
CoffSectionsOffset[i] = CoffOffset;
CoffOffset += shdr->sh_size;
CoffOffset = CoffAlign(CoffOffset);
SetHiiResourceHeader ((UINT8*) Ehdr + shdr->sh_offset, HiiRsrcOffset);
}
break;
}
}
RelocOffset = CoffOffset;
//
// Allocate base Coff file. Will be expanded later for relocations.
//
CoffFile = (UINT8 *)malloc(CoffOffset);
memset(CoffFile, 0, CoffOffset);
//
// Fill headers.
//
DosHdr = (EFI_IMAGE_DOS_HEADER *)CoffFile;
DosHdr->e_magic = EFI_IMAGE_DOS_SIGNATURE;
DosHdr->e_lfanew = NtHdrOffset;
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION*)(CoffFile + NtHdrOffset);
NtHdr->Pe32.Signature = EFI_IMAGE_NT_SIGNATURE;
switch (Ehdr->e_machine) {
case EM_386:
NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_IA32;
NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
break;
case EM_X86_64:
NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;
NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
break;
case EM_IA_64:
NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_IPF;
NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
break;
case EM_ARM:
NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_ARMT;
NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
break;
default:
VerboseMsg ("%s unknown e_machine type. Assume IA-32", (UINTN)Ehdr->e_machine);
NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_IA32;
NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
}
NtHdr->Pe32.FileHeader.NumberOfSections = CoffNbrSections;
NtHdr->Pe32.FileHeader.TimeDateStamp = (UINT32) time(NULL);
mImageTimeStamp = NtHdr->Pe32.FileHeader.TimeDateStamp;
NtHdr->Pe32.FileHeader.PointerToSymbolTable = 0;
NtHdr->Pe32.FileHeader.NumberOfSymbols = 0;
NtHdr->Pe32.FileHeader.SizeOfOptionalHeader = sizeof(NtHdr->Pe32.OptionalHeader);
NtHdr->Pe32.FileHeader.Characteristics = EFI_IMAGE_FILE_EXECUTABLE_IMAGE
| EFI_IMAGE_FILE_LINE_NUMS_STRIPPED
| EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED
| EFI_IMAGE_FILE_32BIT_MACHINE;
NtHdr->Pe32.OptionalHeader.SizeOfCode = DataOffset - TextOffset;
NtHdr->Pe32.OptionalHeader.SizeOfInitializedData = RelocOffset - DataOffset;
NtHdr->Pe32.OptionalHeader.SizeOfUninitializedData = 0;
NtHdr->Pe32.OptionalHeader.AddressOfEntryPoint = CoffEntry;
NtHdr->Pe32.OptionalHeader.BaseOfCode = TextOffset;
NtHdr->Pe32.OptionalHeader.BaseOfData = DataOffset;
NtHdr->Pe32.OptionalHeader.ImageBase = 0;
NtHdr->Pe32.OptionalHeader.SectionAlignment = CoffAlignment;
NtHdr->Pe32.OptionalHeader.FileAlignment = CoffAlignment;
NtHdr->Pe32.OptionalHeader.SizeOfImage = 0;
NtHdr->Pe32.OptionalHeader.SizeOfHeaders = TextOffset;
NtHdr->Pe32.OptionalHeader.NumberOfRvaAndSizes = EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES;
//
// Section headers.
//
if ((DataOffset - TextOffset) > 0) {
CreateSectionHeader (".text", TextOffset, DataOffset - TextOffset,
EFI_IMAGE_SCN_CNT_CODE
| EFI_IMAGE_SCN_MEM_EXECUTE
| EFI_IMAGE_SCN_MEM_READ);
} else {
// Don't make a section of size 0.
NtHdr->Pe32.FileHeader.NumberOfSections--;
}
if ((HiiRsrcOffset - DataOffset) > 0) {
CreateSectionHeader (".data", DataOffset, HiiRsrcOffset - DataOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_WRITE
| EFI_IMAGE_SCN_MEM_READ);
} else {
// Don't make a section of size 0.
NtHdr->Pe32.FileHeader.NumberOfSections--;
}
if ((RelocOffset - HiiRsrcOffset) > 0) {
CreateSectionHeader (".rsrc", HiiRsrcOffset, RelocOffset - HiiRsrcOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_READ);
NtHdr->Pe32.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].Size = RelocOffset - HiiRsrcOffset;
NtHdr->Pe32.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].VirtualAddress = HiiRsrcOffset;
} else {
// Don't make a section of size 0.
NtHdr->Pe32.FileHeader.NumberOfSections--;
}
}
VOID
WriteSections(
int (*Filter)(Elf_Shdr *)
)
{
UINT32 Idx;
Elf_Shdr *SecShdr;
UINT32 SecOffset;
//
// First: copy sections.
//
for (Idx = 0; Idx < Ehdr->e_shnum; Idx++) {
Elf_Shdr *Shdr = GetShdrByIndex(Idx);
if ((*Filter)(Shdr)) {
switch (Shdr->sh_type) {
case SHT_PROGBITS:
/* Copy. */
memcpy(CoffFile + CoffSectionsOffset[Idx],
(UINT8*)Ehdr + Shdr->sh_offset,
Shdr->sh_size);
break;
case SHT_NOBITS:
memset(CoffFile + CoffSectionsOffset[Idx], 0, Shdr->sh_size);
break;
default:
//
// Ignore for unkown section type.
//
VerboseMsg ("%s unknown section type %x. We directly copy this section into Coff file", mInImageName, (unsigned)Shdr->sh_type);
break;
}
}
}
//
// Second: apply relocations.
//
for (Idx = 0; Idx < Ehdr->e_shnum; Idx++) {
Elf_Shdr *RelShdr = GetShdrByIndex(Idx);
if (RelShdr->sh_type != SHT_REL)
continue;
SecShdr = GetShdrByIndex(RelShdr->sh_info);
SecOffset = CoffSectionsOffset[RelShdr->sh_info];
if (RelShdr->sh_type == SHT_REL && (*Filter)(SecShdr)) {
UINT32 RelIdx;
Elf_Shdr *SymtabShdr = GetShdrByIndex(RelShdr->sh_link);
UINT8 *Symtab = (UINT8*)Ehdr + SymtabShdr->sh_offset;
for (RelIdx = 0; RelIdx < RelShdr->sh_size; RelIdx += RelShdr->sh_entsize) {
Elf_Rel *Rel = (Elf_Rel *)((UINT8*)Ehdr + RelShdr->sh_offset + RelIdx);
Elf_Sym *Sym = (Elf_Sym *)(Symtab + ELF_R_SYM(Rel->r_info) * SymtabShdr->sh_entsize);
Elf_Shdr *SymShdr;
UINT8 *Targ;
if (Sym->st_shndx == SHN_UNDEF
|| Sym->st_shndx == SHN_ABS
|| Sym->st_shndx > Ehdr->e_shnum) {
Error (NULL, 0, 3000, "Invalid", "%s bad symbol definition.", mInImageName);
}
SymShdr = GetShdrByIndex(Sym->st_shndx);
//
// Note: r_offset in a memory address.
// Convert it to a pointer in the coff file.
//
Targ = CoffFile + SecOffset + (Rel->r_offset - SecShdr->sh_addr);
if (Ehdr->e_machine == EM_386) {
switch (ELF_R_TYPE(Rel->r_info)) {
case R_386_NONE:
break;
case R_386_32:
//
// Absolute relocation.
//
*(UINT32 *)Targ = *(UINT32 *)Targ - SymShdr->sh_addr
+ CoffSectionsOffset[Sym->st_shndx];
break;
case R_386_PC32:
//
// Relative relocation: Symbol - Ip + Addend
//
*(UINT32 *)Targ = *(UINT32 *)Targ
+ (CoffSectionsOffset[Sym->st_shndx] - SymShdr->sh_addr)
- (SecOffset - SecShdr->sh_addr);
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_386 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
}
} else if (Ehdr->e_machine == EM_ARM) {
switch (ELF32_R_TYPE(Rel->r_info)) {
case R_ARM_RBASE: // No relocation - no action required
// Thease are all PC-relative relocations and don't require modification
case R_ARM_PC24:
case R_ARM_XPC25:
case R_ARM_THM_PC22:
case R_ARM_THM_JUMP19:
case R_ARM_CALL:
break;
case R_ARM_ABS32:
case R_ARM_RABS32:
//
// Absolute relocation.
//
*(UINT32 *)Targ = *(UINT32 *)Targ - SymShdr->sh_addr + CoffSectionsOffset[Sym->st_shndx];
break;
default:
Error (NULL, 0, 3000, "Invalid", "WriteSections (): %s unsupported ELF EM_ARM relocation 0x%x.", mInImageName, (unsigned) ELF32_R_TYPE(Rel->r_info));
}
}
}
}
}
}
VOID
CoffAddFixupEntry(
UINT16 Val
)
{
*CoffEntryRel = Val;
CoffEntryRel++;
CoffBaseRel->SizeOfBlock += 2;
CoffOffset += 2;
}
VOID
CoffAddFixup(
UINT32 Offset,
UINT8 Type
)
{
if (CoffBaseRel == NULL
|| CoffBaseRel->VirtualAddress != (Offset & ~0xfff)) {
if (CoffBaseRel != NULL) {
//
// Add a null entry (is it required ?)
//
CoffAddFixupEntry (0);
//
// Pad for alignment.
//
if (CoffOffset % 4 != 0)
CoffAddFixupEntry (0);
}
CoffFile = realloc
(CoffFile,
CoffOffset + sizeof(EFI_IMAGE_BASE_RELOCATION) + 2*0x1000);
memset(CoffFile + CoffOffset, 0,
sizeof(EFI_IMAGE_BASE_RELOCATION) + 2*0x1000);
CoffBaseRel = (EFI_IMAGE_BASE_RELOCATION*)(CoffFile + CoffOffset);
CoffBaseRel->VirtualAddress = Offset & ~0xfff;
CoffBaseRel->SizeOfBlock = sizeof(EFI_IMAGE_BASE_RELOCATION);
CoffEntryRel = (UINT16 *)(CoffBaseRel + 1);
CoffOffset += sizeof(EFI_IMAGE_BASE_RELOCATION);
}
//
// Fill the entry.
//
CoffAddFixupEntry((UINT16) ((Type << 12) | (Offset & 0xfff)));
}
Elf_Phdr *
GetPhdrByIndex (
UINT32 num
)
{
if (num >= Ehdr->e_phnum) {
return NULL;
}
return (Elf32_Phdr *)((UINT8*)gPhdrBase + num * Ehdr->e_phentsize);
}
VOID
WriteRelocations (
VOID
)
{
UINT32 Index;
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
EFI_IMAGE_DATA_DIRECTORY *Dir;
BOOLEAN FoundRelocations;
Elf_Dyn *Dyn;
Elf_Rel *Rel;
UINTN RelElementSize;
UINTN RelSize;
UINTN RelOffset;
UINTN K;
UINT8 *Targ;
Elf32_Phdr *DynamicSegment;
Elf32_Phdr *TargetSegment;
for (Index = 0, FoundRelocations = FALSE; Index < Ehdr->e_shnum; Index++) {
Elf_Shdr *RelShdr = GetShdrByIndex(Index);
if (RelShdr->sh_type == SHT_REL) {
Elf_Shdr *SecShdr = GetShdrByIndex(RelShdr->sh_info);
if (IsTextShdr(SecShdr) || IsDataShdr(SecShdr)) {
UINT32 RelIdx;
FoundRelocations = TRUE;
for (RelIdx = 0; RelIdx < RelShdr->sh_size; RelIdx += RelShdr->sh_entsize) {
Elf_Rel *Rel = (Elf_Rel *)
((UINT8*)Ehdr + RelShdr->sh_offset + RelIdx);
if (Ehdr->e_machine == EM_386) {
switch (ELF_R_TYPE(Rel->r_info)) {
case R_386_NONE:
case R_386_PC32:
break;
case R_386_32:
CoffAddFixup(CoffSectionsOffset[RelShdr->sh_info]
+ (Rel->r_offset - SecShdr->sh_addr),
EFI_IMAGE_REL_BASED_HIGHLOW);
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_386 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
}
} else if (Ehdr->e_machine == EM_ARM) {
switch (ELF32_R_TYPE(Rel->r_info)) {
case R_ARM_RBASE: // No relocation - no action required
// Thease are all PC-relative relocations and don't require modification
case R_ARM_PC24:
case R_ARM_XPC25:
case R_ARM_THM_PC22:
case R_ARM_THM_JUMP19:
case R_ARM_CALL:
break;
case R_ARM_ABS32:
case R_ARM_RABS32:
CoffAddFixup (
CoffSectionsOffset[RelShdr->sh_info]
+ (Rel->r_offset - SecShdr->sh_addr),
EFI_IMAGE_REL_BASED_HIGHLOW
);
break;
default:
Error (NULL, 0, 3000, "Invalid", "WriteRelocations(): %s unsupported ELF EM_ARM relocation 0x%x.", mInImageName, (unsigned) ELF32_R_TYPE(Rel->r_info));
}
} else {
Error (NULL, 0, 3000, "Not Supported", "This tool does not support relocations for ELF with e_machine %u (processor type).", (unsigned) Ehdr->e_machine);
}
}
}
}
}
if (!FoundRelocations && (Ehdr->e_machine == EM_ARM)) {
/* Try again, but look for PT_DYNAMIC instead of SHT_REL */
for (Index = 0; Index < Ehdr->e_phnum; Index++) {
RelElementSize = 0;
RelSize = 0;
RelOffset = 0;
DynamicSegment = GetPhdrByIndex (Index);
if (DynamicSegment->p_type == PT_DYNAMIC) {
Dyn = (Elf32_Dyn *) ((UINT8 *)Ehdr + DynamicSegment->p_offset);
while (Dyn->d_tag != DT_NULL) {
switch (Dyn->d_tag) {
case DT_REL:
RelOffset = Dyn->d_un.d_val;
break;
case DT_RELSZ:
RelSize = Dyn->d_un.d_val;
break;
case DT_RELENT:
RelElementSize = Dyn->d_un.d_val;
break;
default:
break;
}
Dyn++;
}
if (( RelOffset == 0 ) || ( RelSize == 0 ) || ( RelElementSize == 0 )) {
Error (NULL, 0, 3000, "Invalid", "%s bad ARM dynamic relocations.", mInImageName);
}
for (K = 0; K < RelSize; K += RelElementSize) {
if (DynamicSegment->p_paddr == 0) {
// This seems to be how it works on armcc???? Have the email in to find out?
Rel = (Elf32_Rel *) ((UINT8 *) Ehdr + DynamicSegment->p_offset + RelOffset + K);
} else {
// This is how it reads in the ELF specification
Rel = (Elf32_Rel *) ((UINT8 *) Ehdr + RelOffset + K);
}
switch (ELF32_R_TYPE (Rel->r_info)) {
case R_ARM_RBASE:
break;
case R_ARM_RABS32:
TargetSegment = GetPhdrByIndex (ELF32_R_SYM (Rel->r_info) - 1);
// Note: r_offset in a memory address. Convert it to a pointer in the coff file.
Targ = CoffFile + CoffSectionsOffset[ ELF32_R_SYM( Rel->r_info ) ] + Rel->r_offset - TargetSegment->p_vaddr;
*(UINT32 *)Targ = *(UINT32 *)Targ + CoffSectionsOffset [ELF32_R_SYM( Rel->r_info )];
CoffAddFixup (CoffSectionsOffset[ELF32_R_SYM (Rel->r_info)] + (Rel->r_offset - TargetSegment->p_vaddr), EFI_IMAGE_REL_BASED_HIGHLOW);
break;
default:
Error (NULL, 0, 3000, "Invalid", "%s bad ARM dynamic relocations, unkown type %d.", mInImageName, ELF32_R_TYPE (Rel->r_info));
break;
}
}
break;
}
}
}
//
// Pad by adding empty entries.
//
while (CoffOffset & (CoffAlignment - 1)) {
CoffAddFixupEntry(0);
}
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(CoffFile + NtHdrOffset);
Dir = &NtHdr->Pe32.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC];
Dir->Size = CoffOffset - RelocOffset;
if (Dir->Size == 0) {
// If no relocations, null out the directory entry and don't add the .reloc section
Dir->VirtualAddress = 0;
NtHdr->Pe32.FileHeader.NumberOfSections--;
} else {
Dir->VirtualAddress = RelocOffset;
CreateSectionHeader (".reloc", RelocOffset, CoffOffset - RelocOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_DISCARDABLE
| EFI_IMAGE_SCN_MEM_READ);
}
}
VOID
WriteDebug(
VOID
)
{
UINT32 Len;
UINT32 DebugOffset;
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
EFI_IMAGE_DATA_DIRECTORY *DataDir;
EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *Dir;
EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY *Nb10;
Len = strlen(mInImageName) + 1;
DebugOffset = CoffOffset;
CoffOffset += sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY)
+ sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY)
+ Len;
CoffOffset = CoffAlign(CoffOffset);
CoffFile = realloc(CoffFile, CoffOffset);
memset(CoffFile + DebugOffset, 0, CoffOffset - DebugOffset);
Dir = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY*)(CoffFile + DebugOffset);
Dir->Type = EFI_IMAGE_DEBUG_TYPE_CODEVIEW;
Dir->SizeOfData = sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY) + Len;
Dir->RVA = DebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
Dir->FileOffset = DebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
Nb10 = (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY*)(Dir + 1);
Nb10->Signature = CODEVIEW_SIGNATURE_NB10;
strcpy ((char *)(Nb10 + 1), mInImageName);
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(CoffFile + NtHdrOffset);
DataDir = &NtHdr->Pe32.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_DEBUG];
DataDir->VirtualAddress = DebugOffset;
DataDir->Size = CoffOffset - DebugOffset;
if (DataDir->Size == 0) {
// If no debug, null out the directory entry and don't add the .debug section
DataDir->VirtualAddress = 0;
NtHdr->Pe32.FileHeader.NumberOfSections--;
} else {
DataDir->VirtualAddress = DebugOffset;
CreateSectionHeader (".debug", DebugOffset, CoffOffset - DebugOffset,
EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
| EFI_IMAGE_SCN_MEM_DISCARDABLE
| EFI_IMAGE_SCN_MEM_READ);
}
}
VOID
ConvertElf (
UINT8 **FileBuffer,
UINT32 *FileLength
)
{
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
//
// Check header, read section table.
//
Ehdr = (Elf32_Ehdr*)*FileBuffer;
if (!CheckElfHeader())
return;
VerboseMsg ("Check Efl Image Header");
//
// Compute sections new address.
//
ScanSections();
VerboseMsg ("Compute sections new address.");
//
// Write and relocate sections.
//
WriteSections(IsTextShdr);
WriteSections(IsDataShdr);
WriteSections(IsHiiRsrcShdr);
VerboseMsg ("Write and relocate sections.");
//
// Translate and write relocations.
//
WriteRelocations();
VerboseMsg ("Translate and write relocations.");
//
// Write debug info.
//
WriteDebug();
VerboseMsg ("Write debug info.");
NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(CoffFile + NtHdrOffset);
NtHdr->Pe32.OptionalHeader.SizeOfImage = CoffOffset;
//
// Replace.
//
free(*FileBuffer);
*FileBuffer = CoffFile;
*FileLength = CoffOffset;
//
// Free memory space
//
if (CoffSectionsOffset != NULL) {
free (CoffSectionsOffset);
}
}
EFI_IMAGE_OPTIONAL_HEADER_UNION *
GetPeCoffHeader (
void *Data
@@ -2935,8 +2050,11 @@ Returns:
// Convert EFL image to PeImage
//
if (IsElfHeader(FileBuffer)) {
VerboseMsg ("Convert the input ELF Image to Pe Image");
ConvertElf(&FileBuffer, &FileLength);
VerboseMsg ("Convert %s from ELF to PE/COFF.", mInImageName);
if (!ConvertElf(&FileBuffer, &FileLength)) {
Error (NULL, 0, 3000, "Invalid", "Unable to convert %s from ELF to PE/COFF.", mInImageName);
goto Finish;
}
}
//

View File

@@ -0,0 +1,35 @@
/** @file
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _GEN_FW_H_
#define _GEN_FW_H_
VOID
SetHiiResourceHeader (
UINT8 *HiiBinData,
UINT32 OffsetToFile
);
INTN
IsElfHeader (
UINT8 *FileBuffer
);
BOOLEAN
ConvertElf (
UINT8 **FileBuffer,
UINT32 *FileLength
);
#endif

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenFw' module build.
#
# Copyright (c) 2009 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
@@ -16,7 +16,7 @@ APPNAME = GenFw
LIBS = $(LIB_PATH)\Common.lib
OBJECTS = GenFw.obj
OBJECTS = GenFw.obj ElfConvert.obj Elf32Convert.obj Elf64Convert.obj
#CFLAGS = $(CFLAGS) /nodefaultlib:libc.lib

View File

@@ -1,8 +1,8 @@
/** @file
Ported ELF include files from FreeBSD
Copyright (c) 2009 - 2010, Apple, Inc. All rights reserved.
All rights reserved. This program and the accompanying materials
Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
/** @file
Ported ELF include files from FreeBSD
Copyright (c) 2009 - 2010, Apple, Inc. All rights reserved.
All rights reserved. This program and the accompanying materials
Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
/** @file
Ported ELF include files from FreeBSD
Copyright (c) 2009 - 2010, Apple, Inc. All rights reserved.
All rights reserved. This program and the accompanying materials
Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
@@ -597,7 +597,11 @@ typedef struct {
#define R_ARM_GOTPC 25 /* Add PC-relative GOT table address. */
#define R_ARM_GOT32 26 /* Add PC-relative GOT offset. */
#define R_ARM_PLT32 27 /* Add PC-relative PLT offset. */
#define R_ARM_CALL 28
#define R_ARM_CALL 28
#define R_ARM_JMP24 29
#define R_ARM_THM_MOVW_ABS_NC 47
#define R_ARM_THM_MOVT_ABS 48
#define R_ARM_THM_JUMP19 51
#define R_ARM_GNU_VTENTRY 100
#define R_ARM_GNU_VTINHERIT 101

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenPage' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright 2006 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenPage' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenSec' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2004 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenSec' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenVtf' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,6 +1,6 @@
/**
Copyright (c) 1999-2010 Intel Corporation. All rights reserved
Copyright (c) 1999 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 1999-2008 Intel Corporation. All rights reserved
Copyright (c) 1999 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GenVtf' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -2,8 +2,8 @@
Fat file system structure and definition.
Copyright 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -1,8 +1,8 @@
## @file
# Windows makefile for 'GnuGenBootSector' module build.
#
# Copyright (c) 2009 - 2010, Intel Corporation<BR>
# All rights reserved. This program and the accompanying materials
# Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php

View File

@@ -1,7 +1,7 @@
/** @file
Copyright 2006 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php

View File

@@ -3,8 +3,8 @@
This file is stand alone self consistent set of definitions.
Copyright (c) 2006, Intel Corporation
All rights reserved. This program and the accompanying materials
Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
@@ -220,4 +220,69 @@ typedef INTN RETURN_STATUS;
typedef UINT64 PHYSICAL_ADDRESS;
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
#define BIT3 0x00000008
#define BIT4 0x00000010
#define BIT5 0x00000020
#define BIT6 0x00000040
#define BIT7 0x00000080
#define BIT8 0x00000100
#define BIT9 0x00000200
#define BIT10 0x00000400
#define BIT11 0x00000800
#define BIT12 0x00001000
#define BIT13 0x00002000
#define BIT14 0x00004000
#define BIT15 0x00008000
#define BIT16 0x00010000
#define BIT17 0x00020000
#define BIT18 0x00040000
#define BIT19 0x00080000
#define BIT20 0x00100000
#define BIT21 0x00200000
#define BIT22 0x00400000
#define BIT23 0x00800000
#define BIT24 0x01000000
#define BIT25 0x02000000
#define BIT26 0x04000000
#define BIT27 0x08000000
#define BIT28 0x10000000
#define BIT29 0x20000000
#define BIT30 0x40000000
#define BIT31 0x80000000
#define BIT32 0x0000000100000000ULL
#define BIT33 0x0000000200000000ULL
#define BIT34 0x0000000400000000ULL
#define BIT35 0x0000000800000000ULL
#define BIT36 0x0000001000000000ULL
#define BIT37 0x0000002000000000ULL
#define BIT38 0x0000004000000000ULL
#define BIT39 0x0000008000000000ULL
#define BIT40 0x0000010000000000ULL
#define BIT41 0x0000020000000000ULL
#define BIT42 0x0000040000000000ULL
#define BIT43 0x0000080000000000ULL
#define BIT44 0x0000100000000000ULL
#define BIT45 0x0000200000000000ULL
#define BIT46 0x0000400000000000ULL
#define BIT47 0x0000800000000000ULL
#define BIT48 0x0001000000000000ULL
#define BIT49 0x0002000000000000ULL
#define BIT50 0x0004000000000000ULL
#define BIT51 0x0008000000000000ULL
#define BIT52 0x0010000000000000ULL
#define BIT53 0x0020000000000000ULL
#define BIT54 0x0040000000000000ULL
#define BIT55 0x0080000000000000ULL
#define BIT56 0x0100000000000000ULL
#define BIT57 0x0200000000000000ULL
#define BIT58 0x0400000000000000ULL
#define BIT59 0x0800000000000000ULL
#define BIT60 0x1000000000000000ULL
#define BIT61 0x2000000000000000ULL
#define BIT62 0x4000000000000000ULL
#define BIT63 0x8000000000000000ULL
#endif

View File

@@ -1,7 +1,7 @@
/** @file
EDK II specific HII relative definition.
Copyright (c) 2006 - 2007, Intel Corporation All rights reserved.
Copyright (c) 2006 - 2007, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this

View File

@@ -1,7 +1,7 @@
/** @file
The firmware file related definitions in PI.
Copyright (c) 2006 - 2008, Intel Corporation All rights reserved.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this

View File

@@ -1,7 +1,7 @@
/** @file
The firmware volume related definitions in PI.
Copyright (c) 2006 - 2008, Intel Corporation All rights reserved.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this

View File

@@ -1,7 +1,7 @@
/** @file
Defines data types and constants introduced in UEFI.
Copyright (c) 2006 - 2007, Intel Corporation All rights reserved.
Copyright (c) 2006 - 2007, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this

View File

@@ -1,7 +1,7 @@
/** @file
Defines for the EFI Capsule functionality.
Copyright (c) 2006 - 2009, Intel Corporation All rights reserved.
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this

View File

@@ -3,7 +3,7 @@
IFR is primarily consumed by the EFI presentation engine, and produced by EFI
internal application and drivers as well as all add-in card option-ROM drivers
Copyright (c) 2006 - 2010, Intel Corporation All rights reserved.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this

View File

@@ -1,7 +1,7 @@
/** @file
This includes some definitions introduced in UEFI that will be used in both PEI and DXE phases.
Copyright (c) 2006 - 2008, Intel Corporation All rights reserved.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this

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