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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8709 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -41,15 +41,15 @@ typedef struct _EFI_SMM_CONTROL_PROTOCOL EFI_SMM_CONTROL_PROTOCOL;
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// SMM Access specification Data Structures
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//
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typedef struct {
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///
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/// Describes the I/O location of the particular port that engendered the synchronous
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/// SMI. For example, this location can include but is not limited to the traditional
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/// PCAT* APM port of 0B2h.
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///
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///
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/// Describes the I/O location of the particular port that engendered the synchronous
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/// SMI. For example, this location can include but is not limited to the traditional
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/// PCAT* APM port of 0B2h.
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///
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UINT8 SmiTriggerRegister;
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///
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/// Describes the value that was written to the respective activation port.
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///
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///
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/// Describes the value that was written to the respective activation port.
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///
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UINT8 SmiDataRegister;
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} EFI_SMM_CONTROL_REGISTER;
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@@ -108,8 +108,8 @@ EFI_STATUS
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@param SmiRegister Pointer to the SMI register description structure
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@retval EFI_SUCCESS The register structure has been returned.
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@retval EFI_DEVICE_ERROR The source could not be cleared.
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@retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
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@retval EFI_DEVICE_ERROR The source could not be cleared.
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@retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
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**/
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typedef
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@@ -135,20 +135,20 @@ EFI_STATUS
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@param MinimumTriggerPeriod
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Minimum interval at which the platform can set the period.
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@retval EFI_SUCCESS The register structure has been returned.
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@retval EFI_SUCCESS The register structure has been returned.
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**/
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//
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// SMM Control Protocol
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//
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/**
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This protocol is used initiate SMI/PMI activations.
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This protocol could be published by either of the following:
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- A processor driver to abstract the SMI/PMI IPI
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- The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel<65> chipset
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Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this
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This protocol is used initiate SMI/PMI activations.
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This protocol could be published by either of the following:
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- A processor driver to abstract the SMI/PMI IPI
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- The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel<65> chipset
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Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this
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The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This
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The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This
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protocol is useable both in boot services and runtime. The runtime aspect is so that an
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implementation of EFI_SMM_BASE_PROTOCOL.Communicate() can layer upon this service
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and provide an SMI callback from a general EFI runtime driver.
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@@ -156,24 +156,24 @@ EFI_STATUS
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SMI or PMI. There are often I/O ports that, when accessed, will engender the
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**/
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struct _EFI_SMM_CONTROL_PROTOCOL {
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///
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/// Initiates the SMI/PMI activation.
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///
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///
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/// Initiates the SMI/PMI activation.
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///
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EFI_SMM_ACTIVATE Trigger;
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///
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/// Quiesces the SMI/PMI activation.
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///
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///
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/// Quiesces the SMI/PMI activation.
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///
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EFI_SMM_DEACTIVATE Clear;
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///
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/// Provides data on the register used as the source of the SMI.
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///
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///
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/// Provides data on the register used as the source of the SMI.
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///
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EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;
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///
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/// Minimum interval at which the platform can set the period. A maximum is not
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/// specified in that the SMM infrastructure code can emulate a maximum interval that is
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/// greater than the hardware capabilities by using software emulation in the SMM
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/// infrastructure code.
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///
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///
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/// Minimum interval at which the platform can set the period. A maximum is not
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/// specified in that the SMM infrastructure code can emulate a maximum interval that is
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/// greater than the hardware capabilities by using software emulation in the SMM
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/// infrastructure code.
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///
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UINTN MinimumTriggerPeriod;
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};
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