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ArmPkg: Apply uncrustify changes

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the ArmPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
This commit is contained in:
Michael Kubacki
2021-12-05 14:53:50 -08:00
committed by mergify[bot]
parent 7c2a6033c1
commit 429309e0c6
142 changed files with 6020 additions and 5216 deletions
Download Patch File Download Diff File Expand all files Collapse all files

88
ArmPkg/Include/IndustryStandard/ArmStdSmc.h
View File

@@ -17,64 +17,64 @@
* SMC function IDs for Standard Service queries
*/
#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00
#define ARM_SMC_ID_STD_UID 0x8400ff01
#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00
#define ARM_SMC_ID_STD_UID 0x8400ff01
/* 0x8400ff02 is reserved */
#define ARM_SMC_ID_STD_REVISION 0x8400ff03
#define ARM_SMC_ID_STD_REVISION 0x8400ff03
/*
* The 'Standard Service Call UID' is supposed to return the Standard
* Service UUID. This is a 128-bit value.
*/
#define ARM_SMC_STD_UUID0 0x108d905b
#define ARM_SMC_STD_UUID1 0x47e8f863
#define ARM_SMC_STD_UUID2 0xfbc02dae
#define ARM_SMC_STD_UUID3 0xe2f64156
#define ARM_SMC_STD_UUID0 0x108d905b
#define ARM_SMC_STD_UUID1 0x47e8f863
#define ARM_SMC_STD_UUID2 0xfbc02dae
#define ARM_SMC_STD_UUID3 0xe2f64156
/*
* ARM Standard Service Calls revision numbers
* The current revision is: 0.1
*/
#define ARM_SMC_STD_REVISION_MAJOR 0x0
#define ARM_SMC_STD_REVISION_MINOR 0x1
#define ARM_SMC_STD_REVISION_MAJOR 0x0
#define ARM_SMC_STD_REVISION_MINOR 0x1
/*
* Management Mode (MM) calls cover a subset of the Standard Service Call range.
* The list below is not exhaustive.
*/
#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040
#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040
#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040
#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040
// Request service from secure standalone MM environment
#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041
#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041
#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041
#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041
/* Generic ID when using AArch32 or AArch64 execution state */
#ifdef MDE_CPU_AARCH64
#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH64
#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH64
#endif
#ifdef MDE_CPU_ARM
#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH32
#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH32
#endif
/* MM return error codes */
#define ARM_SMC_MM_RET_SUCCESS 0
#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
#define ARM_SMC_MM_RET_INVALID_PARAMS -2
#define ARM_SMC_MM_RET_DENIED -3
#define ARM_SMC_MM_RET_NO_MEMORY -4
#define ARM_SMC_MM_RET_SUCCESS 0
#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
#define ARM_SMC_MM_RET_INVALID_PARAMS -2
#define ARM_SMC_MM_RET_DENIED -3
#define ARM_SMC_MM_RET_NO_MEMORY -4
// ARM Architecture Calls
#define SMCCC_VERSION 0x80000000
#define SMCCC_ARCH_FEATURES 0x80000001
#define SMCCC_ARCH_SOC_ID 0x80000002
#define SMCCC_ARCH_WORKAROUND_1 0x80008000
#define SMCCC_ARCH_WORKAROUND_2 0x80007FFF
#define SMCCC_VERSION 0x80000000
#define SMCCC_ARCH_FEATURES 0x80000001
#define SMCCC_ARCH_SOC_ID 0x80000002
#define SMCCC_ARCH_WORKAROUND_1 0x80008000
#define SMCCC_ARCH_WORKAROUND_2 0x80007FFF
#define SMC_ARCH_CALL_SUCCESS 0
#define SMC_ARCH_CALL_NOT_SUPPORTED -1
#define SMC_ARCH_CALL_NOT_REQUIRED -2
#define SMC_ARCH_CALL_INVALID_PARAMETER -3
#define SMC_ARCH_CALL_NOT_SUPPORTED -1
#define SMC_ARCH_CALL_NOT_REQUIRED -2
#define SMC_ARCH_CALL_INVALID_PARAMETER -3
/*
* Power State Coordination Interface (PSCI) calls cover a subset of the
@@ -101,15 +101,15 @@
((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)
/* PSCI return error codes */
#define ARM_SMC_PSCI_RET_SUCCESS 0
#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1
#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2
#define ARM_SMC_PSCI_RET_DENIED -3
#define ARM_SMC_PSCI_RET_ALREADY_ON -4
#define ARM_SMC_PSCI_RET_ON_PENDING -5
#define ARM_SMC_PSCI_RET_INTERN_FAIL -6
#define ARM_SMC_PSCI_RET_NOT_PRESENT -7
#define ARM_SMC_PSCI_RET_DISABLED -8
#define ARM_SMC_PSCI_RET_SUCCESS 0
#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1
#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2
#define ARM_SMC_PSCI_RET_DENIED -3
#define ARM_SMC_PSCI_RET_ALREADY_ON -4
#define ARM_SMC_PSCI_RET_ON_PENDING -5
#define ARM_SMC_PSCI_RET_INTERN_FAIL -6
#define ARM_SMC_PSCI_RET_NOT_PRESENT -7
#define ARM_SMC_PSCI_RET_DISABLED -8
#define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \
((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
@@ -120,10 +120,10 @@
#define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId) ((TargetId) & 0xFF)
#define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId) (((TargetId) >> 8) & 0xFF)
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3
#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0
#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1
@@ -132,9 +132,9 @@
/*
* SMC function IDs for Trusted OS Service queries
*/
#define ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00
#define ARM_SMC_ID_TOS_UID 0xbf00ff01
#define ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00
#define ARM_SMC_ID_TOS_UID 0xbf00ff01
/* 0xbf00ff02 is reserved */
#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03
#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03
#endif // ARM_STD_SMC_H_