ArmPkg: Apply uncrustify changes

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the ArmPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>

ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.c

@@ -24,9 +24,11 @@ ArmCrashDumpDxeInitialize (
   EFI_STATUS  Status;
 
   Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
-  ASSERT_EFI_ERROR(Status);
+  ASSERT_EFI_ERROR (Status);
 
-  return mCpu->RegisterInterruptHandler (mCpu,
+  return mCpu->RegisterInterruptHandler (
+                 mCpu,
                  EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS,
-                                         &DefaultExceptionHandler);
+                 &DefaultExceptionHandler
+                 );
 }

ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c

@@ -33,7 +33,6 @@ UINTN mGicNumInterrupts                 = 0;
 
 HARDWARE_INTERRUPT_HANDLER  *gRegisteredInterruptHandlers = NULL;
 
-
 /**
   Calculate GICD_ICFGRn base address and corresponding bit
   field Int_config[1] of the GIC distributor register.
@@ -56,7 +55,7 @@ GicGetDistributorIcfgBaseAndBit (
   UINTN  Field;
 
   if (Source >= mGicNumInterrupts) {
-    ASSERT(Source < mGicNumInterrupts);
+    ASSERT (Source < mGicNumInterrupts);
     return EFI_UNSUPPORTED;
   }
 
@@ -71,8 +70,6 @@ GicGetDistributorIcfgBaseAndBit (
   return EFI_SUCCESS;
 }
 
-
-
 /**
   Register Handler for the specified interrupt source.
 
@@ -93,7 +90,7 @@ RegisterInterruptSource (
   )
 {
   if (Source >= mGicNumInterrupts) {
-    ASSERT(FALSE);
+    ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
 
@@ -108,7 +105,7 @@ RegisterInterruptSource (
   gRegisteredInterruptHandlers[Source] = Handler;
 
   // If the interrupt handler is unregistered then disable the interrupt
-  if (NULL == Handler){
+  if (NULL == Handler) {
     return This->DisableInterruptSource (This, Source);
   } else {
     return This->EnableInterruptSource (This, Source);
@@ -137,17 +134,28 @@ CpuArchEventProtocolNotify (
   // Unregister the default exception handler.
   Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
+    DEBUG ((
-      __FUNCTION__, Status));
+      DEBUG_ERROR,
+      "%a: Cpu->RegisterInterruptHandler() - %r\n",
+      __FUNCTION__,
+      Status
+      ));
     return;
   }
 
   // Register to receive interrupts
-  Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ,
+  Status = Cpu->RegisterInterruptHandler (
-                  Context);
+                  Cpu,
+                  ARM_ARCH_EXCEPTION_IRQ,
+                  Context
+                  );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
+    DEBUG ((
-      __FUNCTION__, Status));
+      DEBUG_ERROR,
+      "%a: Cpu->RegisterInterruptHandler() - %r\n",
+      __FUNCTION__,
+      Status
+      ));
   }
 
   gBS->CloseEvent (Event);
@@ -163,7 +171,7 @@ InstallAndRegisterInterruptService (
 {
   EFI_STATUS   Status;
   CONST UINTN  RihArraySize =
-    (sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
+    (sizeof (HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
 
   // Initialize the array for the Interrupt Handlers
   gRegisteredInterruptHandlers = AllocateZeroPool (RihArraySize);
@@ -191,7 +199,8 @@ InstallAndRegisterInterruptService (
     TPL_CALLBACK,
     CpuArchEventProtocolNotify,
     InterruptHandler,
-    &mCpuArchProtocolNotifyEventRegistration);
+    &mCpuArchProtocolNotifyEventRegistration
+    );
 
   // Register for an ExitBootServicesEvent
   Status = gBS->CreateEvent (

ArmPkg/Drivers/ArmGic/ArmGicDxe.h

@@ -55,7 +55,6 @@ GicV3DxeInitialize (
   IN EFI_SYSTEM_TABLE  *SystemTable
   );
 
-
 // Shared code
 
 /**

ArmPkg/Drivers/ArmGic/ArmGicLib.c

@@ -24,13 +24,13 @@
                                            + ARM_GICR_SGI_VLPI_FRAME_SIZE     \
                                            + ARM_GICR_SGI_RESERVED_FRAME_SIZE)
 
-#define ISENABLER_ADDRESS(base,offset) ((base) + \
+#define ISENABLER_ADDRESS(base, offset)  ((base) +\
           ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + 4 * (offset))
 
-#define ICENABLER_ADDRESS(base,offset) ((base) + \
+#define ICENABLER_ADDRESS(base, offset)  ((base) +\
           ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + 4 * (offset))
 
-#define IPRIORITY_ADDRESS(base,offset) ((base) + \
+#define IPRIORITY_ADDRESS(base, offset)  ((base) +\
           ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDIPR + 4 * (offset))
 
 /**
@@ -230,7 +230,8 @@ ArmGicSetInterruptPriority (
   Revision = ArmGicGetSupportedArchRevision ();
   if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
       FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
-      SourceIsSpi (Source)) {
+      SourceIsSpi (Source))
+  {
     MmioAndThenOr32 (
       GicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
       ~(0xff << RegShift),
@@ -273,7 +274,8 @@ ArmGicEnableInterrupt (
   Revision = ArmGicGetSupportedArchRevision ();
   if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
       FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
-      SourceIsSpi (Source)) {
+      SourceIsSpi (Source))
+  {
     // Write set-enable register
     MmioWrite32 (
       GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset),
@@ -291,7 +293,7 @@ ArmGicEnableInterrupt (
 
     // Write set-enable register
     MmioWrite32 (
-      ISENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset),
+      ISENABLER_ADDRESS (GicCpuRedistributorBase, RegOffset),
       1 << RegShift
       );
   }
@@ -317,7 +319,8 @@ ArmGicDisableInterrupt (
   Revision = ArmGicGetSupportedArchRevision ();
   if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
       FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
-      SourceIsSpi (Source)) {
+      SourceIsSpi (Source))
+  {
     // Write clear-enable register
     MmioWrite32 (
       GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset),
@@ -334,7 +337,7 @@ ArmGicDisableInterrupt (
 
     // Write clear-enable register
     MmioWrite32 (
-      ICENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset),
+      ICENABLER_ADDRESS (GicCpuRedistributorBase, RegOffset),
       1 << RegShift
       );
   }
@@ -361,7 +364,8 @@ ArmGicIsInterruptEnabled (
   Revision = ArmGicGetSupportedArchRevision ();
   if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
       FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
-      SourceIsSpi (Source)) {
+      SourceIsSpi (Source))
+  {
     Interrupts = ((MmioRead32 (
                      GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)
                      )
@@ -377,7 +381,7 @@ ArmGicIsInterruptEnabled (
 
     // Read set-enable register
     Interrupts = MmioRead32 (
-                   ISENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset)
+                   ISENABLER_ADDRESS (GicCpuRedistributorBase, RegOffset)
                    );
   }
 

ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c

@@ -47,7 +47,7 @@ GicV2EnableInterruptSource (
   )
 {
   if (Source >= mGicNumInterrupts) {
-    ASSERT(FALSE);
+    ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
 
@@ -75,7 +75,7 @@ GicV2DisableInterruptSource (
   )
 {
   if (Source >= mGicNumInterrupts) {
-    ASSERT(FALSE);
+    ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
 
@@ -105,7 +105,7 @@ GicV2GetInterruptSourceState (
   )
 {
   if (Source >= mGicNumInterrupts) {
-    ASSERT(FALSE);
+    ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
 
@@ -134,7 +134,7 @@ GicV2EndOfInterrupt (
   )
 {
   if (Source >= mGicNumInterrupts) {
-    ASSERT(FALSE);
+    ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
 
@@ -261,9 +261,13 @@ GicV2SetTriggerType (
   BOOLEAN     SourceEnabled;
 
   if (  (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
-      && (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
+     && (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH))
-          DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
+  {
-                  TriggerType));
+    DEBUG ((
+      DEBUG_ERROR,
+      "Invalid interrupt trigger type: %d\n", \
+      TriggerType
+      ));
     ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
@@ -279,7 +283,7 @@ GicV2SetTriggerType (
   }
 
   Status = GicV2GetInterruptSourceState (
-             (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+             (EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
              Source,
              &SourceEnabled
              );
@@ -296,7 +300,7 @@ GicV2SetTriggerType (
   // otherwise GIC behavior is UNPREDICTABLE.
   if (SourceEnabled) {
     GicV2DisableInterruptSource (
-      (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+      (EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
       Source
       );
   }
@@ -310,7 +314,7 @@ GicV2SetTriggerType (
   // Restore interrupt state
   if (SourceEnabled) {
     GicV2EnableInterruptSource (
-      (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+      (EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
       Source
       );
   }

ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c

@@ -10,7 +10,6 @@
 #include <Library/IoLib.h>
 #include <Library/ArmGicLib.h>
 
-
 VOID
 EFIAPI
 ArmGicV2EnableInterruptInterface (

ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c

@@ -37,7 +37,7 @@ GicV3EnableInterruptSource (
   )
 {
   if (Source >= mGicNumInterrupts) {
-    ASSERT(FALSE);
+    ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
 
@@ -65,7 +65,7 @@ GicV3DisableInterruptSource (
   )
 {
   if (Source >= mGicNumInterrupts) {
-    ASSERT(FALSE);
+    ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
 
@@ -95,7 +95,7 @@ GicV3GetInterruptSourceState (
   )
 {
   if (Source >= mGicNumInterrupts) {
-    ASSERT(FALSE);
+    ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
 
@@ -128,7 +128,7 @@ GicV3EndOfInterrupt (
   )
 {
   if (Source >= mGicNumInterrupts) {
-    ASSERT(FALSE);
+    ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
 
@@ -255,9 +255,13 @@ GicV3SetTriggerType (
   BOOLEAN     SourceEnabled;
 
   if (  (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
-      && (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
+     && (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH))
-          DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
+  {
-                 TriggerType));
+    DEBUG ((
+      DEBUG_ERROR,
+      "Invalid interrupt trigger type: %d\n", \
+      TriggerType
+      ));
     ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
@@ -273,7 +277,7 @@ GicV3SetTriggerType (
   }
 
   Status = GicV3GetInterruptSourceState (
-             (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+             (EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
              Source,
              &SourceEnabled
              );
@@ -290,7 +294,7 @@ GicV3SetTriggerType (
   // otherwise GIC behavior is UNPREDICTABLE.
   if (SourceEnabled) {
     GicV3DisableInterruptSource (
-      (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+      (EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
       Source
       );
   }
@@ -303,7 +307,7 @@ GicV3SetTriggerType (
   // Restore interrupt state
   if (SourceEnabled) {
     GicV3EnableInterruptSource (
-      (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+      (EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
       Source
       );
   }
@@ -430,8 +434,8 @@ GicV3DxeInitialize (
 
     if ((MmioRead32 (
            mGicDistributorBase + ARM_GIC_ICDDCR
-         ) & ARM_GIC_ICDDCR_DS) != 0) {
+           ) & ARM_GIC_ICDDCR_DS) != 0)
-
+    {
       // If the Disable Security (DS) control bit is set, we are dealing with a
       // GIC that has only one security state. In this case, let's assume we are
       // executing in non-secure state (which is appropriate for DXE modules)

ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c

@@ -117,14 +117,14 @@ CpuIoCheckParameter (
   // For FIFO type, the target address won't increase during the access,
   // so treat Count as 1
   //
-  if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
+  if ((Width >= EfiCpuIoWidthFifoUint8) && (Width <= EfiCpuIoWidthFifoUint64)) {
     Count = 1;
   }
 
   //
   // Check to see if Width is in the valid range for I/O Port operations
   //
-  Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+  Width = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
   if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
     return EFI_INVALID_PARAMETER;
   }
@@ -161,6 +161,7 @@ CpuIoCheckParameter (
     if (MaxCount < (Count - 1)) {
       return EFI_UNSUPPORTED;
     }
+
     if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
       return EFI_UNSUPPORTED;
     }
@@ -242,7 +243,7 @@ CpuMemoryServiceRead (
   //
   InStride       = mInStride[Width];
   OutStride      = mOutStride[Width];
-  OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+  OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
   for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
     if (OperationWidth == EfiCpuIoWidthUint8) {
       *Uint8Buffer = MmioRead8 ((UINTN)Address);
@@ -254,6 +255,7 @@ CpuMemoryServiceRead (
       *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
     }
   }
+
   return EFI_SUCCESS;
 }
 
@@ -323,7 +325,7 @@ CpuMemoryServiceWrite (
   //
   InStride       = mInStride[Width];
   OutStride      = mOutStride[Width];
-  OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+  OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
   for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
     if (OperationWidth == EfiCpuIoWidthUint8) {
       MmioWrite8 ((UINTN)Address, *Uint8Buffer);
@@ -335,6 +337,7 @@ CpuMemoryServiceWrite (
       MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
     }
   }
+
   return EFI_SUCCESS;
 }
 
@@ -406,7 +409,7 @@ CpuIoServiceRead (
   //
   InStride       = mInStride[Width];
   OutStride      = mOutStride[Width];
-  OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+  OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
 
   for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
     if (OperationWidth == EfiCpuIoWidthUint8) {
@@ -492,7 +495,7 @@ CpuIoServiceWrite (
   //
   InStride       = mInStride[Width];
   OutStride      = mOutStride[Width];
-  OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+  OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
 
   for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
     if (OperationWidth == EfiCpuIoWidthUint8) {
@@ -521,7 +524,6 @@ STATIC EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
   }
 };
 
-
 /**
   The user Entry Point for module CpuIo2Dxe. The user code starts with this function.
 
@@ -544,7 +546,8 @@ ArmPciCpuIo2Initialize (
   ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiCpuIo2ProtocolGuid);
   Status = gBS->InstallMultipleProtocolInterfaces (
                   &mHandle,
-                  &gEfiCpuIo2ProtocolGuid, &mCpuIo2,
+                  &gEfiCpuIo2ProtocolGuid,
+                  &mCpuIo2,
                   NULL
                   );
   ASSERT_EFI_ERROR (Status);

ArmPkg/Drivers/ArmScmiDxe/ArmScmiBaseProtocolPrivate.h

@@ -34,7 +34,7 @@ typedef struct {
 **/
 EFI_STATUS
 ScmiBaseProtocolInit (
-  IN OUT EFI_HANDLE* Handle
+  IN OUT EFI_HANDLE  *Handle
   );
 
 #endif /* ARM_SCMI_BASE_PROTOCOL_PRIVATE_H_ */

ArmPkg/Drivers/ArmScmiDxe/ArmScmiClockProtocolPrivate.h

@@ -53,7 +53,6 @@ typedef struct {
   CLOCK_RATE_DWORD    Rate;
 } CLOCK_RATE_SET_ATTRIBUTES;
 
-
 // Message parameters for CLOCK_CONFIG_SET command.
 typedef struct {
   UINT32    ClockId;

ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h

@@ -43,7 +43,7 @@ typedef struct {
 **/
 EFI_STATUS
 ScmiPerformanceProtocolInit (
-  IN EFI_HANDLE* Handle
+  IN EFI_HANDLE  *Handle
   );
 
 #endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_PRIVATE_H_ */

ArmPkg/Drivers/ArmScmiDxe/Scmi.c

@@ -29,7 +29,7 @@
 **/
 EFI_STATUS
 ScmiCommandGetPayload (
-  OUT UINT32** Payload
+  OUT UINT32  **Payload
   )
 {
   EFI_STATUS   Status;
@@ -121,10 +121,12 @@ ScmiCommandExecute (
     return EFI_DEVICE_ERROR;
   }
 
-  Response = (SCMI_MESSAGE_RESPONSE*)MtlGetChannelPayload (Channel);
+  Response = (SCMI_MESSAGE_RESPONSE *)MtlGetChannelPayload (Channel);
 
   if (Response->Status != ScmiSuccess) {
-    DEBUG ((DEBUG_ERROR, "SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
+    DEBUG ((
+      DEBUG_ERROR,
+      "SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
       Command->ProtocolId,
       Command->MessageId,
       Response->Status
@@ -196,7 +198,7 @@ ScmiGetProtocolVersion (
   Status = ScmiProtocolDiscoveryCommon (
              ProtocolId,
              ScmiMessageIdProtocolVersion,
-             (UINT32**)&ProtocolVersion
+             (UINT32 **)&ProtocolVersion
              );
   if (EFI_ERROR (Status)) {
     return Status;

ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c

@@ -106,9 +106,9 @@ BaseDiscoverVendorDetails (
   }
 
   AsciiStrCpyS (
-    (CHAR8*)VendorIdentifier,
+    (CHAR8 *)VendorIdentifier,
     SCMI_MAX_STR_LEN,
-    (CONST CHAR8*)ReturnValues
+    (CONST CHAR8 *)ReturnValues
     );
 
   return EFI_SUCCESS;
@@ -256,7 +256,6 @@ BaseDiscoverListProtocols (
   Skip = 0;
 
   while (Skip < TotalProtocols) {
-
     *MessageParams = Skip;
 
     // Note PayloadLength is a IN/OUT parameter.
@@ -265,7 +264,7 @@ BaseDiscoverListProtocols (
     Status = ScmiCommandExecute (
                &Cmd,
                &PayloadLength,
-               (UINT32**)&DiscoverList
+               (UINT32 **)&DiscoverList
                );
     if (EFI_ERROR (Status)) {
       return Status;
@@ -300,7 +299,7 @@ STATIC CONST SCMI_BASE_PROTOCOL BaseProtocol = {
 **/
 EFI_STATUS
 ScmiBaseProtocolInit (
-  IN OUT EFI_HANDLE* Handle
+  IN OUT EFI_HANDLE  *Handle
   )
 {
   return gBS->InstallMultipleProtocolInterfaces (

ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c

@@ -130,18 +130,19 @@ ClockGetClockAttributes (
   Status = ScmiCommandExecute (
              &Cmd,
              &PayloadLength,
-             (UINT32**)&ClockAttributes
+             (UINT32 **)&ClockAttributes
              );
   if (EFI_ERROR (Status)) {
     return Status;
   }
+
   // TRUE if bit 0 of ClockAttributes->Attributes is set.
   *Enabled = CLOCK_ENABLED (ClockAttributes->Attributes);
 
   AsciiStrCpyS (
     ClockAsciiName,
     SCMI_MAX_STR_LEN,
-    (CONST CHAR8*)ClockAttributes->ClockName
+    (CONST CHAR8 *)ClockAttributes->ClockName
     );
 
   return EFI_SUCCESS;
@@ -209,7 +210,6 @@ ClockDescribeRates (
   *MessageParams++ = ClockId;
 
   do {
-
     *MessageParams = RateIndex;
 
     // Set Payload length, note PayloadLength is a IN/OUT parameter.
@@ -219,7 +219,7 @@ ClockDescribeRates (
     Status = ScmiCommandExecute (
                &Cmd,
                &PayloadLength,
-               (UINT32**)&DescribeRates
+               (UINT32 **)&DescribeRates
                );
     if (EFI_ERROR (Status)) {
       return Status;
@@ -329,7 +329,7 @@ ClockRateGet (
   Status = ScmiCommandExecute (
              &Cmd,
              &PayloadLength,
-             (UINT32**)&ClockRate
+             (UINT32 **)&ClockRate
              );
   if (EFI_ERROR (Status)) {
     return Status;
@@ -363,7 +363,7 @@ ClockRateSet (
   SCMI_COMMAND               Cmd;
   UINT32                     PayloadLength;
 
-  Status = ScmiCommandGetPayload ((UINT32**)&ClockRateSetAttributes);
+  Status = ScmiCommandGetPayload ((UINT32 **)&ClockRateSetAttributes);
   if (EFI_ERROR (Status)) {
     return Status;
   }
@@ -412,7 +412,7 @@ ClockEnable (
   SCMI_COMMAND                 Cmd;
   UINT32                       PayloadLength;
 
-  Status = ScmiCommandGetPayload ((UINT32**)&ClockConfigSetAttributes);
+  Status = ScmiCommandGetPayload ((UINT32 **)&ClockConfigSetAttributes);
   if (EFI_ERROR (Status)) {
     return Status;
   }
@@ -444,7 +444,7 @@ STATIC CONST SCMI_CLOCK_PROTOCOL ScmiClockProtocol = {
   ClockDescribeRates,
   ClockRateGet,
   ClockRateSet
- };
+};
 
 // Instance of the SCMI clock management protocol.
 STATIC CONST SCMI_CLOCK2_PROTOCOL  ScmiClock2Protocol = {
@@ -456,7 +456,7 @@ STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
   (SCMI_CLOCK2_RATE_SET)ClockRateSet,
   SCMI_CLOCK2_PROTOCOL_VERSION,
   ClockEnable
- };
+};
 
 /** Initialize clock management protocol and install protocol on a given handle.
 
@@ -466,7 +466,7 @@ STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
 **/
 EFI_STATUS
 ScmiClockProtocolInit (
-  IN EFI_HANDLE* Handle
+  IN EFI_HANDLE  *Handle
   )
 {
   return gBS->InstallMultipleProtocolInterfaces (

ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c

@@ -72,7 +72,7 @@ ArmScmiDxeEntryPoint (
   Status = gBS->LocateProtocol (
                   &gArmScmiBaseProtocolGuid,
                   NULL,
-                  (VOID**)&BaseProtocol
+                  (VOID **)&BaseProtocol
                   );
   if (EFI_ERROR (Status)) {
     ASSERT (FALSE);
@@ -88,7 +88,8 @@ ArmScmiDxeEntryPoint (
 
   // Accept any version between SCMI v1.0 and SCMI v2.0
   if ((Version < BASE_PROTOCOL_VERSION_V1) ||
-    (Version > BASE_PROTOCOL_VERSION_V2)) {
+      (Version > BASE_PROTOCOL_VERSION_V2))
+  {
     ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
@@ -109,7 +110,7 @@ ArmScmiDxeEntryPoint (
   Status = gBS->AllocatePool (
                   EfiBootServicesData,
                   SupportedListSize,
-                  (VOID**)&SupportedList
+                  (VOID **)&SupportedList
                   );
   if (EFI_ERROR (Status)) {
     ASSERT (FALSE);
@@ -130,7 +131,8 @@ ArmScmiDxeEntryPoint (
 
   // Install supported protocol on ImageHandle.
   for (ProtocolIndex = 1; ProtocolIndex < ARRAY_SIZE (Protocols);
-       ProtocolIndex++) {
+       ProtocolIndex++)
+  {
     for (Index = 0; Index < NumProtocols; Index++) {
       if (Protocols[ProtocolIndex].Id == SupportedList[Index]) {
         Status = Protocols[ProtocolIndex].InitFn (&ImageHandle);
@@ -138,6 +140,7 @@ ArmScmiDxeEntryPoint (
           ASSERT_EFI_ERROR (Status);
           return Status;
         }
+
         break;
       }
     }

ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.h

@@ -8,6 +8,7 @@
     http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
     DEN0056A_System_Control_and_Management_Interface.pdf
 **/
+
 #ifndef SCMI_DXE_H_
 #define SCMI_DXE_H_
 

ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c

@@ -56,7 +56,7 @@ PerformanceGetAttributes (
   )
 {
   EFI_STATUS  Status;
-  UINT32* ReturnValues;
+  UINT32      *ReturnValues;
 
   Status = ScmiGetProtocolAttributes (
              ScmiProtocolIdPerformance,
@@ -160,7 +160,7 @@ PerformanceDescribeLevels (
   EFI_STATUS    Status;
   UINT32        PayloadLength;
   SCMI_COMMAND  Cmd;
-  UINT32*       MessageParams;
+  UINT32        *MessageParams;
   UINT32        LevelIndex;
   UINT32        RequiredSize;
   UINT32        LevelNo;
@@ -183,7 +183,6 @@ PerformanceDescribeLevels (
   Cmd.MessageId  = ScmiMessageIdPerformanceDescribeLevels;
 
   do {
-
     *MessageParams = LevelIndex;
 
     // Note, PayloadLength is an IN/OUT parameter.
@@ -192,7 +191,7 @@ PerformanceDescribeLevels (
     Status = ScmiCommandExecute (
                &Cmd,
                &PayloadLength,
-               (UINT32**)&Levels
+               (UINT32 **)&Levels
                );
     if (EFI_ERROR (Status)) {
       return Status;
@@ -219,7 +218,6 @@ PerformanceDescribeLevels (
         sizeof (SCMI_PERFORMANCE_LEVEL)
         );
     }
-
   } while (ReturnRemainNumLevels != 0);
 
   *LevelArraySize = RequiredSize;
@@ -312,7 +310,7 @@ PerformanceLimitsGet (
   Status = ScmiCommandExecute (
              &Cmd,
              &PayloadLength,
-             (UINT32**)&ReturnValues
+             (UINT32 **)&ReturnValues
              );
   if (EFI_ERROR (Status)) {
     return Status;
@@ -439,7 +437,7 @@ STATIC CONST SCMI_PERFORMANCE_PROTOCOL PerformanceProtocol = {
 **/
 EFI_STATUS
 ScmiPerformanceProtocolInit (
-  IN EFI_HANDLE* Handle
+  IN EFI_HANDLE  *Handle
   )
 {
   return gBS->InstallMultipleProtocolInterfaces (

ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h

@@ -8,6 +8,7 @@
     http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
     DEN0056A_System_Control_and_Management_Interface.pdf
 **/
+
 #ifndef SCMI_PRIVATE_H_
 #define SCMI_PRIVATE_H_
 
@@ -89,7 +90,7 @@ typedef struct {
 **/
 EFI_STATUS
 ScmiCommandGetPayload (
-  OUT UINT32** Payload
+  OUT UINT32  **Payload
   );
 
 /** Execute a SCMI command and receive a response.

ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c

@@ -52,9 +52,11 @@ PageAttributeToGcdAttribute (
       GcdAttributes = EFI_MEMORY_WB;
       break;
     default:
-    DEBUG ((DEBUG_ERROR,
+      DEBUG ((
+        DEBUG_ERROR,
         "PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n",
-      PageAttributes));
+        PageAttributes
+        ));
       ASSERT (0);
       // The Global Coherency Domain (GCD) value is defined as a bit set.
       // Returning 0 means no attribute has been set.
@@ -63,7 +65,8 @@ PageAttributeToGcdAttribute (
 
   // Determine protection attributes
   if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) ||
-      ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {
+      ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO))
+  {
     // Read only cases map to write-protect
     GcdAttributes |= EFI_MEMORY_RO;
   }
@@ -88,11 +91,11 @@ GetFirstPageAttribute (
   // Get the first entry of the table
   FirstEntry = *FirstLevelTableAddress;
 
-  if ((TableLevel != 3) && (FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
+  if ((TableLevel != 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY)) {
     // Only valid for Levels 0, 1 and 2
 
     // Get the attribute of the subsequent table
-    return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);
+    return GetFirstPageAttribute ((UINT64 *)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);
   } else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||
              ((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
   {
@@ -138,18 +141,22 @@ GetNextEntryAttribute (
 
     // If Entry is a Table Descriptor type entry then go through the sub-level table
     if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
-        ((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {
+        ((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
+    {
       if ((*PrevEntryAttribute == INVALID_ENTRY) || (EntryAttribute != *PrevEntryAttribute)) {
         if (*PrevEntryAttribute != INVALID_ENTRY) {
           // Update GCD with the last region
-          SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
+          SetGcdMemorySpaceAttributes (
+            MemorySpaceMap,
+            NumberOfDescriptors,
             *StartGcdRegion,
-              (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
+            (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))) - *StartGcdRegion,
-              PageAttributeToGcdAttribute (*PrevEntryAttribute));
+            PageAttributeToGcdAttribute (*PrevEntryAttribute)
+            );
         }
 
         // Start of the new region
-        *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
+        *StartGcdRegion     = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel));
         *PrevEntryAttribute = EntryAttribute;
       } else {
         continue;
@@ -159,20 +166,27 @@ GetNextEntryAttribute (
       ASSERT (TableLevel < 3);
 
       // Increase the level number and scan the sub-level table
-      GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
+      GetNextEntryAttribute (
-                             TT_ENTRY_COUNT, TableLevel + 1,
+        (UINT64 *)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
-                             (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),
+        TT_ENTRY_COUNT,
-                             PrevEntryAttribute, StartGcdRegion);
+        TableLevel + 1,
+        (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))),
+        PrevEntryAttribute,
+        StartGcdRegion
+        );
     } else {
       if (*PrevEntryAttribute != INVALID_ENTRY) {
         // Update GCD with the last region
-        SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
+        SetGcdMemorySpaceAttributes (
+          MemorySpaceMap,
+          NumberOfDescriptors,
           *StartGcdRegion,
-            (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
+          (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))) - *StartGcdRegion,
-            PageAttributeToGcdAttribute (*PrevEntryAttribute));
+          PageAttributeToGcdAttribute (*PrevEntryAttribute)
+          );
 
         // Start of the new region
-        *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
+        *StartGcdRegion     = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel));
         *PrevEntryAttribute = INVALID_ENTRY;
       }
     }
@@ -180,7 +194,7 @@ GetNextEntryAttribute (
 
   FreePool (MemorySpaceMap);
 
-  return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel));
+  return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL (TableLevel));
 }
 
 EFI_STATUS
@@ -217,7 +231,7 @@ SyncCacheConfig (
   // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.
 
   // Obtain page table base
-  FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ());
+  FirstLevelTableAddress = (UINT64 *)(ArmGetTTBR0BaseAddress ());
 
   // Get Translation Control Register value
   Tcr = ArmGetTCR ();
@@ -232,17 +246,24 @@ SyncCacheConfig (
 
   // We scan from the start of the memory map (ie: at the address 0x0)
   BaseAddressGcdRegion = 0x0;
-  EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,
+  EndAddressGcdRegion  = GetNextEntryAttribute (
-                                               TableCount, TableLevel,
+                           FirstLevelTableAddress,
+                           TableCount,
+                           TableLevel,
                            BaseAddressGcdRegion,
-                                               &PageAttribute, &BaseAddressGcdRegion);
+                           &PageAttribute,
+                           &BaseAddressGcdRegion
+                           );
 
   // Update GCD with the last region if valid
   if (PageAttribute != INVALID_ENTRY) {
-    SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
+    SetGcdMemorySpaceAttributes (
+      MemorySpaceMap,
+      NumberOfDescriptors,
       BaseAddressGcdRegion,
       EndAddressGcdRegion - BaseAddressGcdRegion,
-        PageAttributeToGcdAttribute (PageAttribute));
+      PageAttributeToGcdAttribute (PageAttribute)
+      );
   }
 
   FreePool (MemorySpaceMap);
@@ -264,6 +285,7 @@ EfiAttributeToArmAttribute (
       } else {
         ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
       }
+
       break;
     case EFI_MEMORY_WC:
       ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
@@ -319,22 +341,25 @@ GetMemoryRegionRec (
   }
 
   // Find the block entry linked to the Base Address
-  BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
+  BlockEntry = (UINT64 *)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
   EntryType  = *BlockEntry & TT_TYPE_MASK;
 
   if ((TableLevel < 3) && (EntryType == TT_TYPE_TABLE_ENTRY)) {
-    NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
+    NextTranslationTable = (UINT64 *)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
 
     // The entry is a page table, so we go to the next level
     Status = GetMemoryRegionRec (
                NextTranslationTable, // Address of the next level page table
                TableLevel + 1,       // Next Page Table level
-        (UINTN*)TT_LAST_BLOCK_ADDRESS(NextTranslationTable, TT_ENTRY_COUNT),
+               (UINTN *)TT_LAST_BLOCK_ADDRESS (NextTranslationTable, TT_ENTRY_COUNT),
-        BaseAddress, RegionLength, RegionAttributes);
+               BaseAddress,
+               RegionLength,
+               RegionAttributes
+               );
 
     // In case of 'Success', it means the end of the block region has been found into the upper
     // level translation table
-    if (!EFI_ERROR(Status)) {
+    if (!EFI_ERROR (Status)) {
       return EFI_SUCCESS;
     }
 
@@ -343,7 +368,7 @@ GetMemoryRegionRec (
   } else if (EntryType == BlockEntryType) {
     // We have found the BlockEntry attached to the address. We save its start address (the start
     // address might be before the 'BaseAddress') and attributes
-    *BaseAddress      = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);
+    *BaseAddress      = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL (TableLevel) - 1);
     *RegionLength     = 0;
     *RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;
   } else {
@@ -353,11 +378,12 @@ GetMemoryRegionRec (
 
   while (BlockEntry <= LastBlockEntry) {
     if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) {
-      *RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL(TableLevel);
+      *RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL (TableLevel);
     } else {
       // In case we have found the end of the region we return success
       return EFI_SUCCESS;
     }
+
     BlockEntry++;
   }
 
@@ -388,9 +414,14 @@ GetMemoryRegion (
   // Get the Table info from T0SZ
   GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);
 
-  Status = GetMemoryRegionRec (TranslationTable, TableLevel,
+  Status = GetMemoryRegionRec (
-      (UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount),
+             TranslationTable,
-      BaseAddress, RegionLength, RegionAttributes);
+             TableLevel,
+             (UINTN *)TT_LAST_BLOCK_ADDRESS (TranslationTable, EntryCount),
+             BaseAddress,
+             RegionLength,
+             RegionAttributes
+             );
 
   // If the region continues up to the end of the root table then GetMemoryRegionRec()
   // will return EFI_NOT_FOUND

ArmPkg/Drivers/CpuDxe/Arm/Mmu.c

@@ -22,7 +22,7 @@ SectionToGcdAttributes (
   *GcdAttributes = 0;
 
   // determine cacheability attributes
-  switch(SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {
+  switch (SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {
     case TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED:
       *GcdAttributes |= EFI_MEMORY_UC;
       break;
@@ -49,9 +49,9 @@ SectionToGcdAttributes (
   }
 
   // determine protection attributes
-  switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {
+  switch (SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {
     case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write
-      //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
+      // *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
       break;
 
     case TT_DESCRIPTOR_SECTION_AP_RW_NO:
@@ -86,7 +86,7 @@ PageToGcdAttributes (
   *GcdAttributes = 0;
 
   // determine cacheability attributes
-  switch(PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {
+  switch (PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {
     case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:
       *GcdAttributes |= EFI_MEMORY_UC;
       break;
@@ -113,9 +113,9 @@ PageToGcdAttributes (
   }
 
   // determine protection attributes
-  switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {
+  switch (PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {
     case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write
-      //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
+      // *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
       break;
 
     case TT_DESCRIPTOR_PAGE_AP_RW_NO:
@@ -161,17 +161,17 @@ SyncCacheConfigPage (
   UINT64                         GcdAttributes;
 
   // Get the Base Address from FirstLevelDescriptor;
-  BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
+  BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
 
   // Convert SectionAttributes into PageAttributes
   NextPageAttributes =
-      TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*NextSectionAttributes,0) |
+    TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY (*NextSectionAttributes, 0) |
-      TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*NextSectionAttributes);
+    TT_DESCRIPTOR_CONVERT_TO_PAGE_AP (*NextSectionAttributes);
 
   // obtain page table base
   SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
 
-  for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {
+  for (i = 0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {
     if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
       // extract attributes (cacheability and permissions)
       PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK);
@@ -206,13 +206,14 @@ SyncCacheConfigPage (
       *NextRegionBase    = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
       NextPageAttributes = 0;
     }
+
     *NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;
   }
 
   // Convert back PageAttributes into SectionAttributes
   *NextSectionAttributes =
-      TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(NextPageAttributes,0) |
+    TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (NextPageAttributes, 0) |
-      TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(NextPageAttributes);
+    TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (NextPageAttributes);
 
   return EFI_SUCCESS;
 }
@@ -233,7 +234,6 @@ SyncCacheConfig (
   UINTN                                NumberOfDescriptors;
   EFI_GCD_MEMORY_SPACE_DESCRIPTOR      *MemorySpaceMap;
 
-
   DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));
 
   // This code assumes MMU is enabled and filed with section translations
@@ -246,7 +246,6 @@ SyncCacheConfig (
   Status         = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
   ASSERT_EFI_ERROR (Status);
 
-
   // The GCD implementation maintains its own copy of the state of memory space attributes.  GCD needs
   // to know what the initial memory space attributes are.  The CPU Arch. Protocol does not provide a
   // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were
@@ -261,7 +260,7 @@ SyncCacheConfig (
 
   // iterate through each 1MB descriptor
   NextRegionBase = NextRegionLength = 0;
-  for (i=0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {
+  for (i = 0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {
     if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {
       // extract attributes (cacheability and permissions)
       SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);
@@ -269,7 +268,7 @@ SyncCacheConfig (
       if (NextSectionAttributes == 0) {
         // start on a new region
         NextRegionLength      = 0;
-        NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
+        NextRegionBase        = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
         NextSectionAttributes = SectionAttributes;
       } else if (SectionAttributes != NextSectionAttributes) {
         // Convert Section Attributes into GCD Attributes
@@ -281,20 +280,26 @@ SyncCacheConfig (
 
         // start on a new region
         NextRegionLength      = 0;
-        NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
+        NextRegionBase        = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
         NextSectionAttributes = SectionAttributes;
       }
+
       NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
-    } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {
+    } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (FirstLevelTable[i])) {
       // In this case any bits set in the 'NextSectionAttributes' are garbage and were set from
       // bits that are actually part of the pagetable address.  We clear it out to zero so that
       // the SyncCacheConfigPage will use the page attributes instead of trying to convert the
       // section attributes into page attributes
       NextSectionAttributes = 0;
       Status                = SyncCacheConfigPage (
-          i,FirstLevelTable[i],
+                                i,
-          NumberOfDescriptors, MemorySpaceMap,
+                                FirstLevelTable[i],
-          &NextRegionBase,&NextRegionLength,&NextSectionAttributes);
+                                NumberOfDescriptors,
+                                MemorySpaceMap,
+                                &NextRegionBase,
+                                &NextRegionLength,
+                                &NextSectionAttributes
+                                );
       ASSERT_EFI_ERROR (Status);
     } else {
       // We do not support yet 16MB sections
@@ -310,9 +315,10 @@ SyncCacheConfig (
         SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
 
         NextRegionLength      = 0;
-        NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
+        NextRegionBase        = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
         NextSectionAttributes = 0;
       }
+
       NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
     }
   } // section entry loop
@@ -400,7 +406,7 @@ GetMemoryRegionPage (
   ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT);
 
   // Go through the page table to find the end of the section
-  for (; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {
+  for ( ; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {
     // Get the section at the given index
     PageDescriptor = PageTable[TableIndex];
 
@@ -416,7 +422,7 @@ GetMemoryRegionPage (
       }
     } else {
       // We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.
-      ASSERT(0);
+      ASSERT (0);
       return EFI_SUCCESS;
     }
   }
@@ -466,7 +472,7 @@ GetMemoryRegion (
     *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK;
 
     // Get the attribute at the page table level (Level 2)
-    PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
+    PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
 
     // Calculate index into first level translation table for start of modification
     PageTableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK)  >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
@@ -477,14 +483,14 @@ GetMemoryRegion (
                         TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);
   }
 
-  for (;TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
+  for ( ; TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
     // Get the section at the given index
     SectionDescriptor = FirstLevelTable[TableIndex];
 
     // If the entry is a level-2 page table then we scan it to find the end of the region
     if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {
       // Extract the page table location from the descriptor
-      PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
+      PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
 
       // Scan the page table to find the end of the region.
       Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);
@@ -494,7 +500,8 @@ GetMemoryRegion (
         break;
       }
     } else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
-               ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) {
+               ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
+    {
       if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {
         // If the attributes of the section differ from the one targeted then we exit the loop
         break;

ArmPkg/Drivers/CpuDxe/CpuDxe.c

@@ -49,7 +49,6 @@ CpuFlushCpuDataCache (
   IN EFI_CPU_FLUSH_TYPE     FlushType
   )
 {
-
   switch (FlushType) {
     case EfiCpuFlushTypeWriteBack:
       WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
@@ -67,7 +66,6 @@ CpuFlushCpuDataCache (
   return EFI_SUCCESS;
 }
 
-
 /**
   This function enables interrupt processing by the processor.
 
@@ -88,7 +86,6 @@ CpuEnableInterrupt (
   return EFI_SUCCESS;
 }
 
-
 /**
   This function disables interrupt processing by the processor.
 
@@ -109,7 +106,6 @@ CpuDisableInterrupt (
   return EFI_SUCCESS;
 }
 
-
 /**
   This function retrieves the processor's current interrupt state a returns it in
   State. If interrupts are currently enabled, then TRUE is returned. If interrupts
@@ -134,11 +130,10 @@ CpuGetInterruptState (
     return EFI_INVALID_PARAMETER;
   }
 
-  *State = ArmGetInterruptState();
+  *State = ArmGetInterruptState ();
   return EFI_SUCCESS;
 }
 
-
 /**
   This function generates an INIT on the processor. If this function succeeds, then the
   processor will be reset, and control will not be returned to the caller. If InitType is
@@ -247,7 +242,8 @@ CpuDxeInitialize (
 
   Status = gBS->InstallMultipleProtocolInterfaces (
                   &mCpuHandle,
-                &gEfiCpuArchProtocolGuid,           &mCpu,
+                  &gEfiCpuArchProtocolGuid,
+                  &mCpu,
                   NULL
                   );
 
@@ -262,8 +258,8 @@ CpuDxeInitialize (
 
   // If the platform is a MPCore system then install the Configuration Table describing the
   // secondary core states
-  if (ArmIsMpCore()) {
+  if (ArmIsMpCore ()) {
-    PublishArmProcessorTable();
+    PublishArmProcessorTable ();
   }
 
   //

ArmPkg/Drivers/CpuDxe/CpuDxe.h

@@ -59,7 +59,6 @@ RegisterInterruptHandler (
   IN EFI_CPU_INTERRUPT_HANDLER  InterruptHandler
   );
 
-
 /**
   This function registers and enables the handler specified by InterruptHandler for a processor
   interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
@@ -86,7 +85,6 @@ RegisterDebuggerInterruptHandler (
   IN EFI_CPU_INTERRUPT_HANDLER  InterruptHandler
   );
 
-
 EFI_STATUS
 EFIAPI
 CpuSetMemoryAttributes (
@@ -117,7 +115,7 @@ SyncCacheConfig (
 **/
 VOID
 EFIAPI
-PublishArmProcessorTable(
+PublishArmProcessorTable (
   VOID
   );
 

ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c

@@ -43,19 +43,22 @@ SearchGcdMemorySpaces (
   *EndIndex   = 0;
   for (Index = 0; Index < NumberOfDescriptors; Index++) {
     if ((BaseAddress >= MemorySpaceMap[Index].BaseAddress) &&
-        (BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
+        (BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)))
+    {
       *StartIndex = Index;
     }
+
     if (((BaseAddress + Length - 1) >= MemorySpaceMap[Index].BaseAddress) &&
-        ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
+        ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)))
+    {
       *EndIndex = Index;
       return EFI_SUCCESS;
     }
   }
+
   return EFI_NOT_FOUND;
 }
 
-
 /**
   Sets the attributes for a specified range in Gcd Memory Space Map.
 
@@ -88,14 +91,21 @@ SetGcdMemorySpaceAttributes (
   EFI_PHYSICAL_ADDRESS  RegionStart;
   UINT64                RegionLength;
 
-  DEBUG ((DEBUG_GCD, "SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",
+  DEBUG ((
-      BaseAddress, BaseAddress + Length, Attributes));
+    DEBUG_GCD,
+    "SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",
+    BaseAddress,
+    BaseAddress + Length,
+    Attributes
+    ));
 
   // We do not support a smaller granularity than 4KB on ARM Architecture
   if ((Length & EFI_PAGE_MASK) != 0) {
-    DEBUG ((DEBUG_WARN,
+    DEBUG ((
+      DEBUG_WARN,
       "Warning: We do not support smaller granularity than 4KB on ARM Architecture (passed length: 0x%lX).\n",
-            Length));
+      Length
+      ));
   }
 
   //
@@ -120,6 +130,7 @@ SetGcdMemorySpaceAttributes (
     if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
       continue;
     }
+
     //
     // Calculate the start and end address of the overlapping range
     //
@@ -128,11 +139,13 @@ SetGcdMemorySpaceAttributes (
     } else {
       RegionStart = MemorySpaceMap[Index].BaseAddress;
     }
+
     if ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)) {
       RegionLength = BaseAddress + Length - RegionStart;
     } else {
       RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
     }
+
     //
     // Set memory attributes according to MTRR attribute and the original attribute of descriptor
     //

ArmPkg/Drivers/CpuDxe/CpuMpCore.c

@@ -26,7 +26,7 @@ ARM_PROCESSOR_TABLE mArmProcessorTableTemplate = {
     EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION,
     { 0 },
     0
-  },   //ARM Processor table header
+  },   // ARM Processor table header
   0,   // Number of entries in ARM processor Table
   NULL // ARM Processor Table
 };
@@ -50,42 +50,43 @@ PublishArmProcessorTable (
   Hob.Raw = GetHobList ();
 
   // Iterate through the HOBs and find if there is ARM PROCESSOR ENTRY HOB
-  for (; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {
+  for ( ; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
     // Check for Correct HOB type
     if ((GET_HOB_TYPE (Hob)) == EFI_HOB_TYPE_GUID_EXTENSION) {
       // Check for correct GUID type
-      if (CompareGuid(&(Hob.Guid->Name), &gArmMpCoreInfoGuid)) {
+      if (CompareGuid (&(Hob.Guid->Name), &gArmMpCoreInfoGuid)) {
         ARM_PROCESSOR_TABLE  *ArmProcessorTable;
         EFI_STATUS           Status;
 
         // Allocate Runtime memory for ARM processor table
-        ArmProcessorTable = (ARM_PROCESSOR_TABLE*)AllocateRuntimePool(sizeof(ARM_PROCESSOR_TABLE));
+        ArmProcessorTable = (ARM_PROCESSOR_TABLE *)AllocateRuntimePool (sizeof (ARM_PROCESSOR_TABLE));
 
         // Check if the memory allocation is successful or not
-        ASSERT(NULL != ArmProcessorTable);
+        ASSERT (NULL != ArmProcessorTable);
 
         // Set ARM processor table to default values
-        CopyMem(ArmProcessorTable,&mArmProcessorTableTemplate,sizeof(ARM_PROCESSOR_TABLE));
+        CopyMem (ArmProcessorTable, &mArmProcessorTableTemplate, sizeof (ARM_PROCESSOR_TABLE));
 
         // Fill in Length fields of ARM processor table
-        ArmProcessorTable->Header.Length = sizeof(ARM_PROCESSOR_TABLE);
+        ArmProcessorTable->Header.Length  = sizeof (ARM_PROCESSOR_TABLE);
-        ArmProcessorTable->Header.DataLen = GET_GUID_HOB_DATA_SIZE(Hob);
+        ArmProcessorTable->Header.DataLen = GET_GUID_HOB_DATA_SIZE (Hob);
 
         // Fill in Identifier(ARM processor table GUID)
         ArmProcessorTable->Header.Identifier = gArmMpCoreInfoGuid;
 
         // Set Number of ARM core entries in the Table
-        ArmProcessorTable->NumberOfEntries = GET_GUID_HOB_DATA_SIZE(Hob)/sizeof(ARM_CORE_INFO);
+        ArmProcessorTable->NumberOfEntries = GET_GUID_HOB_DATA_SIZE (Hob)/sizeof (ARM_CORE_INFO);
 
         // Allocate runtime memory for ARM processor Table entries
-        ArmProcessorTable->ArmCpus = (ARM_CORE_INFO*)AllocateRuntimePool (
+        ArmProcessorTable->ArmCpus = (ARM_CORE_INFO *)AllocateRuntimePool (
-           ArmProcessorTable->NumberOfEntries * sizeof(ARM_CORE_INFO));
+                                                        ArmProcessorTable->NumberOfEntries * sizeof (ARM_CORE_INFO)
+                                                        );
 
         // Check if the memory allocation is successful or not
-        ASSERT(NULL != ArmProcessorTable->ArmCpus);
+        ASSERT (NULL != ArmProcessorTable->ArmCpus);
 
         // Copy ARM Processor Table data from HOB list to newly allocated memory
-        CopyMem(ArmProcessorTable->ArmCpus,GET_GUID_HOB_DATA(Hob), ArmProcessorTable->Header.DataLen);
+        CopyMem (ArmProcessorTable->ArmCpus, GET_GUID_HOB_DATA (Hob), ArmProcessorTable->Header.DataLen);
 
         // Install the ARM Processor table into EFI system configuration table
         Status = gBS->InstallConfigurationTable (&gArmMpCoreInfoGuid, ArmProcessorTable);

ArmPkg/Drivers/CpuDxe/Exception.c

@@ -23,13 +23,13 @@ InitializeExceptions (
   BOOLEAN                  FiqEnabled;
 
   VectorInfo = (EFI_VECTOR_HANDOFF_INFO *)NULL;
-  Status = EfiGetSystemConfigurationTable(&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList);
+  Status     = EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList);
-  if (Status == EFI_SUCCESS && VectorInfoList != NULL) {
+  if ((Status == EFI_SUCCESS) && (VectorInfoList != NULL)) {
     VectorInfo = VectorInfoList;
   }
 
   // initialize the CpuExceptionHandlerLib so we take over the exception vector table from the DXE Core
-  InitializeCpuExceptionHandlers(VectorInfo);
+  InitializeCpuExceptionHandlers (VectorInfo);
 
   Status = EFI_SUCCESS;
 
@@ -90,11 +90,11 @@ previously installed.
 
 **/
 EFI_STATUS
-RegisterInterruptHandler(
+RegisterInterruptHandler (
   IN EFI_EXCEPTION_TYPE         InterruptType,
   IN EFI_CPU_INTERRUPT_HANDLER  InterruptHandler
   )
 {
   // pass down to CpuExceptionHandlerLib
-  return (EFI_STATUS)RegisterCpuInterruptHandler(InterruptType, InterruptHandler);
+  return (EFI_STATUS)RegisterCpuInterruptHandler (InterruptType, InterruptHandler);
 }

ArmPkg/Drivers/CpuPei/CpuPei.c

@@ -16,8 +16,6 @@ Abstract:
 
 **/
 
-
-
 //
 // The package level header files this module uses
 //
@@ -70,12 +68,12 @@ InitializeCpuPeim (
   BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
 
   // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
-  Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);
+  Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID **)&ArmMpCoreInfoPpi);
-  if (!EFI_ERROR(Status)) {
+  if (!EFI_ERROR (Status)) {
     // Build the MP Core Info Table
     ArmCoreCount = 0;
     Status       = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
-    if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {
+    if (!EFI_ERROR (Status) && (ArmCoreCount > 0)) {
       // Build MPCore Info HOB
       BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
     }

ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h

@@ -5,6 +5,7 @@
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
 **/
+
 #ifndef GENERIC_WATCHDOG_H_
 #define GENERIC_WATCHDOG_H_
 

ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c

@@ -101,7 +101,7 @@ WatchdogInterruptHandler (
   IN  EFI_SYSTEM_CONTEXT         SystemContext
   )
 {
-  STATIC CONST CHAR16 ResetString[]= L"The generic watchdog timer ran out.";
+  STATIC CONST CHAR16  ResetString[] = L"The generic watchdog timer ran out.";
   UINT64               TimerPeriod;
 
   WatchdogDisable ();
@@ -119,8 +119,12 @@ WatchdogInterruptHandler (
     mWatchdogNotify (TimerPeriod + 1);
   }
 
-  gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, StrSize (ResetString),
+  gRT->ResetSystem (
-         (CHAR16 *)ResetString);
+         EfiResetCold,
+         EFI_TIMEOUT,
+         StrSize (ResetString),
+         (CHAR16 *)ResetString
+         );
 
   // If we got here then the reset didn't work
   ASSERT (FALSE);
@@ -158,11 +162,11 @@ WatchdogRegisterHandler (
   IN EFI_WATCHDOG_TIMER_NOTIFY         NotifyFunction
   )
 {
-  if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
+  if ((mWatchdogNotify == NULL) && (NotifyFunction == NULL)) {
     return EFI_INVALID_PARAMETER;
   }
 
-  if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
+  if ((mWatchdogNotify != NULL) && (NotifyFunction != NULL)) {
     return EFI_ALREADY_STARTED;
   }
 
@@ -307,8 +311,11 @@ GenericWatchdogEntry (
   EFI_STATUS  Status;
   EFI_HANDLE  Handle;
 
-  Status = gBS->LocateProtocol (&gHardwareInterrupt2ProtocolGuid, NULL,
+  Status = gBS->LocateProtocol (
-                  (VOID **)&mInterruptProtocol);
+                  &gHardwareInterrupt2ProtocolGuid,
+                  NULL,
+                  (VOID **)&mInterruptProtocol
+                  );
   ASSERT_EFI_ERROR (Status);
 
   /* Make sure the Watchdog Timer Architectural Protocol has not been installed
@@ -320,33 +327,44 @@ GenericWatchdogEntry (
   ASSERT (mTimerFrequencyHz != 0);
 
   // Install interrupt handler
-  Status = mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
+  Status = mInterruptProtocol->RegisterInterruptSource (
+                                 mInterruptProtocol,
                                  FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
-                                 WatchdogInterruptHandler);
+                                 WatchdogInterruptHandler
+                                 );
   if (EFI_ERROR (Status)) {
     return Status;
   }
 
-  Status = mInterruptProtocol->SetTriggerType (mInterruptProtocol,
+  Status = mInterruptProtocol->SetTriggerType (
+                                 mInterruptProtocol,
                                  FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
-                                 EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING);
+                                 EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING
+                                 );
   if (EFI_ERROR (Status)) {
     goto UnregisterHandler;
   }
 
   // Install the Timer Architectural Protocol onto a new handle
   Handle = NULL;
-  Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
+  Status = gBS->InstallMultipleProtocolInterfaces (
-                  &gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,
+                  &Handle,
-                  NULL);
+                  &gEfiWatchdogTimerArchProtocolGuid,
+                  &mWatchdogTimer,
+                  NULL
+                  );
   if (EFI_ERROR (Status)) {
     goto UnregisterHandler;
   }
 
   // Register for an ExitBootServicesEvent
-  Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
+  Status = gBS->CreateEvent (
-                  WatchdogExitBootServicesEvent, NULL,
+                  EVT_SIGNAL_EXIT_BOOT_SERVICES,
-                  &mEfiExitBootServicesEvent);
+                  TPL_NOTIFY,
+                  WatchdogExitBootServicesEvent,
+                  NULL,
+                  &mEfiExitBootServicesEvent
+                  );
   ASSERT_EFI_ERROR (Status);
 
   mNumTimerTicks = 0;
@@ -356,8 +374,10 @@ GenericWatchdogEntry (
 
 UnregisterHandler:
   // Unregister the handler
-  mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
+  mInterruptProtocol->RegisterInterruptSource (
+                        mInterruptProtocol,
                         FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
-                        NULL);
+                        NULL
+                        );
   return Status;
 }

ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c

@@ -100,10 +100,12 @@ MmCommunication2Communicate (
     // This case can be used by the consumer of this driver to find out the
     // max size that can be used for allocating CommBuffer.
     if ((*CommSize == 0) ||
-        (*CommSize > mNsCommBuffMemRegion.Length)) {
+        (*CommSize > mNsCommBuffMemRegion.Length))
+    {
       *CommSize = mNsCommBuffMemRegion.Length;
       return EFI_BAD_BUFFER_SIZE;
     }
+
     //
     // CommSize must match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
     //
@@ -117,7 +119,8 @@ MmCommunication2Communicate (
   // environment then return the expected size.
   //
   if ((BufferSize == 0) ||
-      (BufferSize > mNsCommBuffMemRegion.Length)) {
+      (BufferSize > mNsCommBuffMemRegion.Length))
+  {
     CommunicateHeader->MessageLength = mNsCommBuffMemRegion.Length -
                                        sizeof (CommunicateHeader->HeaderGuid) -
                                        sizeof (CommunicateHeader->MessageLength);
@@ -219,15 +222,19 @@ NotifySetVirtualAddressMap (
                   (VOID **)&mNsCommBuffMemRegion.VirtualBase
                   );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "NotifySetVirtualAddressMap():"
+    DEBUG ((
-            " Unable to convert MM runtime pointer. Status:0x%r\n", Status));
+      DEBUG_ERROR,
+      "NotifySetVirtualAddressMap():"
+      " Unable to convert MM runtime pointer. Status:0x%r\n",
+      Status
+      ));
   }
-
 }
 
 STATIC
 EFI_STATUS
-GetMmCompatibility ()
+GetMmCompatibility (
+  )
 {
   EFI_STATUS    Status;
   UINT32        MmVersion;
@@ -240,21 +247,32 @@ GetMmCompatibility ()
 
   MmVersion = MmVersionArgs.Arg0;
 
-  if ((MM_MAJOR_VER(MmVersion) == MM_CALLER_MAJOR_VER) &&
+  if ((MM_MAJOR_VER (MmVersion) == MM_CALLER_MAJOR_VER) &&
-      (MM_MINOR_VER(MmVersion) >= MM_CALLER_MINOR_VER)) {
+      (MM_MINOR_VER (MmVersion) >= MM_CALLER_MINOR_VER))
-    DEBUG ((DEBUG_INFO, "MM Version: Major=0x%x, Minor=0x%x\n",
+  {
-            MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion)));
+    DEBUG ((
+      DEBUG_INFO,
+      "MM Version: Major=0x%x, Minor=0x%x\n",
+      MM_MAJOR_VER (MmVersion),
+      MM_MINOR_VER (MmVersion)
+      ));
     Status = EFI_SUCCESS;
   } else {
-    DEBUG ((DEBUG_ERROR, "Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
+    DEBUG ((
-            MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion), MM_CALLER_MAJOR_VER, MM_CALLER_MINOR_VER));
+      DEBUG_ERROR,
+      "Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
+      MM_MAJOR_VER (MmVersion),
+      MM_MINOR_VER (MmVersion),
+      MM_CALLER_MAJOR_VER,
+      MM_CALLER_MINOR_VER
+      ));
     Status = EFI_UNSUPPORTED;
   }
 
   return Status;
 }
 
-STATIC EFI_GUID* CONST mGuidedEventGuid[] = {
+STATIC EFI_GUID *CONST  mGuidedEventGuid[] = {
   &gEfiEndOfDxeEventGroupGuid,
   &gEfiEventExitBootServicesGuid,
   &gEfiEventReadyToBootGuid,
@@ -317,7 +335,7 @@ MmCommunication2Initialize (
 
   // Check if we can make the MM call
   Status = GetMmCompatibility ();
-  if (EFI_ERROR(Status)) {
+  if (EFI_ERROR (Status)) {
     goto ReturnErrorStatus;
   }
 
@@ -339,8 +357,11 @@ MmCommunication2Initialize (
                   EFI_MEMORY_RUNTIME
                   );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
+    DEBUG ((
-            "Failed to add MM-NS Buffer Memory Space\n"));
+      DEBUG_ERROR,
+      "MmCommunicateInitialize: "
+      "Failed to add MM-NS Buffer Memory Space\n"
+      ));
     goto ReturnErrorStatus;
   }
 
@@ -350,8 +371,11 @@ MmCommunication2Initialize (
                   EFI_MEMORY_WB | EFI_MEMORY_XP | EFI_MEMORY_RUNTIME
                   );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
+    DEBUG ((
-            "Failed to set MM-NS Buffer Memory attributes\n"));
+      DEBUG_ERROR,
+      "MmCommunicateInitialize: "
+      "Failed to set MM-NS Buffer Memory attributes\n"
+      ));
     goto CleanAddedMemorySpace;
   }
 
@@ -362,9 +386,12 @@ MmCommunication2Initialize (
                   EFI_NATIVE_INTERFACE,
                   &mMmCommunication2
                   );
-  if (EFI_ERROR(Status)) {
+  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "MmCommunicationInitialize: "
+    DEBUG ((
-            "Failed to install MM communication protocol\n"));
+      DEBUG_ERROR,
+      "MmCommunicationInitialize: "
+      "Failed to install MM communication protocol\n"
+      ));
     goto CleanAddedMemorySpace;
   }
 
@@ -381,17 +408,24 @@ MmCommunication2Initialize (
   ASSERT_EFI_ERROR (Status);
 
   for (Index = 0; Index < ARRAY_SIZE (mGuidedEventGuid); Index++) {
-    Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
+    Status = gBS->CreateEventEx (
-                    MmGuidedEventNotify, mGuidedEventGuid[Index],
+                    EVT_NOTIFY_SIGNAL,
-                    mGuidedEventGuid[Index], &mGuidedEvent[Index]);
+                    TPL_CALLBACK,
+                    MmGuidedEventNotify,
+                    mGuidedEventGuid[Index],
+                    mGuidedEventGuid[Index],
+                    &mGuidedEvent[Index]
+                    );
     ASSERT_EFI_ERROR (Status);
     if (EFI_ERROR (Status)) {
       while (Index-- > 0) {
         gBS->CloseEvent (mGuidedEvent[Index]);
       }
+
       goto UninstallProtocol;
     }
   }
+
   return EFI_SUCCESS;
 
 UninstallProtocol:

ArmPkg/Drivers/TimerDxe/TimerDxe.c

@@ -7,7 +7,6 @@
 
 **/
 
-
 #include <PiDxe.h>
 
 #include <Library/ArmLib.h>
@@ -305,8 +304,7 @@ TimerInterruptHandler (
   gInterrupt->EndOfInterrupt (gInterrupt, Source);
 
   // Check if the timer interrupt is active
-  if ((ArmGenericTimerGetTimerCtrlReg () ) & ARM_ARCH_TIMER_ISTATUS) {
+  if ((ArmGenericTimerGetTimerCtrlReg ()) & ARM_ARCH_TIMER_ISTATUS) {
-
     if (mTimerNotifyFunction != 0) {
       mTimerNotifyFunction (mTimerPeriod * mElapsedPeriod);
     }
@@ -338,7 +336,6 @@ TimerInterruptHandler (
   gBS->RestoreTPL (OriginalTPL);
 }
 
-
 /**
   Initialize the state information for the Timer Architectural Protocol and
   the Timer Debug support protocol that allows the debugger to break into a
@@ -405,17 +402,18 @@ TimerInitialize (
   ASSERT_EFI_ERROR (Status);
 
   // Set up default timer
-  Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
+  Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32 (PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
   ASSERT_EFI_ERROR (Status);
 
   Handle = NULL;
   // Install the Timer Architectural Protocol onto a new handle
-  Status = gBS->InstallMultipleProtocolInterfaces(
+  Status = gBS->InstallMultipleProtocolInterfaces (
                   &Handle,
-                  &gEfiTimerArchProtocolGuid,      &gTimer,
+                  &gEfiTimerArchProtocolGuid,
+                  &gTimer,
                   NULL
                   );
-  ASSERT_EFI_ERROR(Status);
+  ASSERT_EFI_ERROR (Status);
 
   // Everything is ready, unmask and enable timer interrupts
   TimerCtrlReg = ARM_ARCH_TIMER_ENABLE;

ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c

@@ -60,10 +60,12 @@ typedef struct {
 
 SEMIHOST_DEVICE_PATH  gDevicePath = {
   {
-    { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 } },
+    { HARDWARE_DEVICE_PATH, HW_VENDOR_DP,                   { sizeof (VENDOR_DEVICE_PATH),       0 }
+    },
     EFI_CALLER_ID_GUID
   },
-  { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } }
+  { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }
+  }
 };
 
 typedef struct {
@@ -115,8 +117,6 @@ FreeFCB (
   FreePool (Fcb);
 }
 
-
-
 EFI_STATUS
 VolumeOpen (
   IN  EFI_SIMPLE_FILE_SYSTEM_PROTOCOL  *This,
@@ -191,14 +191,16 @@ FileOpen (
     return EFI_INVALID_PARAMETER;
   }
 
-  if ( (OpenMode != EFI_FILE_MODE_READ) &&
+  if ((OpenMode != EFI_FILE_MODE_READ) &&
       (OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE)) &&
-       (OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)) ) {
+      (OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
   if (((OpenMode & EFI_FILE_MODE_CREATE) != 0) &&
-      ((Attributes & EFI_FILE_DIRECTORY) != 0)) {
+      ((Attributes & EFI_FILE_DIRECTORY) != 0))
+  {
     return EFI_WRITE_PROTECTED;
   }
 
@@ -207,13 +209,15 @@ FileOpen (
   if (AsciiFileName == NULL) {
     return EFI_OUT_OF_RESOURCES;
   }
+
   UnicodeStrToAsciiStrS (FileName, AsciiFileName, Length);
 
   // Opening '/', '\', '.', or the NULL pathname is trying to open the root directory
   if ((AsciiStrCmp (AsciiFileName, "\\") == 0) ||
       (AsciiStrCmp (AsciiFileName, "/")  == 0) ||
       (AsciiStrCmp (AsciiFileName, "")   == 0) ||
-      (AsciiStrCmp (AsciiFileName, ".")  == 0)    ) {
+      (AsciiStrCmp (AsciiFileName, ".")  == 0))
+  {
     FreePool (AsciiFileName);
     return (VolumeOpen (&gSemihostFs, NewHandle));
   }
@@ -232,6 +236,7 @@ FileOpen (
   } else {
     SemihostMode = SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE;
   }
+
   Return = SemihostFileOpen (AsciiFileName, SemihostMode, &SemihostHandle);
 
   if (RETURN_ERROR (Return)) {
@@ -346,6 +351,7 @@ TruncateFile (
     if (RETURN_ERROR (Return)) {
       goto Error;
     }
+
     Remaining -= ToRead;
     Read      += ToRead;
   }
@@ -379,12 +385,12 @@ Error:
   if (FileHandle != 0) {
     SemihostFileClose (FileHandle);
   }
+
   if (Buffer != NULL) {
     FreePool (Buffer);
   }
 
   return (Status);
-
 }
 
 /**
@@ -408,7 +414,7 @@ FileClose (
     return EFI_INVALID_PARAMETER;
   }
 
-  Fcb = SEMIHOST_FCB_FROM_THIS(This);
+  Fcb = SEMIHOST_FCB_FROM_THIS (This);
 
   if (!Fcb->IsRoot) {
     SemihostFileClose (Fcb->SemihostHandle);
@@ -420,6 +426,7 @@ FileClose (
     if (Fcb->Info.FileSize < Fcb->Info.PhysicalSize) {
       TruncateFile (Fcb->FileName, Fcb->Info.FileSize);
     }
+
     FreePool (Fcb->FileName);
   }
 
@@ -471,6 +478,7 @@ FileDelete (
     if (RETURN_ERROR (Return)) {
       return EFI_WARN_DELETE_FAILURE;
     }
+
     return EFI_SUCCESS;
   } else {
     return EFI_WARN_DELETE_FAILURE;
@@ -566,14 +574,15 @@ ExtendFile (
   }
 
   Remaining = Size;
-  SetMem (WriteBuffer, 0, sizeof(WriteBuffer));
+  SetMem (WriteBuffer, 0, sizeof (WriteBuffer));
   while (Remaining > 0) {
-    WriteNb = MIN (Remaining, sizeof(WriteBuffer));
+    WriteNb   = MIN (Remaining, sizeof (WriteBuffer));
     WriteSize = WriteNb;
     Return    = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, WriteBuffer);
     if (RETURN_ERROR (Return)) {
       return EFI_DEVICE_ERROR;
     }
+
     Remaining -= WriteNb;
   }
 
@@ -617,8 +626,9 @@ FileWrite (
   Fcb = SEMIHOST_FCB_FROM_THIS (This);
 
   // We cannot write a read-only file
-  if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
+  if (  (Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
-      || !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
+     || !(Fcb->OpenMode & EFI_FILE_MODE_WRITE))
+  {
     return EFI_ACCESS_DENIED;
   }
 
@@ -632,6 +642,7 @@ FileWrite (
     if (EFI_ERROR (Status)) {
       return Status;
     }
+
     Fcb->Info.FileSize = Fcb->Position;
   }
 
@@ -650,6 +661,7 @@ FileWrite (
   if (RETURN_ERROR (Return)) {
     return EFI_DEVICE_ERROR;
   }
+
   Fcb->Info.PhysicalSize = Length;
 
   return EFI_SUCCESS;
@@ -678,7 +690,7 @@ FileGetPosition (
     return EFI_INVALID_PARAMETER;
   }
 
-  Fcb = SEMIHOST_FCB_FROM_THIS(This);
+  Fcb = SEMIHOST_FCB_FROM_THIS (This);
 
   *Position = Fcb->Position;
 
@@ -718,8 +730,7 @@ FileSetPosition (
     if (Position != 0) {
       return EFI_UNSUPPORTED;
     }
-  }
+  } else {
-  else {
     //
     // UEFI Spec section 12.5:
     // "Seeking to position 0xFFFFFFFFFFFFFFFF causes the current position to
@@ -728,6 +739,7 @@ FileSetPosition (
     if (Position == 0xFFFFFFFFFFFFFFFF) {
       Position = Fcb->Info.FileSize;
     }
+
     Return = SemihostFileSeek (Fcb->SemihostHandle, MIN (Position, Fcb->Info.FileSize));
     if (RETURN_ERROR (Return)) {
       return EFI_DEVICE_ERROR;
@@ -767,7 +779,7 @@ GetFileInfo (
 
   if (Fcb->IsRoot) {
     NameSize   = 0;
-    ResultSize = SIZE_OF_EFI_FILE_INFO + sizeof(CHAR16);
+    ResultSize = SIZE_OF_EFI_FILE_INFO + sizeof (CHAR16);
   } else {
     NameSize   = AsciiStrLen (Fcb->FileName) + 1;
     ResultSize = SIZE_OF_EFI_FILE_INFO + NameSize * sizeof (CHAR16);
@@ -889,11 +901,12 @@ FileGetInfo (
   if ((This == NULL)                         ||
       (InformationType == NULL)              ||
       (BufferSize == NULL)                   ||
-      ((Buffer == NULL) && (*BufferSize > 0))  ) {
+      ((Buffer == NULL) && (*BufferSize > 0)))
+  {
     return EFI_INVALID_PARAMETER;
   }
 
-  Fcb = SEMIHOST_FCB_FROM_THIS(This);
+  Fcb = SEMIHOST_FCB_FROM_THIS (This);
 
   if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
     Status = GetFilesystemInfo (Fcb, BufferSize, Buffer);
@@ -968,6 +981,7 @@ SetFileInfo (
   if (AsciiFileName == NULL) {
     return EFI_OUT_OF_RESOURCES;
   }
+
   UnicodeStrToAsciiStrS (Info->FileName, AsciiFileName, Length);
 
   FileSizeIsDifferent = (Info->FileSize != Fcb->Info.FileSize);
@@ -985,7 +999,8 @@ SetFileInfo (
   // description.
   //
   if ((Fcb->OpenMode == EFI_FILE_MODE_READ)     ||
-      (Fcb->Info.Attribute & EFI_FILE_READ_ONLY)  ) {
+      (Fcb->Info.Attribute & EFI_FILE_READ_ONLY))
+  {
     if (FileSizeIsDifferent || FileNameIsDifferent || ReadOnlyIsDifferent) {
       Status = EFI_ACCESS_DENIED;
       goto Error;
@@ -1006,6 +1021,7 @@ SetFileInfo (
       if (EFI_ERROR (Status)) {
         goto Error;
       }
+
       //
       // The read/write position from the host file system point of view
       // is at the end of the file. If the position from this module
@@ -1016,12 +1032,14 @@ SetFileInfo (
         FileSetPosition (&Fcb->File, Fcb->Position);
       }
     }
+
     Fcb->Info.FileSize = FileSize;
 
     Return = SemihostFileLength (Fcb->SemihostHandle, &Length);
     if (RETURN_ERROR (Return)) {
       goto Error;
     }
+
     Fcb->Info.PhysicalSize = Length;
   }
 
@@ -1048,6 +1066,7 @@ SetFileInfo (
     if (RETURN_ERROR (Return)) {
       goto Error;
     }
+
     FreePool (Fcb->FileName);
     Fcb->FileName = AsciiFileName;
     AsciiFileName = NULL;
@@ -1119,19 +1138,24 @@ FileSetInfo (
     if (Info->Size < (SIZE_OF_EFI_FILE_INFO + StrSize (Info->FileName))) {
       return EFI_INVALID_PARAMETER;
     }
+
     if (BufferSize < Info->Size) {
       return EFI_BAD_BUFFER_SIZE;
     }
+
     return SetFileInfo (Fcb, Info);
   } else if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
     SystemInfo = Buffer;
     if (SystemInfo->Size <
-        (SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel))) {
+        (SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel)))
+    {
       return EFI_INVALID_PARAMETER;
     }
+
     if (BufferSize < SystemInfo->Size) {
       return EFI_BAD_BUFFER_SIZE;
     }
+
     Buffer = SystemInfo->VolumeLabel;
 
     if (StrSize (Buffer) > 0) {
@@ -1160,13 +1184,14 @@ FileFlush (
 {
   SEMIHOST_FCB  *Fcb;
 
-  Fcb = SEMIHOST_FCB_FROM_THIS(File);
+  Fcb = SEMIHOST_FCB_FROM_THIS (File);
 
   if (Fcb->IsRoot) {
     return EFI_SUCCESS;
   } else {
-    if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
+    if (  (Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
-        || !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
+       || !(Fcb->OpenMode & EFI_FILE_MODE_WRITE))
+    {
       return EFI_ACCESS_DENIED;
     } else {
       return EFI_SUCCESS;
@@ -1192,12 +1217,14 @@ SemihostFsEntryPoint (
 
     Status = gBS->InstallMultipleProtocolInterfaces (
                     &gInstallHandle,
-                    &gEfiSimpleFileSystemProtocolGuid, &gSemihostFs,
+                    &gEfiSimpleFileSystemProtocolGuid,
-                    &gEfiDevicePathProtocolGuid,       &gDevicePath,
+                    &gSemihostFs,
+                    &gEfiDevicePathProtocolGuid,
+                    &gDevicePath,
                     NULL
                     );
 
-    if (EFI_ERROR(Status)) {
+    if (EFI_ERROR (Status)) {
       FreePool (mSemihostFsLabel);
     }
   }

ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h

@@ -243,4 +243,3 @@ FileFlush (
   );
 
 #endif // SEMIHOST_FS_H_
-

ArmPkg/Include/AsmMacroIoLib.h

@@ -9,7 +9,6 @@
 
 **/
 
-
 #ifndef ASM_MACRO_IO_LIB_H_
 #define ASM_MACRO_IO_LIB_H_
 

ArmPkg/Include/AsmMacroIoLibV8.h

@@ -9,7 +9,6 @@
 
 **/
 
-
 #ifndef ASM_MACRO_IO_LIBV8_H_
 #define ASM_MACRO_IO_LIBV8_H_
 
@@ -24,7 +23,6 @@
         cbnz   SAFE_XREG, 1f        ;\
         b      .                    ;// We should never get here
 
-
 // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
 // This only selects between EL1 and EL2 and EL3, else we die.
 // Provide the Macro with a safe temp xreg to use.

ArmPkg/Include/Chipset/AArch64Mmu.h

@@ -17,7 +17,7 @@
 #define MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH  0xBBULL
 #define MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK     0xFFULL
 
-#define MAIR_ATTR(n,value)                      ((value) << (((n) >> 2)*8))
+#define MAIR_ATTR(n, value)  ((value) << (((n) >> 2)*8))
 
 //
 // Long-descriptor Translation Table format
@@ -152,7 +152,6 @@
 #define TCR_EL1_TBI0_MASK    (0x01UL << TCR_EL1_TBI0_FIELD)
 #define TCR_EL1_TBI1_MASK    (0x01UL << TCR_EL1_TBI1_FIELD)
 
-
 #define TCR_EL23_T0SZ_FIELD   (0)
 #define TCR_EL23_IRGN0_FIELD  (8)
 #define TCR_EL23_ORGN0_FIELD  (10)
@@ -166,7 +165,6 @@
 #define TCR_EL23_TG0_MASK     (0x01UL << TCR_EL23_TG0_FIELD)
 #define TCR_EL23_PS_MASK      (0x07UL << TCR_EL23_PS_FIELD)
 
-
 #define TCR_RGN_OUTER_NON_CACHEABLE        (0x0UL << 10)
 #define TCR_RGN_OUTER_WRITE_BACK_ALLOC     (0x1UL << 10)
 #define TCR_RGN_OUTER_WRITE_THROUGH        (0x2UL << 10)
@@ -195,4 +193,3 @@
 // Uses LPAE Page Table format
 
 #endif // AARCH64_MMU_H_
-

ArmPkg/Include/Chipset/ArmCortexA9.h

@@ -48,7 +48,6 @@
 #define A9_SCU_SACR_OFFSET        0x50
 #define A9_SCU_SSACR_OFFSET       0x54
 
-
 UINTN
 EFIAPI
 ArmGetScuBaseAddress (
@@ -56,4 +55,3 @@ ArmGetScuBaseAddress (
   );
 
 #endif // ARM_CORTEX_A9_H_
-

ArmPkg/Include/Chipset/ArmV7.h

@@ -41,7 +41,6 @@
 #define CPSR_IRQ             (1 << 7)
 #define CPSR_FIQ             (1 << 6)
 
-
 // CPACR - Coprocessor Access Control Register definitions
 #define CPACR_CP_DENIED(cp)  0x00
 #define CPACR_CP_PRIV(cp)    ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)

ArmPkg/Include/Chipset/ArmV7Mmu.h

@@ -33,7 +33,6 @@
 #define TTBR_MP_NON_CACHEABLE        ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )
 #define TTBR_MP_WRITE_BACK_ALLOC     ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
 
-
 #define TRANSLATION_TABLE_SECTION_COUNT           4096
 #define TRANSLATION_TABLE_SECTION_SIZE            (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
 #define TRANSLATION_TABLE_SECTION_ALIGNMENT       (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
@@ -137,16 +136,16 @@
 #define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc)                         ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)
 #define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc)                         ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)
 #define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc)                          ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc,IsLargePage)      ((IsLargePage)? \
+#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc, IsLargePage)            ((IsLargePage)?\
                                                                     ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) << 11) & TT_DESCRIPTOR_LARGEPAGE_XN_MASK):    \
                                                                     ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_PAGE_XN_MASK))
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc,IsLargePage)      (IsLargePage? \
+#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc, IsLargePage)  (IsLargePage?    \
                                                                     (((Desc) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK): \
                                                                     (((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2)))))
 
 #define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc)  ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)
 
-#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc,IsLargePage)      (IsLargePage? \
+#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc, IsLargePage)  (IsLargePage?    \
                                                                     (((Desc) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK): \
                                                                     (((((Desc) & (0x3 << 6)) << 6) | (Desc & (0x3 << 2)))))
 

ArmPkg/Include/Guid/ArmMpCoreInfo.h

@@ -24,7 +24,7 @@ typedef struct {
   UINT64                  MailboxClearValue;
 } ARM_CORE_INFO;
 
-typedef struct{
+typedef struct {
   UINT64      Signature;
   UINT32      Length;
   UINT32      Revision;
@@ -43,12 +43,11 @@ typedef struct {
   ARM_CORE_INFO                 *ArmCpus;
 } ARM_PROCESSOR_TABLE;
 
-
 #define ARM_MP_CORE_INFO_GUID \
   { 0xa4ee0728, 0xe5d7, 0x4ac5,  {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
 
 #define EFI_ARM_PROCESSOR_TABLE_SIGNATURE         SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')
-#define EFI_ARM_PROCESSOR_TABLE_REVISION         0x00010000 //1.0
+#define EFI_ARM_PROCESSOR_TABLE_REVISION          0x00010000// 1.0
 #define EFI_ARM_PROCESSOR_TABLE_OEM_ID            SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')
 #define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID      SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')
 #define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION      0x00000001

ArmPkg/Include/IndustryStandard/ArmCache.h

@@ -18,17 +18,16 @@
 /// Defines the structure of the CSSELR (Cache Size Selection) register
 typedef union {
   struct {
-    UINT32    InD       :1;  ///< Instruction not Data bit
+    UINT32    InD      : 1;  ///< Instruction not Data bit
-    UINT32    Level     :3;  ///< Cache level (zero based)
+    UINT32    Level    : 3;  ///< Cache level (zero based)
-    UINT32    TnD       :1;  ///< Allocation not Data bit
+    UINT32    TnD      : 1;  ///< Allocation not Data bit
-    UINT32    Reserved  :27; ///< Reserved, RES0
+    UINT32    Reserved : 27; ///< Reserved, RES0
   } Bits;         ///< Bitfield definition of the register
   UINT32    Data; ///< The entire 32-bit value
 } CSSELR_DATA;
 
 /// The cache type values for the InD field of the CSSELR register
-typedef enum
+typedef enum {
-{
   /// Select the data or unified cache
   CsselrCacheTypeDataOrUnified = 0,
   /// Select the instruction cache
@@ -39,18 +38,18 @@ typedef enum
 /// Defines the structure of the CCSIDR (Current Cache Size ID) register
 typedef union {
   struct {
-    UINT64    LineSize           :3;  ///< Line size (Log2(Num bytes in cache) - 4)
+    UINT64    LineSize      : 3;      ///< Line size (Log2(Num bytes in cache) - 4)
-    UINT64    Associativity      :10; ///< Associativity - 1
+    UINT64    Associativity : 10;     ///< Associativity - 1
-    UINT64    NumSets            :15; ///< Number of sets in the cache -1
+    UINT64    NumSets       : 15;     ///< Number of sets in the cache -1
-    UINT64    Unknown            :4;  ///< Reserved, UNKNOWN
+    UINT64    Unknown       : 4;      ///< Reserved, UNKNOWN
-    UINT64    Reserved           :32; ///< Reserved, RES0
+    UINT64    Reserved      : 32;     ///< Reserved, RES0
   } BitsNonCcidx; ///< Bitfield definition of the register when FEAT_CCIDX is not supported.
   struct {
-    UINT64    LineSize           :3;  ///< Line size (Log2(Num bytes in cache) - 4)
+    UINT64    LineSize      : 3;      ///< Line size (Log2(Num bytes in cache) - 4)
-    UINT64    Associativity      :21; ///< Associativity - 1
+    UINT64    Associativity : 21;     ///< Associativity - 1
-    UINT64    Reserved1          :8;  ///< Reserved, RES0
+    UINT64    Reserved1     : 8;      ///< Reserved, RES0
-    UINT64    NumSets            :24; ///< Number of sets in the cache -1
+    UINT64    NumSets       : 24;     ///< Number of sets in the cache -1
-    UINT64    Reserved2          :8;  ///< Reserved, RES0
+    UINT64    Reserved2     : 8;      ///< Reserved, RES0
   } BitsCcidxAA64; ///< Bitfield definition of the register when FEAT_IDX is supported.
   struct {
     UINT64    LineSize      : 3;
@@ -64,8 +63,8 @@ typedef union {
 /// Defines the structure of the AARCH32 CCSIDR2 register.
 typedef union {
   struct {
-    UINT32 NumSets               :24; ///< Number of sets in the cache - 1
+    UINT32    NumSets  : 24;          ///< Number of sets in the cache - 1
-    UINT32 Reserved              :8;  ///< Reserved, RES0
+    UINT32    Reserved : 8;           ///< Reserved, RES0
   } Bits;         ///< Bitfield definition of the register
   UINT32    Data; ///< The entire 32-bit value
 } CCSIDR2_DATA;

ArmPkg/Include/Library/ArmGicArchLib.h

@@ -17,7 +17,6 @@ typedef enum {
   ARM_GIC_ARCH_REVISION_3
 } ARM_GIC_ARCH_REVISION;
 
-
 ARM_GIC_ARCH_REVISION
 EFIAPI
 ArmGicGetSupportedArchRevision (

ArmPkg/Include/Library/ArmGicLib.h

@@ -52,7 +52,6 @@
 #define ARM_GIC_ICDICFR_LEVEL_TRIGGERED  0x0  // Level triggered interrupt
 #define ARM_GIC_ICDICFR_EDGE_TRIGGERED   0x1  // Edge triggered interrupt
 
-
 // GIC Redistributor
 #define ARM_GICR_CTLR_FRAME_SIZE          SIZE_64KB
 #define ARM_GICR_SGI_PPI_FRAME_SIZE       SIZE_64KB
@@ -130,7 +129,7 @@ VOID
 EFIAPI
 ArmGicSetSecureInterrupts (
   IN  UINTN  GicDistributorBase,
-  IN  UINTN*        GicSecureInterruptMask,
+  IN  UINTN  *GicSecureInterruptMask,
   IN  UINTN  GicSecureInterruptMaskSize
   );
 

ArmPkg/Include/Library/ArmLib.h

@@ -15,7 +15,7 @@
 
 #ifdef MDE_CPU_ARM
   #include <Chipset/ArmV7.h>
-#elif defined(MDE_CPU_AARCH64)
+#elif defined (MDE_CPU_AARCH64)
   #include <Chipset/AArch64.h>
 #else
   #error "Unknown chipset."
@@ -59,8 +59,12 @@ typedef struct {
   ARM_MEMORY_REGION_ATTRIBUTES    Attributes;
 } ARM_MEMORY_REGION_DESCRIPTOR;
 
-typedef VOID (*CACHE_OPERATION)(VOID);
+typedef VOID (*CACHE_OPERATION)(
-typedef VOID (*LINE_OPERATION)(UINTN);
+  VOID
+  );
+typedef VOID (*LINE_OPERATION)(
+  UINTN
+  );
 
 //
 // ARM Processor Mode
@@ -183,7 +187,6 @@ ArmInvalidateDataCache (
   VOID
   );
 
-
 VOID
 EFIAPI
 ArmCleanInvalidateDataCache (
@@ -223,8 +226,8 @@ ArmInvalidateInstructionCacheEntryToPoUByMVA (
 VOID
 EFIAPI
 ArmCleanDataCacheEntryByMVA (
-IN  UINTN   Address
+  IN  UINTN  Address
-);
+  );
 
 VOID
 EFIAPI
@@ -573,7 +576,6 @@ ArmWriteHVBar (
   IN  UINTN  HypModeVectorBase
   );
 
-
 //
 // Helper functions for accessing CPU ACTLR
 //
@@ -736,7 +738,6 @@ ArmGetPhysicalAddressBits (
   VOID
   );
 
-
 ///
 ///  ID Register Helper functions
 ///
@@ -768,6 +769,7 @@ ArmHasCcidx (
 ///
 /// AArch32-only ID Register Helper functions
 ///
+
 /**
   Check whether the CPU supports the Security extensions
 
@@ -779,6 +781,7 @@ EFIAPI
 ArmHasSecurityExtensions (
   VOID
   );
+
 #endif // MDE_CPU_ARM
 
 #endif // ARM_LIB_H_

ArmPkg/Include/Library/ArmMtlLib.h

@@ -47,7 +47,7 @@ typedef struct {
 
 typedef struct {
   MTL_CHANNEL_TYPE           ChannelType;
-  MTL_MAILBOX      * CONST MailBox;
+  MTL_MAILBOX      *CONST    MailBox;
   MTL_DOORBELL               DoorBell;
 } MTL_CHANNEL;
 
@@ -71,7 +71,7 @@ MtlWaitUntilChannelFree (
 
   @retval UINT32*      Pointer to the payload.
 **/
-UINT32*
+UINT32 *
 MtlGetChannelPayload (
   IN MTL_CHANNEL  *Channel
   );
@@ -128,4 +128,3 @@ MtlReceiveMessage (
   );
 
 #endif /* ARM_MTL_LIB_H_ */
-

ArmPkg/Include/Library/OemMiscLib.h

@@ -8,15 +8,13 @@
 *
 **/
 
-
 #ifndef OEM_MISC_LIB_H_
 #define OEM_MISC_LIB_H_
 
 #include <Uefi.h>
 #include <IndustryStandard/SmBios.h>
 
-typedef enum
+typedef enum {
-{
   CpuCacheL1 = 1,
   CpuCacheL2,
   CpuCacheL3,
@@ -27,8 +25,7 @@ typedef enum
   CpuCacheLevelMax
 } OEM_MISC_CPU_CACHE_LEVEL;
 
-typedef struct
+typedef struct {
-{
   UINT8     Voltage;       ///< Processor voltage
   UINT16    CurrentSpeed;  ///< Current clock speed in MHz
   UINT16    MaxSpeed;      ///< Maximum clock speed in MHz
@@ -38,8 +35,7 @@ typedef struct
   UINT16    ThreadCount;   ///< Number of threads per processor
 } OEM_MISC_PROCESSOR_DATA;
 
-typedef enum
+typedef enum {
-{
   ProductNameType01,
   SerialNumType01,
   UuidType01,

ArmPkg/Include/Library/SemihostLib.h

@@ -81,7 +81,7 @@ SemihostFileLength (
 
 **/
 RETURN_STATUS
-SemihostFileTmpName(
+SemihostFileTmpName (
   OUT  VOID   *Buffer,
   IN   UINT8  Identifier,
   IN   UINTN  Length
@@ -104,7 +104,7 @@ SemihostFileRemove (
 
 **/
 RETURN_STATUS
-SemihostFileRename(
+SemihostFileRename (
   IN  CHAR8  *FileName,
   IN  CHAR8  *NewFileName
   );

ArmPkg/Include/Ppi/ArmMpCoreInfo.h

@@ -32,10 +32,10 @@
 **/
 typedef
 EFI_STATUS
-(EFIAPI * ARM_MP_CORE_INFO_GET) (
+(EFIAPI *ARM_MP_CORE_INFO_GET)(
   OUT UINTN                   *ArmCoreCount,
   OUT ARM_CORE_INFO           **ArmCoreTable
-);
+  );
 
 ///
 /// This service abstracts the ability to migrate contents of the platform early memory store.

ArmPkg/Include/Protocol/ArmScmi.h

@@ -18,4 +18,3 @@
 #define SCMI_MAX_STR_LEN  16
 
 #endif /* ARM_SCMI_H_ */
-

ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h

@@ -50,7 +50,7 @@ typedef struct _SCMI_BASE_PROTOCOL SCMI_BASE_PROTOCOL;
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_BASE_GET_VERSION) (
+(EFIAPI *SCMI_BASE_GET_VERSION)(
   IN  SCMI_BASE_PROTOCOL  *This,
   OUT UINT32              *Version
   );
@@ -67,7 +67,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_BASE_GET_TOTAL_PROTOCOLS) (
+(EFIAPI *SCMI_BASE_GET_TOTAL_PROTOCOLS)(
   IN  SCMI_BASE_PROTOCOL  *This,
   OUT UINT32              *TotalProtocols
   );
@@ -85,7 +85,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_BASE_DISCOVER_VENDOR) (
+(EFIAPI *SCMI_BASE_DISCOVER_VENDOR)(
   IN  SCMI_BASE_PROTOCOL  *This,
   OUT UINT8               VendorIdentifier[SCMI_MAX_STR_LEN]
   );
@@ -103,7 +103,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_BASE_DISCOVER_SUB_VENDOR) (
+(EFIAPI *SCMI_BASE_DISCOVER_SUB_VENDOR)(
   IN  SCMI_BASE_PROTOCOL  *This,
   OUT UINT8               VendorIdentifier[SCMI_MAX_STR_LEN]
   );
@@ -120,7 +120,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_BASE_DISCOVER_IMPLEMENTATION_VERSION) (
+(EFIAPI *SCMI_BASE_DISCOVER_IMPLEMENTATION_VERSION)(
   IN  SCMI_BASE_PROTOCOL  *This,
   OUT UINT32              *ImplementationVersion
   );
@@ -141,7 +141,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_BASE_DISCOVER_LIST_PROTOCOLS) (
+(EFIAPI *SCMI_BASE_DISCOVER_LIST_PROTOCOLS)(
   IN     SCMI_BASE_PROTOCOL  *This,
   IN OUT UINT32              *ProtocolListSize,
   OUT    UINT8               *ProtocolList

ArmPkg/Include/Protocol/ArmScmiClock2Protocol.h

@@ -15,7 +15,7 @@
 #include <Protocol/ArmScmi.h>
 #include <Protocol/ArmScmiClockProtocol.h>
 
-#define ARM_SCMI_CLOCK2_PROTOCOL_GUID { \
+#define ARM_SCMI_CLOCK2_PROTOCOL_GUID  {\
   0xb8d8caf2, 0x9e94, 0x462c, { 0xa8, 0x34, 0x6c, 0x99, 0xfc, 0x05, 0xef, 0xcf } \
   }
 
@@ -39,7 +39,7 @@ typedef struct _SCMI_CLOCK2_PROTOCOL SCMI_CLOCK2_PROTOCOL;
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK2_GET_VERSION) (
+(EFIAPI *SCMI_CLOCK2_GET_VERSION)(
   IN  SCMI_CLOCK2_PROTOCOL  *This,
   OUT UINT32                *Version
   );
@@ -57,7 +57,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK2_GET_TOTAL_CLOCKS) (
+(EFIAPI *SCMI_CLOCK2_GET_TOTAL_CLOCKS)(
   IN  SCMI_CLOCK2_PROTOCOL  *This,
   OUT UINT32                *TotalClocks
   );
@@ -77,7 +77,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES) (
+(EFIAPI *SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES)(
   IN  SCMI_CLOCK2_PROTOCOL  *This,
   IN  UINT32                ClockId,
   OUT BOOLEAN               *Enabled,
@@ -109,7 +109,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK2_DESCRIBE_RATES) (
+(EFIAPI *SCMI_CLOCK2_DESCRIBE_RATES)(
   IN     SCMI_CLOCK2_PROTOCOL     *This,
   IN     UINT32                   ClockId,
   OUT    SCMI_CLOCK_RATE_FORMAT   *Format,
@@ -131,7 +131,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK2_RATE_GET) (
+(EFIAPI *SCMI_CLOCK2_RATE_GET)(
   IN  SCMI_CLOCK2_PROTOCOL  *This,
   IN  UINT32                ClockId,
   OUT UINT64                *Rate
@@ -149,7 +149,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK2_RATE_SET) (
+(EFIAPI *SCMI_CLOCK2_RATE_SET)(
   IN SCMI_CLOCK2_PROTOCOL   *This,
   IN UINT32                 ClockId,
   IN UINT64                 Rate
@@ -168,7 +168,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK2_ENABLE) (
+(EFIAPI *SCMI_CLOCK2_ENABLE)(
   IN SCMI_CLOCK2_PROTOCOL   *This,
   IN UINT32                 ClockId,
   IN BOOLEAN                Enable

ArmPkg/Include/Protocol/ArmScmiClockProtocol.h

@@ -14,7 +14,7 @@
 
 #include <Protocol/ArmScmi.h>
 
-#define ARM_SCMI_CLOCK_PROTOCOL_GUID { \
+#define ARM_SCMI_CLOCK_PROTOCOL_GUID  {\
   0x91ce67a8, 0xe0aa, 0x4012, {0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa} \
   }
 
@@ -89,7 +89,7 @@ typedef struct _SCMI_CLOCK_PROTOCOL SCMI_CLOCK_PROTOCOL;
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK_GET_VERSION) (
+(EFIAPI *SCMI_CLOCK_GET_VERSION)(
   IN  SCMI_CLOCK_PROTOCOL  *This,
   OUT UINT32               *Version
   );
@@ -107,7 +107,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK_GET_TOTAL_CLOCKS) (
+(EFIAPI *SCMI_CLOCK_GET_TOTAL_CLOCKS)(
   IN  SCMI_CLOCK_PROTOCOL  *This,
   OUT UINT32               *TotalClocks
   );
@@ -127,7 +127,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK_GET_CLOCK_ATTRIBUTES) (
+(EFIAPI *SCMI_CLOCK_GET_CLOCK_ATTRIBUTES)(
   IN  SCMI_CLOCK_PROTOCOL  *This,
   IN  UINT32               ClockId,
   OUT BOOLEAN              *Enabled,
@@ -159,7 +159,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK_DESCRIBE_RATES) (
+(EFIAPI *SCMI_CLOCK_DESCRIBE_RATES)(
   IN     SCMI_CLOCK_PROTOCOL     *This,
   IN     UINT32                   ClockId,
   OUT    SCMI_CLOCK_RATE_FORMAT  *Format,
@@ -181,7 +181,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK_RATE_GET) (
+(EFIAPI *SCMI_CLOCK_RATE_GET)(
   IN  SCMI_CLOCK_PROTOCOL  *This,
   IN  UINT32               ClockId,
   OUT UINT64               *Rate
@@ -199,7 +199,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_CLOCK_RATE_SET) (
+(EFIAPI *SCMI_CLOCK_RATE_SET)(
   IN SCMI_CLOCK_PROTOCOL  *This,
   IN UINT32               ClockId,
   IN UINT64               Rate
@@ -215,4 +215,3 @@ typedef struct _SCMI_CLOCK_PROTOCOL {
 } SCMI_CLOCK_PROTOCOL;
 
 #endif /* ARM_SCMI_CLOCK_PROTOCOL_H_ */
-

ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h

@@ -92,7 +92,7 @@ typedef struct {
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_PERFORMANCE_GET_VERSION) (
+(EFIAPI *SCMI_PERFORMANCE_GET_VERSION)(
   IN  SCMI_PERFORMANCE_PROTOCOL  *This,
   OUT UINT32                     *Version
   );
@@ -109,7 +109,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_PERFORMANCE_GET_ATTRIBUTES) (
+(EFIAPI *SCMI_PERFORMANCE_GET_ATTRIBUTES)(
   IN  SCMI_PERFORMANCE_PROTOCOL              *This,
   OUT SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES   *Attributes
 
@@ -128,7 +128,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_PERFORMANCE_GET_DOMAIN_ATTRIBUTES) (
+(EFIAPI *SCMI_PERFORMANCE_GET_DOMAIN_ATTRIBUTES)(
   IN  SCMI_PERFORMANCE_PROTOCOL           *This,
   IN  UINT32                               DomainId,
   OUT SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES  *DomainAttributes
@@ -153,7 +153,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_PERFORMANCE_DESCRIBE_LEVELS) (
+(EFIAPI *SCMI_PERFORMANCE_DESCRIBE_LEVELS)(
   IN     SCMI_PERFORMANCE_PROTOCOL  *This,
   IN     UINT32                     DomainId,
   OUT    UINT32                     *NumLevels,
@@ -173,7 +173,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_PERFORMANCE_LIMITS_SET) (
+(EFIAPI *SCMI_PERFORMANCE_LIMITS_SET)(
   IN SCMI_PERFORMANCE_PROTOCOL *This,
   IN UINT32                    DomainId,
   IN SCMI_PERFORMANCE_LIMITS   *Limits
@@ -192,7 +192,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_PERFORMANCE_LIMITS_GET) (
+(EFIAPI *SCMI_PERFORMANCE_LIMITS_GET)(
   SCMI_PERFORMANCE_PROTOCOL *This,
   UINT32                    DomainId,
   SCMI_PERFORMANCE_LIMITS   *Limits
@@ -210,7 +210,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_PERFORMANCE_LEVEL_SET) (
+(EFIAPI *SCMI_PERFORMANCE_LEVEL_SET)(
   IN SCMI_PERFORMANCE_PROTOCOL *This,
   IN UINT32                    DomainId,
   IN UINT32                    Level
@@ -229,7 +229,7 @@ EFI_STATUS
 **/
 typedef
 EFI_STATUS
-(EFIAPI *SCMI_PERFORMANCE_LEVEL_GET) (
+(EFIAPI *SCMI_PERFORMANCE_LEVEL_GET)(
   IN  SCMI_PERFORMANCE_PROTOCOL *This,
   IN  UINT32                    DomainId,
   OUT UINT32                    *Level
@@ -256,4 +256,3 @@ typedef enum {
 } SCMI_MESSAGE_ID_PERFORMANCE;
 
 #endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_H_ */
-

ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c

@@ -7,7 +7,6 @@
 
 **/
 
-
 #include <Base.h>
 #include <Library/ArmLib.h>
 #include <Library/BaseLib.h>
@@ -25,7 +24,6 @@
 #define MULT_U64_X_N  MultU64x64
 #endif
 
-
 RETURN_STATUS
 EFIAPI
 TimerConstructor (
@@ -36,7 +34,6 @@ TimerConstructor (
   // Check if the ARM Generic Timer Extension is implemented.
   //
   if (ArmIsArchTimerImplemented ()) {
-
     //
     // Check if Architectural Timer frequency is pre-determined by the platform
     // (ie. nonzero).
@@ -49,7 +46,7 @@ TimerConstructor (
       //
       ASSERT (TICKS_PER_MICRO_SEC);
 
-#ifdef MDE_CPU_ARM
+ #ifdef MDE_CPU_ARM
       //
       // Only set the frequency for ARMv7. We expect the secure firmware to
       // have already done it.
@@ -59,7 +56,8 @@ TimerConstructor (
       if (ArmHasSecurityExtensions ()) {
         ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
       }
-#endif
+
+ #endif
     }
 
     //
@@ -68,7 +66,6 @@ TimerConstructor (
     // If the reset value (0) is returned, just ASSERT.
     //
     ASSERT (ArmGenericTimerGetTimerFreq () != 0);
-
   } else {
     DEBUG ((DEBUG_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library cannot be used.\n"));
     ASSERT (0);
@@ -96,10 +93,10 @@ GetPlatformTimerFreq (
   if (TimerFreq == 0) {
     TimerFreq = ArmGenericTimerGetTimerFreq ();
   }
+
   return TimerFreq;
 }
 
-
 /**
   Stalls the CPU for the number of microseconds specified by MicroSeconds.
 
@@ -141,7 +138,6 @@ MicroSecondDelay (
   return MicroSeconds;
 }
 
-
 /**
   Stalls the CPU for at least the given number of nanoseconds.
 
@@ -225,7 +221,7 @@ GetPerformanceCounterProperties (
 {
   if (StartValue != NULL) {
     // Timer starts at 0
-    *StartValue = (UINT64)0ULL ;
+    *StartValue = (UINT64)0ULL;
   }
 
   if (EndValue != NULL) {
@@ -267,7 +263,8 @@ GetTimeInNanoSecond (
                   DivU64x32Remainder (
                     Ticks,
                     TimerFreq,
-                    &Remainder),
+                    &Remainder
+                    ),
                   1000000000U
                   );
 
@@ -277,8 +274,9 @@ GetTimeInNanoSecond (
   //
   NanoSeconds += DivU64x32 (
                    MULT_U64_X_N (
-                     (UINT64) Remainder,
+                     (UINT64)Remainder,
-                     1000000000U),
+                     1000000000U
+                     ),
                    TimerFreq
                    );
 

ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c

@@ -31,9 +31,10 @@ CacheRangeOperation (
 
   // Perform the line operation on an address in each cache line
   while (AlignedAddress < EndAddress) {
-    LineOperation(AlignedAddress);
+    LineOperation (AlignedAddress);
     AlignedAddress += LineLength;
   }
+
   ArmDataSynchronizationBarrier ();
 }
 
@@ -62,11 +63,18 @@ InvalidateInstructionCacheRange (
   IN      UINTN  Length
   )
 {
-  CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,
+  CacheRangeOperation (
-    ArmDataCacheLineLength ());
+    Address,
-  CacheRangeOperation (Address, Length,
+    Length,
+    ArmCleanDataCacheEntryToPoUByMVA,
+    ArmDataCacheLineLength ()
+    );
+  CacheRangeOperation (
+    Address,
+    Length,
     ArmInvalidateInstructionCacheEntryToPoUByMVA,
-    ArmInstructionCacheLineLength ());
+    ArmInstructionCacheLineLength ()
+    );
 
   ArmInstructionSynchronizationBarrier ();
 
@@ -89,8 +97,12 @@ WriteBackInvalidateDataCacheRange (
   IN      UINTN  Length
   )
 {
-  CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,
+  CacheRangeOperation (
-    ArmDataCacheLineLength ());
+    Address,
+    Length,
+    ArmCleanInvalidateDataCacheEntryByMVA,
+    ArmDataCacheLineLength ()
+    );
   return Address;
 }
 
@@ -110,8 +122,12 @@ WriteBackDataCacheRange (
   IN      UINTN  Length
   )
 {
-  CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,
+  CacheRangeOperation (
-    ArmDataCacheLineLength ());
+    Address,
+    Length,
+    ArmCleanDataCacheEntryByMVA,
+    ArmDataCacheLineLength ()
+    );
   return Address;
 }
 
@@ -122,7 +138,11 @@ InvalidateDataCacheRange (
   IN      UINTN  Length
   )
 {
-  CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,
+  CacheRangeOperation (
-    ArmDataCacheLineLength ());
+    Address,
+    Length,
+    ArmInvalidateDataCacheEntryByMVA,
+    ArmDataCacheLineLength ()
+    );
   return Address;
 }

ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c

@@ -69,7 +69,6 @@ CHAR8 *gLdmStack[] = {
 
 #define LDM_EXT(_reg, _off)  ((_reg == 13) ? gLdmStack[(_off)] : gLdmAdr[(_off)])
 
-
 #define SIGN(_U)       ((_U) ? "" : "-")
 #define WRITE(_Write)  ((_Write) ? "!" : "")
 #define BYTE(_B)       ((_B) ? "B":"")
@@ -110,9 +109,11 @@ MRegList (
       }
     }
   }
+
   if (First) {
     AsciiStrCatS (mMregListStr, sizeof mMregListStr, "ERROR");
   }
+
   AsciiStrCatS (mMregListStr, sizeof mMregListStr, "}");
 
   // BugBug: Make caller pass in buffer it is cleaner
@@ -136,7 +137,6 @@ RotateRight (
   return (Op >> Shift) | (Op << (32 - Shift));
 }
 
-
 /**
   Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
   point to next instruction.
@@ -181,7 +181,6 @@ DisassembleArmInstruction (
   Rd        = (OpCode >> 12) & 0xf;
   Rm        = (OpCode & 0xf);
 
-
   if (Extended) {
     Index = AsciiSPrint (Buf, Size, "0x%08x   ", OpCode);
     Buf  += Index;
@@ -197,6 +196,7 @@ DisassembleArmInstruction (
       // A4.1.103  STREX{<cond>} <Rd>, <Rm>, [<Rn>]
       AsciiSPrint (Buf, Size, "STREX%a %a, %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn], gReg[Rn]);
     }
+
     return;
   }
 
@@ -206,23 +206,25 @@ DisassembleArmInstruction (
       // A4.1.20 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers>
       // A4.1.21 LDM{<cond>}<addressing_mode> <Rn>, <registers_without_pc>^
       // A4.1.22 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers_and_pc>^
-      AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
+      AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn, (OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
     } else {
       // A4.1.97 STM{<cond>}<addressing_mode> <Rn>{!}, <registers>
       // A4.1.98 STM{<cond>}<addressing_mode> <Rn>, <registers>^
-      AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
+      AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn, (OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
     }
+
     return;
   }
 
   // LDR/STR Address Mode 2
-  if ( ((OpCode  & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000 ) == 0xf550f000) ) {
+  if (((OpCode  & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000) == 0xf550f000)) {
     Offset12 = OpCode & 0xfff;
-    if ((OpCode & 0xfd70f000 ) == 0xf550f000) {
+    if ((OpCode & 0xfd70f000) == 0xf550f000) {
       Index = AsciiSPrint (Buf, Size, "PLD");
     } else {
-      Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T":"", gReg[Rd]);
+      Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T" : "", gReg[Rd]);
     }
+
     if (Pre) {
       if (!Imm) {
         // A5.2.2 [<Rn>, #+/-<offset_12>]
@@ -255,7 +257,8 @@ DisassembleArmInstruction (
 
         AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm, WRITE (Write));
       }
-    } else {  // !Pre
+    } else {
+      // !Pre
       if (!Imm) {
         // A5.2.8  [<Rn>], #+/-<offset_12>
         AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (Up), Offset12);
@@ -287,6 +290,7 @@ DisassembleArmInstruction (
         AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm);
       }
     }
+
     return;
   }
 
@@ -337,6 +341,7 @@ DisassembleArmInstruction (
         AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);
       }
     }
+
     return;
   }
 
@@ -371,15 +376,20 @@ DisassembleArmInstruction (
       AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f));
     } else {
       IMod  = (OpCode >> 18) & 0x3;
-      Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a",
+      Index = AsciiSPrint (
-                      (IMod == 3) ? "ID":"IE",
+                Buf,
-                      ((OpCode & BIT8) != 0) ? "A":"",
+                Size,
-                      ((OpCode & BIT7) != 0) ? "I":"",
+                "CPS%a %a%a%a",
-                      ((OpCode & BIT6) != 0) ? "F":"");
+                (IMod == 3) ? "ID" : "IE",
+                ((OpCode & BIT8) != 0) ? "A" : "",
+                ((OpCode & BIT7) != 0) ? "I" : "",
+                ((OpCode & BIT6) != 0) ? "F" : ""
+                );
       if ((OpCode & BIT17) != 0) {
         AsciiSPrint (&Buf[Index], Size - Index, ", #0x%x", OpCode & 0x1f);
       }
     }
+
     return;
   }
 
@@ -395,7 +405,6 @@ DisassembleArmInstruction (
     return;
   }
 
-
   if ((OpCode  & 0x0db00000) == 0x01200000) {
     // A4.1.38 MSR{<cond>} CPSR_<fields>, #<immediate> MSR{<cond>} CPSR_<fields>, <Rm>
     if (Imm) {
@@ -405,6 +414,7 @@ DisassembleArmInstruction (
       // MSR{<cond>} CPSR_<fields>, <Rm>
       AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), WriteBack ? "SPSR" : "CPSR", gReg[Rd]);
     }
+
     return;
   }
 
@@ -417,9 +427,9 @@ DisassembleArmInstruction (
   if ((OpCode  & 0x0e000000) == 0x0c000000) {
     // A4.1.19 LDC and A4.1.96 SDC
     if ((OpCode & 0xf0000000) == 0xf0000000) {
-      Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", Load ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);
+      Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", Load ? "LDC" : "SDC", (OpCode >> 8) & 0xf, Rd);
     } else {
-      Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ",  Load ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);
+      Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", Load ? "LDC" : "SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);
     }
 
     if (!Pre) {
@@ -434,18 +444,17 @@ DisassembleArmInstruction (
       // A5.5.5.2 [<Rn>, #+/-<offset_8>*4 ]!
       AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (Up), OpCode & 0xff, WRITE (Write));
     }
-
   }
 
   if ((OpCode  & 0x0f000010) == 0x0e000010) {
     // A4.1.32 MRC2, MCR2
-    AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", Load ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);
+    AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", Load ? "MRC" : "MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);
     return;
   }
 
   if ((OpCode  & 0x0ff00000) == 0x0c400000) {
     // A4.1.33 MRRC2, MCRR2
-    AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", Load ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);
+    AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", Load ? "MRRC" : "MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);
     return;
   }
 
@@ -454,4 +463,3 @@ DisassembleArmInstruction (
   *OpCodePtr += 1;
   return;
 }
-

ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c

@@ -93,9 +93,6 @@ extern CHAR8 *gReg[];
 #define THUMB2_MRS            235
 #define THUMB2_MSR            236
 
-
-
-
 typedef struct {
   CHAR8     *Start;
   UINT32    OpCode;
@@ -104,109 +101,108 @@ typedef struct {
 } THUMB_INSTRUCTIONS;
 
 THUMB_INSTRUCTIONS  gOpThumb[] = {
-// Thumb 16-bit instructions
+  // Thumb 16-bit instructions
-//          Op       Mask   Format
+  //          Op       Mask   Format
-  { "ADC" , 0x4140, 0xffc0, DATA_FORMAT5 },  // ADC <Rndn>, <Rm>
+  { "ADC",    0x4140, 0xffc0, DATA_FORMAT5                }, // ADC <Rndn>, <Rm>
   { "ADR",    0xa000, 0xf800, ADR_FORMAT                  }, // ADR <Rd>, <label>
-  { "ADD" , 0x1c00, 0xfe00, DATA_FORMAT2 },
+  { "ADD",    0x1c00, 0xfe00, DATA_FORMAT2                },
-  { "ADD" , 0x3000, 0xf800, DATA_FORMAT3 },
+  { "ADD",    0x3000, 0xf800, DATA_FORMAT3                },
-  { "ADD" , 0x1800, 0xfe00, DATA_FORMAT1 },
+  { "ADD",    0x1800, 0xfe00, DATA_FORMAT1                },
-  { "ADD" , 0x4400, 0xff00, DATA_FORMAT8 },   // A8.6.9
+  { "ADD",    0x4400, 0xff00, DATA_FORMAT8                }, // A8.6.9
-  { "ADD" , 0xa000, 0xf100, DATA_FORMAT6_PC },
+  { "ADD",    0xa000, 0xf100, DATA_FORMAT6_PC             },
-  { "ADD" , 0xa800, 0xf800, DATA_FORMAT6_SP },
+  { "ADD",    0xa800, 0xf800, DATA_FORMAT6_SP             },
-  { "ADD" , 0xb000, 0xff80, DATA_FORMAT7 },
+  { "ADD",    0xb000, 0xff80, DATA_FORMAT7                },
 
-  { "AND" , 0x4000, 0xffc0, DATA_FORMAT5 },
+  { "AND",    0x4000, 0xffc0, DATA_FORMAT5                },
 
-  { "ASR" , 0x1000, 0xf800, DATA_FORMAT4 },
+  { "ASR",    0x1000, 0xf800, DATA_FORMAT4                },
-  { "ASR" , 0x4100, 0xffc0, DATA_FORMAT5 },
+  { "ASR",    0x4100, 0xffc0, DATA_FORMAT5                },
 
-  { "B"   , 0xd000, 0xf000, CONDITIONAL_BRANCH },
+  { "B",      0xd000, 0xf000, CONDITIONAL_BRANCH          },
-  { "B"   , 0xe000, 0xf800, UNCONDITIONAL_BRANCH_SHORT },
+  { "B",      0xe000, 0xf800, UNCONDITIONAL_BRANCH_SHORT  },
-  { "BLX" , 0x4780, 0xff80, BRANCH_EXCHANGE },
+  { "BLX",    0x4780, 0xff80, BRANCH_EXCHANGE             },
-  { "BX"  , 0x4700, 0xff87, BRANCH_EXCHANGE },
+  { "BX",     0x4700, 0xff87, BRANCH_EXCHANGE             },
 
-  { "BIC" , 0x4380, 0xffc0, DATA_FORMAT5 },
+  { "BIC",    0x4380, 0xffc0, DATA_FORMAT5                },
   { "BKPT",   0xdf00, 0xff00, IMMED_8                     },
   { "CBZ",    0xb100, 0xfd00, DATA_CBZ                    },
   { "CBNZ",   0xb900, 0xfd00, DATA_CBZ                    },
-  { "CMN" , 0x42c0, 0xffc0, DATA_FORMAT5 },
+  { "CMN",    0x42c0, 0xffc0, DATA_FORMAT5                },
 
-  { "CMP" , 0x2800, 0xf800, DATA_FORMAT3 },
+  { "CMP",    0x2800, 0xf800, DATA_FORMAT3                },
-  { "CMP" , 0x4280, 0xffc0, DATA_FORMAT5 },
+  { "CMP",    0x4280, 0xffc0, DATA_FORMAT5                },
-  { "CMP" , 0x4500, 0xff00, DATA_FORMAT8 },
+  { "CMP",    0x4500, 0xff00, DATA_FORMAT8                },
 
-  { "CPS" , 0xb660, 0xffe8, CPS_FORMAT },
+  { "CPS",    0xb660, 0xffe8, CPS_FORMAT                  },
-  { "MOV" , 0x4600, 0xff00, DATA_FORMAT8 },
+  { "MOV",    0x4600, 0xff00, DATA_FORMAT8                },
-  { "EOR" , 0x4040, 0xffc0, DATA_FORMAT5 },
+  { "EOR",    0x4040, 0xffc0, DATA_FORMAT5                },
 
-  { "LDMIA" , 0xc800, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
+  { "LDMIA",  0xc800, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
-  { "LDR"   , 0x6800, 0xf800, LOAD_STORE_FORMAT1 },  // LDR <Rt>, [<Rn> {,#<imm>}]
+  { "LDR",    0x6800, 0xf800, LOAD_STORE_FORMAT1          }, // LDR <Rt>, [<Rn> {,#<imm>}]
-  { "LDR"   , 0x5800, 0xfe00, LOAD_STORE_FORMAT2 },  // STR <Rt>, [<Rn>, <Rm>]
+  { "LDR",    0x5800, 0xfe00, LOAD_STORE_FORMAT2          }, // STR <Rt>, [<Rn>, <Rm>]
-  { "LDR"   , 0x4800, 0xf800, LOAD_STORE_FORMAT3 },
+  { "LDR",    0x4800, 0xf800, LOAD_STORE_FORMAT3          },
-  { "LDR"   , 0x9800, 0xf800, LOAD_STORE_FORMAT4 },  // LDR <Rt>, [SP, #<imm>]
+  { "LDR",    0x9800, 0xf800, LOAD_STORE_FORMAT4          }, // LDR <Rt>, [SP, #<imm>]
-  { "LDRB"  , 0x7800, 0xf800, LOAD_STORE_FORMAT1_B },
+  { "LDRB",   0x7800, 0xf800, LOAD_STORE_FORMAT1_B        },
-  { "LDRB"  , 0x5c00, 0xfe00, LOAD_STORE_FORMAT2 },  // STR <Rt>, [<Rn>, <Rm>]
+  { "LDRB",   0x5c00, 0xfe00, LOAD_STORE_FORMAT2          }, // STR <Rt>, [<Rn>, <Rm>]
-  { "LDRH"  , 0x8800, 0xf800, LOAD_STORE_FORMAT1_H },
+  { "LDRH",   0x8800, 0xf800, LOAD_STORE_FORMAT1_H        },
-  { "LDRH"  , 0x7a00, 0xfe00, LOAD_STORE_FORMAT2 },
+  { "LDRH",   0x7a00, 0xfe00, LOAD_STORE_FORMAT2          },
-  { "LDRSB" , 0x5600, 0xfe00, LOAD_STORE_FORMAT2 },  // STR <Rt>, [<Rn>, <Rm>]
+  { "LDRSB",  0x5600, 0xfe00, LOAD_STORE_FORMAT2          }, // STR <Rt>, [<Rn>, <Rm>]
-  { "LDRSH" , 0x5e00, 0xfe00, LOAD_STORE_FORMAT2 },
+  { "LDRSH",  0x5e00, 0xfe00, LOAD_STORE_FORMAT2          },
 
   { "MOVS",   0x0000, 0xffc0, DATA_FORMAT5                }, // LSL with imm5 == 0 is a MOVS, so this must go before LSL
-  { "LSL" , 0x0000, 0xf800, DATA_FORMAT4 },
+  { "LSL",    0x0000, 0xf800, DATA_FORMAT4                },
-  { "LSL" , 0x4080, 0xffc0, DATA_FORMAT5 },
+  { "LSL",    0x4080, 0xffc0, DATA_FORMAT5                },
-  { "LSR" , 0x0001, 0xf800, DATA_FORMAT4 },
+  { "LSR",    0x0001, 0xf800, DATA_FORMAT4                },
-  { "LSR" , 0x40c0, 0xffc0, DATA_FORMAT5 },
+  { "LSR",    0x40c0, 0xffc0, DATA_FORMAT5                },
   { "LSRS",   0x0800, 0xf800, DATA_FORMAT4                }, // LSRS <Rd>, <Rm>, #<imm5>
 
   { "MOVS",   0x2000, 0xf800, DATA_FORMAT3                },
-  { "MOV" , 0x1c00, 0xffc0, DATA_FORMAT3 },
+  { "MOV",    0x1c00, 0xffc0, DATA_FORMAT3                },
-  { "MOV" , 0x4600, 0xff00, DATA_FORMAT8 },
+  { "MOV",    0x4600, 0xff00, DATA_FORMAT8                },
 
-  { "MUL" , 0x4340, 0xffc0, DATA_FORMAT5 },
+  { "MUL",    0x4340, 0xffc0, DATA_FORMAT5                },
-  { "MVN" , 0x41c0, 0xffc0, DATA_FORMAT5 },
+  { "MVN",    0x41c0, 0xffc0, DATA_FORMAT5                },
-  { "NEG" , 0x4240, 0xffc0, DATA_FORMAT5 },
+  { "NEG",    0x4240, 0xffc0, DATA_FORMAT5                },
-  { "ORR" , 0x4300, 0xffc0, DATA_FORMAT5 },
+  { "ORR",    0x4300, 0xffc0, DATA_FORMAT5                },
-  { "POP" , 0xbc00, 0xfe00, POP_FORMAT },
+  { "POP",    0xbc00, 0xfe00, POP_FORMAT                  },
   { "PUSH",   0xb400, 0xfe00, PUSH_FORMAT                 },
 
-  { "REV"   , 0xba00, 0xffc0, DATA_FORMAT5 },
+  { "REV",    0xba00, 0xffc0, DATA_FORMAT5                },
-  { "REV16" , 0xba40, 0xffc0, DATA_FORMAT5 },
+  { "REV16",  0xba40, 0xffc0, DATA_FORMAT5                },
-  { "REVSH" , 0xbac0, 0xffc0, DATA_FORMAT5 },
+  { "REVSH",  0xbac0, 0xffc0, DATA_FORMAT5                },
 
-  { "ROR"    , 0x41c0, 0xffc0, DATA_FORMAT5 },
+  { "ROR",    0x41c0, 0xffc0, DATA_FORMAT5                },
-  { "SBC"    , 0x4180, 0xffc0, DATA_FORMAT5 },
+  { "SBC",    0x4180, 0xffc0, DATA_FORMAT5                },
-  { "SETEND" , 0xb650, 0xfff0, ENDIAN_FORMAT },
+  { "SETEND", 0xb650, 0xfff0, ENDIAN_FORMAT               },
 
-  { "STMIA" , 0xc000, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
+  { "STMIA",  0xc000, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
-  { "STR"   , 0x6000, 0xf800, LOAD_STORE_FORMAT1 },   // STR  <Rt>, [<Rn> {,#<imm>}]
+  { "STR",    0x6000, 0xf800, LOAD_STORE_FORMAT1          }, // STR  <Rt>, [<Rn> {,#<imm>}]
-  { "STR"   , 0x5000, 0xfe00, LOAD_STORE_FORMAT2 },   // STR  <Rt>, [<Rn>, <Rm>]
+  { "STR",    0x5000, 0xfe00, LOAD_STORE_FORMAT2          }, // STR  <Rt>, [<Rn>, <Rm>]
-  { "STR"   , 0x9000, 0xf800, LOAD_STORE_FORMAT4 },   // STR  <Rt>, [SP, #<imm>]
+  { "STR",    0x9000, 0xf800, LOAD_STORE_FORMAT4          }, // STR  <Rt>, [SP, #<imm>]
-  { "STRB"  , 0x7000, 0xf800, LOAD_STORE_FORMAT1_B }, // STRB <Rt>, [<Rn>, #<imm5>]
+  { "STRB",   0x7000, 0xf800, LOAD_STORE_FORMAT1_B        }, // STRB <Rt>, [<Rn>, #<imm5>]
-  { "STRB"  , 0x5400, 0xfe00, LOAD_STORE_FORMAT2 },   // STRB <Rt>, [<Rn>, <Rm>]
+  { "STRB",   0x5400, 0xfe00, LOAD_STORE_FORMAT2          }, // STRB <Rt>, [<Rn>, <Rm>]
-  { "STRH"  , 0x8000, 0xf800, LOAD_STORE_FORMAT1_H }, // STRH <Rt>, [<Rn>{,#<imm>}]
+  { "STRH",   0x8000, 0xf800, LOAD_STORE_FORMAT1_H        }, // STRH <Rt>, [<Rn>{,#<imm>}]
-  { "STRH"  , 0x5200, 0xfe00, LOAD_STORE_FORMAT2 },   // STRH <Rt>, [<Rn>, <Rm>]
+  { "STRH",   0x5200, 0xfe00, LOAD_STORE_FORMAT2          }, // STRH <Rt>, [<Rn>, <Rm>]
 
-  { "SUB" , 0x1e00, 0xfe00, DATA_FORMAT2 },
+  { "SUB",    0x1e00, 0xfe00, DATA_FORMAT2                },
-  { "SUB" , 0x3800, 0xf800, DATA_FORMAT3 },
+  { "SUB",    0x3800, 0xf800, DATA_FORMAT3                },
-  { "SUB" , 0x1a00, 0xfe00, DATA_FORMAT1 },
+  { "SUB",    0x1a00, 0xfe00, DATA_FORMAT1                },
-  { "SUB" , 0xb080, 0xff80, DATA_FORMAT7 },
+  { "SUB",    0xb080, 0xff80, DATA_FORMAT7                },
 
-  { "SBC" , 0x4180, 0xffc0, DATA_FORMAT5 },
+  { "SBC",    0x4180, 0xffc0, DATA_FORMAT5                },
 
-  { "SWI" , 0xdf00, 0xff00, IMMED_8 },
+  { "SWI",    0xdf00, 0xff00, IMMED_8                     },
   { "SXTB",   0xb240, 0xffc0, DATA_FORMAT5                },
   { "SXTH",   0xb200, 0xffc0, DATA_FORMAT5                },
-  { "TST" , 0x4200, 0xffc0, DATA_FORMAT5 },
+  { "TST",    0x4200, 0xffc0, DATA_FORMAT5                },
   { "UXTB",   0xb2c0, 0xffc0, DATA_FORMAT5                },
   { "UXTH",   0xb280, 0xffc0, DATA_FORMAT5                },
 
   { "IT",     0xbf00, 0xff00, IT_BLOCK                    }
-
 };
 
 THUMB_INSTRUCTIONS  gOpThumb2[] = {
-//Instruct  OpCode      OpCode Mask  Addressig Mode
+  // Instruct  OpCode      OpCode Mask  Addressig Mode
 
   { "ADR",    0xf2af0000, 0xfbff8000, ADR_THUMB2           }, // ADDR <Rd>, <label> ;Needs to go before ADDW
   { "CMN",    0xf1100f00, 0xfff08f00, CMN_THUMB2           }, // CMN <Rn>, #<const> ;Needs to go before ADD
@@ -281,7 +277,6 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
   { "MLA",    0xfb000000, 0xfff000f0, THUMB2_4REGS         }, // MLA <Rd>, <Rn>, <Rm>, <Ra>
   { "MLS",    0xfb000010, 0xfff000f0, THUMB2_4REGS         }, // MLA <Rd>, <Rn>, <Rm>, <Ra>
 
-
   { "SMLABB", 0xfb100000, 0xfff000f0, THUMB2_4REGS         }, // SMLABB   <Rd>, <Rn>, <Rm>, <Ra>
   { "SMLABT", 0xfb100010, 0xfff000f0, THUMB2_4REGS         }, // SMLABT   <Rd>, <Rn>, <Rm>, <Ra>
   { "SMLABB", 0xfb100020, 0xfff000f0, THUMB2_4REGS         }, // SMLATB   <Rd>, <Rn>, <Rm>, <Ra>
@@ -298,7 +293,6 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
   { "SMLAD",  0xfb200000, 0xfff000f0, THUMB2_4REGS         }, // SMLAD    <Rd>, <Rn>, <Rm>, <Ra>
   { "SMLADX", 0xfb200010, 0xfff000f0, THUMB2_4REGS         }, // SMLADX   <Rd>, <Rn>, <Rm>, <Ra>
 
-
   { "B",      0xf0008000, 0xf800d000, B_T3                 }, // B<c> <label>
   { "B",      0xf0009000, 0xf800d000, B_T4                 }, // B<c> <label>
   { "BL",     0xf000d000, 0xf800d000, B_T4                 }, // BL<c> <label>
@@ -308,9 +302,9 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
   { "POP",    0xf85d0b04, 0xffff0fff, POP_T3               }, // POP <register>
   { "PUSH",   0xe8ad0000, 0xffffa000, POP_T2               }, // PUSH <registers>
   { "PUSH",   0xf84d0d04, 0xffff0fff, POP_T3               }, // PUSH <register>
-  { "STM"  , 0xe8800000, 0xffd0a000,  STM_FORMAT },      // STM <Rn>{!},<registers>
+  { "STM",    0xe8800000, 0xffd0a000, STM_FORMAT           }, // STM <Rn>{!},<registers>
   { "STMDB",  0xe9800000, 0xffd0a000, STM_FORMAT           }, // STMDB <Rn>{!},<registers>
-  { "LDM"  , 0xe8900000, 0xffd02000,  STM_FORMAT },      // LDM <Rn>{!},<registers>
+  { "LDM",    0xe8900000, 0xffd02000, STM_FORMAT           }, // LDM <Rn>{!},<registers>
   { "LDMDB",  0xe9100000, 0xffd02000, STM_FORMAT           }, // LDMDB <Rn>{!},<registers>
 
   { "LDR",    0xf8d00000, 0xfff00000, LDM_REG_IMM12        },   // LDR   <rt>, [<rn>, {, #<imm12>]}
@@ -335,9 +329,9 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
   { "LDRBT",  0xf8100e00, 0xfff00f00, LDM_REG_IMM8         },   // LDRBT  <rt>, [<rn>, {, #<imm8>]}
   { "LDRHT",  0xf8300e00, 0xfff00f00, LDM_REG_IMM8         },   // LDRHT  <rt>, [<rn>, {, #<imm8>]}
   { "LDRSB",  0xf9100800, 0xfff00800, LDM_REG_IMM8         },   // LDRHT  <rt>, [<rn>, {, #<imm8>]}  {!} form?
-  { "LDRSBT",0xf9100e00, 0xfff00f00,  LDM_REG_IMM8 },           // LDRHBT <rt>, [<rn>, {, #<imm8>]}  {!} form?
+  { "LDRSBT", 0xf9100e00, 0xfff00f00, LDM_REG_IMM8         },   // LDRHBT <rt>, [<rn>, {, #<imm8>]}  {!} form?
-  { "LDRSH" ,0xf9300800, 0xfff00800,  LDM_REG_IMM8 },           // LDRSH  <rt>, [<rn>, {, #<imm8>]}
+  { "LDRSH",  0xf9300800, 0xfff00800, LDM_REG_IMM8         },   // LDRSH  <rt>, [<rn>, {, #<imm8>]}
-  { "LDRSHT",0xf9300e00, 0xfff00f00,  LDM_REG_IMM8 },           // LDRSHT <rt>, [<rn>, {, #<imm8>]}
+  { "LDRSHT", 0xf9300e00, 0xfff00f00, LDM_REG_IMM8         },   // LDRSHT <rt>, [<rn>, {, #<imm8>]}
   { "LDRT",   0xf8500e00, 0xfff00f00, LDM_REG_IMM8         },   // LDRT   <rt>, [<rn>, {, #<imm8>]}
 
   { "LDRD",   0xe8500000, 0xfe500000, LDRD_REG_IMM8_SIGNED },   // LDRD <rt>, <rt2>, [<rn>, {, #<imm8>]}{!}
@@ -372,9 +366,9 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
   { "STREXD", 0xe8d00f4f, 0xfff00fff, LDREXD               },    // STREXD <Rd>, <Rt>, <Rt2>, [<Rn>]
 
   { "SRSDB",  0xe80dc000, 0xffdffff0, SRS_FORMAT           }, // SRSDB<c> SP{!},#<mode>
-  { "SRS"  , 0xe98dc000, 0xffdffff0, SRS_FORMAT },       // SRS{IA}<c> SP{!},#<mode>
+  { "SRS",    0xe98dc000, 0xffdffff0, SRS_FORMAT           }, // SRS{IA}<c> SP{!},#<mode>
   { "RFEDB",  0xe810c000, 0xffd0ffff, RFE_FORMAT           }, // RFEDB<c> <Rn>{!}
-  { "RFE"  , 0xe990c000, 0xffd0ffff, RFE_FORMAT }        // RFE{IA}<c> <Rn>{!}
+  { "RFE",    0xe990c000, 0xffd0ffff, RFE_FORMAT           } // RFE{IA}<c> <Rn>{!}
 };
 
 CHAR8  *gShiftType[] = {
@@ -419,9 +413,11 @@ ThumbMRegList (
       }
     }
   }
+
   if (First) {
     AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "ERROR");
   }
+
   AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "}");
 
   // BugBug: Make caller pass in buffer it is cleaner
@@ -490,7 +486,7 @@ DisassembleThumbInstruction (
   BOOLEAN  H1Bit; // H1
   BOOLEAN  H2Bit; // H2
   BOOLEAN  IMod;  // imod
-  //BOOLEAN ItFlag;
+  // BOOLEAN ItFlag;
   UINT32   Pc, Target, MsBit, LsBit;
   CHAR8    *Cond;
   BOOLEAN  Sign;      // S
@@ -521,6 +517,7 @@ DisassembleThumbInstruction (
   *OpCodePtrPtr += 1;
 
   // Manage IT Block ItFlag TRUE means we are in an IT block
+
   /*if (*ItBlock != 0) {
     ItFlag = TRUE;
     *ItBlock -= 1;
@@ -535,6 +532,7 @@ DisassembleThumbInstruction (
       } else {
         Offset = AsciiSPrint (Buf, Size, "%-6a", gOpThumb[Index].Start);
       }
+
       switch (gOpThumb[Index].AddressMode) {
         case LOAD_STORE_FORMAT1:
           // A6.5.1  <Rd>, [<Rn>, #<5_bit_offset>]
@@ -579,7 +577,6 @@ DisassembleThumbInstruction (
           AsciiSPrint (&Buf[Offset], Size - Offset, " %a", ThumbMRegList ((OpCode & 0xff) | ((OpCode & BIT8) == BIT8 ? BIT14 : 0)));
           return;
 
-
         case IMMED_8:
           // A6.7 <immed_8>
           AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%x", OpCode & 0xff);
@@ -600,7 +597,7 @@ DisassembleThumbInstruction (
 
         case BRANCH_EXCHANGE:
           // A6.3.3 BX|BLX <Rm>
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gReg[Rn | (H2Bit ? 8:0)]);
+          AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gReg[Rn | (H2Bit ? 8 : 0)]);
           return;
 
         case DATA_FORMAT1:
@@ -637,17 +634,17 @@ DisassembleThumbInstruction (
           return;
         case DATA_FORMAT8:
           // A6.4.3  <Rd>|<Rn>, <Rm>
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rd | (H1Bit ? 8:0)], gReg[Rn | (H2Bit ? 8:0)]);
+          AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rd | (H1Bit ? 8 : 0)], gReg[Rn | (H2Bit ? 8 : 0)]);
           return;
 
         case CPS_FORMAT:
           // A7.1.24
-        AsciiSPrint (&Buf[Offset], Size - Offset, "%a %a%a%a", IMod ? "ID":"IE", ((OpCode & BIT2) == 0) ? "":"a",  ((OpCode & BIT1) == 0) ? "":"i", ((OpCode & BIT0) == 0) ? "":"f");
+          AsciiSPrint (&Buf[Offset], Size - Offset, "%a %a%a%a", IMod ? "ID" : "IE", ((OpCode & BIT2) == 0) ? "" : "a", ((OpCode & BIT1) == 0) ? "" : "i", ((OpCode & BIT0) == 0) ? "" : "f");
           return;
 
         case ENDIAN_FORMAT:
           // A7.1.24
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a", (OpCode & BIT3) == 0 ? "LE":"BE");
+          AsciiSPrint (&Buf[Offset], Size - Offset, " %a", (OpCode & BIT3) == 0 ? "LE" : "BE");
           return;
 
         case DATA_CBZ:
@@ -674,23 +671,23 @@ DisassembleThumbInstruction (
           Mask = (OpCode & 0xf);
           if ((Mask & 0x1) == 0x1) {
             *ItBlock = 4;
-          Offset +=  AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a%a", (Mask & BIT3)?"T":"E", (Mask & BIT2)?"T":"E", (Mask & BIT1)?"T":"E");
+            Offset  +=  AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a%a", (Mask & BIT3) ? "T" : "E", (Mask & BIT2) ? "T" : "E", (Mask & BIT1) ? "T" : "E");
           } else if ((OpCode & 0x3) == 0x2) {
             *ItBlock = 3;
-          Offset +=  AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a", (Mask & BIT3)?"T":"E", (Mask & BIT2)?"T":"E");
+            Offset  +=  AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a", (Mask & BIT3) ? "T" : "E", (Mask & BIT2) ? "T" : "E");
           } else if ((OpCode & 0x7) == 0x4) {
             *ItBlock = 2;
-          Offset +=  AsciiSPrint (&Buf[Offset], Size - Offset, "%a", (Mask & BIT3)?"T":"E");
+            Offset  +=  AsciiSPrint (&Buf[Offset], Size - Offset, "%a", (Mask & BIT3) ? "T" : "E");
           } else if ((OpCode & 0xf) == 0x8) {
             *ItBlock = 1;
           }
+
           AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gCondition[(OpCode >> 4) & 0xf]);
           return;
       }
     }
   }
 
-
   // Thumb2 are 32-bit instructions
   *OpCodePtrPtr += 1;
   Rt             = (OpCode32 >> 12) & 0xf;
@@ -705,6 +702,7 @@ DisassembleThumbInstruction (
       } else {
         Offset = AsciiSPrint (Buf, Size, "   %-6a", gOpThumb2[Index].Start);
       }
+
       switch (gOpThumb2[Index].AddressMode) {
         case B_T3:
           Cond          = gCondition[(OpCode32 >> 22) & 0xf];
@@ -712,9 +710,9 @@ DisassembleThumbInstruction (
           Buf[Offset-4] = *Cond;
           // S:J2:J1:imm6:imm11:0
           Target  = ((OpCode32 << 1) & 0xffe) + ((OpCode32 >> 4) & 0x3f000);
-        Target |= ((OpCode32 & BIT11) == BIT11)? BIT19 : 0;  // J2
+          Target |= ((OpCode32 & BIT11) == BIT11) ? BIT19 : 0; // J2
-        Target |= ((OpCode32 & BIT13) == BIT13)? BIT18 : 0;  // J1
+          Target |= ((OpCode32 & BIT13) == BIT13) ? BIT18 : 0; // J1
-        Target |= ((OpCode32 & BIT26) == BIT26)? BIT20 : 0;  // S
+          Target |= ((OpCode32 & BIT26) == BIT26) ? BIT20 : 0; // S
           Target  = SignExtend32 (Target, BIT20);
           AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", Pc + 4 + Target);
           return;
@@ -757,7 +755,7 @@ DisassembleThumbInstruction (
         case STM_FORMAT:
           // <Rn>{!}, <registers>
           WriteBack = (OpCode32 & BIT21) == BIT21;
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, %a", gReg[(OpCode32 >> 16) & 0xf], WriteBack ? "!":"", ThumbMRegList (OpCode32 & 0xffff));
+          AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, %a", gReg[(OpCode32 >> 16) & 0xf], WriteBack ? "!" : "", ThumbMRegList (OpCode32 & 0xffff));
           return;
 
         case LDM_REG_IMM12_SIGNED:
@@ -767,6 +765,7 @@ DisassembleThumbInstruction (
             // U == 0 means subtrack, U == 1 means add
             Target = -Target;
           }
+
           AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[(OpCode32 >> 12) & 0xf], PcAlign4 (Pc) + Target);
           return;
 
@@ -778,6 +777,7 @@ DisassembleThumbInstruction (
           } else {
             AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL #%d]", (OpCode32 >> 4) & 3);
           }
+
           return;
 
         case LDM_REG_IMM12:
@@ -788,6 +788,7 @@ DisassembleThumbInstruction (
           } else {
             AsciiSPrint (&Buf[Offset], Size - Offset, ", #0x%x]", OpCode32 & 0xfff);
           }
+
           return;
 
         case LDM_REG_IMM8:
@@ -798,13 +799,14 @@ DisassembleThumbInstruction (
           Offset   += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a", gReg[Rt], gReg[Rn]);
           if (Pre) {
             if ((OpCode32 & 0xff) == 0) {
-            AsciiSPrint (&Buf[Offset], Size - Offset, "]%a", WriteBack?"!":"");
+              AsciiSPrint (&Buf[Offset], Size - Offset, "]%a", WriteBack ? "!" : "");
             } else {
-            AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", UAdd?"":"-" , OpCode32 & 0xff, WriteBack?"!":"");
+              AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", UAdd ? "" : "-", OpCode32 & 0xff, WriteBack ? "!" : "");
             }
           } else {
-          AsciiSPrint (&Buf[Offset], Size - Offset, "], #%a0x%x", UAdd?"":"-", OpCode32 & 0xff);
+            AsciiSPrint (&Buf[Offset], Size - Offset, "], #%a0x%x", UAdd ? "" : "-", OpCode32 & 0xff);
           }
+
           return;
 
         case LDRD_REG_IMM8_SIGNED:
@@ -817,13 +819,14 @@ DisassembleThumbInstruction (
             if ((OpCode32 & 0xff) == 0) {
               AsciiSPrint (&Buf[Offset], Size - Offset, "]");
             } else {
-            AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", UAdd?"":"-", (OpCode32 & 0xff) << 2, WriteBack?"!":"");
+              AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", UAdd ? "" : "-", (OpCode32 & 0xff) << 2, WriteBack ? "!" : "");
             }
           } else {
             if ((OpCode32 & 0xff) != 0) {
-            AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x", UAdd?"":"-", (OpCode32 & 0xff) << 2);
+              AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x", UAdd ? "" : "-", (OpCode32 & 0xff) << 2);
             }
           }
+
           return;
 
         case LDRD_REG_IMM8:
@@ -833,6 +836,7 @@ DisassembleThumbInstruction (
             // U == 0 means subtrack, U == 1 means add
             Target = -Target;
           }
+
           AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rt], gReg[Rt2], Pc + 4 + Target);
           return;
 
@@ -849,13 +853,13 @@ DisassembleThumbInstruction (
         case SRS_FORMAT:
           // SP{!}, #<mode>
           WriteBack = (OpCode32 & BIT21) == BIT21;
-        AsciiSPrint (&Buf[Offset], Size - Offset, " SP%a, #0x%x", WriteBack?"!":"", OpCode32 & 0x1f);
+          AsciiSPrint (&Buf[Offset], Size - Offset, " SP%a, #0x%x", WriteBack ? "!" : "", OpCode32 & 0x1f);
           return;
 
         case RFE_FORMAT:
           // <Rn>{!}
           WriteBack = (OpCode32 & BIT21) == BIT21;
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, #0x%x", gReg[Rn], WriteBack?"!":"");
+          AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, #0x%x", gReg[Rn], WriteBack ? "!" : "");
           return;
 
         case ADD_IMM12:
@@ -863,6 +867,7 @@ DisassembleThumbInstruction (
           if ((OpCode32 & BIT20) == BIT20) {
             Buf[Offset - 3] = 'S'; // assume %-6a
           }
+
           Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
           AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #0x%x", gReg[Rd], gReg[Rn], Target);
           return;
@@ -872,6 +877,7 @@ DisassembleThumbInstruction (
           if ((OpCode32 & BIT20) == BIT20) {
             Buf[Offset - 3] = 'S'; // assume %-6a
           }
+
           Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
           AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #0x%x", gReg[Rd], Target);
           return;
@@ -888,11 +894,13 @@ DisassembleThumbInstruction (
           if ((OpCode32 & BIT20) == BIT20) {
             Buf[Offset - 3] = 'S'; // assume %-6a
           }
+
           Target  = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
           Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rd], gReg[Rn], gReg[Rm]);
           if (Target != 0) {
             AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL %d", gShiftType[(OpCode >> 5) & 3], Target);
           }
+
           return;
 
         case ADD_IMM5_2REG:
@@ -903,12 +911,12 @@ DisassembleThumbInstruction (
             AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL %d", gShiftType[(OpCode >> 5) & 3], Target);
           }
 
-
         case ASR_IMM5:
           // ARS  <Rd>, <Rm> #<const>} imm3:imm2
           if ((OpCode32 & BIT20) == BIT20) {
             Buf[Offset - 3] = 'S'; // assume %-6a
           }
+
           Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
           AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a #%d", gReg[Rd], gReg[Rm], Target);
           return;
@@ -918,6 +926,7 @@ DisassembleThumbInstruction (
           if ((OpCode32 & BIT20) == BIT20) {
             Buf[Offset - 3] = 'S'; // assume %-6a
           }
+
           AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a %a", gReg[Rd], gReg[Rn], gReg[Rm]);
           return;
 
@@ -929,6 +938,7 @@ DisassembleThumbInstruction (
           } else {
             Target = PcAlign4 (Pc) + Target;
           }
+
           AsciiSPrint (&Buf[Offset], Size - Offset, " %a, 0x%08x", gReg[Rd], Target);
           return;
 
@@ -942,7 +952,7 @@ DisassembleThumbInstruction (
           // BFI <Rd>, <Rn>, #<lsb>, #<width>
           MsBit = OpCode32 & 0x1f;
           LsBit = ((OpCode32 >> 6) & 3) | ((OpCode >> 10) &  0x1c);
-        if ((Rn == 0xf) & (AsciiStrCmp (gOpThumb2[Index].Start, "BFC") == 0)){
+          if ((Rn == 0xf) & (AsciiStrCmp (gOpThumb2[Index].Start, "BFC") == 0)) {
             // BFC <Rd>, #<lsb>, #<width>
             AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #%d, #%d", gReg[Rd], LsBit, MsBit - LsBit + 1);
           } else if (AsciiStrCmp (gOpThumb2[Index].Start, "BFI") == 0) {
@@ -950,6 +960,7 @@ DisassembleThumbInstruction (
           } else {
             AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], LsBit, MsBit + 1);
           }
+
           return;
 
         case CPD_THUMB2:
@@ -964,6 +975,7 @@ DisassembleThumbInstruction (
           if (Opc2 != 0) {
             AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", Opc2);
           }
+
           return;
 
         case MRC_THUMB2:
@@ -977,6 +989,7 @@ DisassembleThumbInstruction (
           if (Opc2 != 0) {
             AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", Opc2);
           }
+
           return;
 
         case MRRC_THUMB2:
@@ -1006,7 +1019,7 @@ DisassembleThumbInstruction (
         case THUMB2_MSR:
           // MRS CPSR_<fields>, <Rd>
           Target = (OpCode32 >> 10) & 3;
-        AsciiSPrint (&Buf[Offset], Size - Offset, " CPSR_%a%a, %a", (Target & 2) == 0 ? "":"f", (Target & 1) == 0 ? "":"s", gReg[Rd]);
+          AsciiSPrint (&Buf[Offset], Size - Offset, " CPSR_%a%a, %a", (Target & 2) == 0 ? "" : "f", (Target & 1) == 0 ? "" : "s", gReg[Rd]);
           return;
 
         case THUMB2_NO_ARGS:
@@ -1019,8 +1032,6 @@ DisassembleThumbInstruction (
   AsciiSPrint (Buf, Size, "0x%08x", OpCode32);
 }
 
-
-
 VOID
 DisassembleArmInstruction (
   IN  UINT32   **OpCodePtr,
@@ -1029,7 +1040,6 @@ DisassembleArmInstruction (
   IN  BOOLEAN  Extended
   );
 
-
 /**
   Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
   point to next instruction.
@@ -1061,4 +1071,3 @@ DisassembleInstruction (
     DisassembleArmInstruction ((UINT32 **)OpCodePtr, Buf, Size, Extended);
   }
 }
-

ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c

@@ -40,13 +40,13 @@ ArchVectorConfig (
     (VOID *)(((UINTN)mNewStackBase + EL0_STACK_SIZE) & ~0xFUL)
     );
 
-  if (ArmReadCurrentEL() == AARCH64_EL2) {
+  if (ArmReadCurrentEL () == AARCH64_EL2) {
-    HcrReg = ArmReadHcr();
+    HcrReg = ArmReadHcr ();
 
     // Trap General Exceptions. All exceptions that would be routed to EL1 are routed to EL2
     HcrReg |= ARM_HCR_TGE;
 
-    ArmWriteHcr(HcrReg);
+    ArmWriteHcr (HcrReg);
   }
 
   return RETURN_SUCCESS;

ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c

@@ -34,11 +34,10 @@ ArchVectorConfig (
   // if the vector address corresponds to high vectors
   if (VectorBaseAddress == 0xFFFF0000) {
     // set SCTLR.V to enable high vectors
-    ArmSetHighVectors();
+    ArmSetHighVectors ();
-  }
+  } else {
-  else {
     // Set SCTLR.V to 0 to enable VBAR to be used
-    ArmSetLowVectors();
+    ArmSetLowVectors ();
   }
 
   return RETURN_SUCCESS;

ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c

@@ -22,28 +22,29 @@
 
 STATIC
 RETURN_STATUS
-CopyExceptionHandlers(
+CopyExceptionHandlers (
   IN  PHYSICAL_ADDRESS  BaseAddress
   );
 
 EFI_STATUS
 EFIAPI
-RegisterExceptionHandler(
+RegisterExceptionHandler (
   IN EFI_EXCEPTION_TYPE         ExceptionType,
   IN EFI_CPU_INTERRUPT_HANDLER  InterruptHandler
   );
 
 VOID
-ExceptionHandlersStart(
+ExceptionHandlersStart (
   VOID
   );
 
 VOID
-ExceptionHandlersEnd(
+ExceptionHandlersEnd (
   VOID
   );
 
-RETURN_STATUS ArchVectorConfig(
+RETURN_STATUS
+ArchVectorConfig (
   IN  UINTN  VectorBaseAddress
   );
 
@@ -60,13 +61,12 @@ extern UINTN                    gDebuggerNoHandlerValue;
 // address this at library build time.  Since this affects the build of the
 // library we cannot represent this in a PCD since PCDs are evaluated on
 // a per-module basis.
-#if defined(ARM_RELOCATE_VECTORS)
+#if defined (ARM_RELOCATE_VECTORS)
 STATIC CONST BOOLEAN  gArmRelocateVectorTable = TRUE;
 #else
 STATIC CONST BOOLEAN  gArmRelocateVectorTable = FALSE;
 #endif
 
-
 /**
 Initializes all CPU exceptions entries and provides the default exception handlers.
 
@@ -85,7 +85,7 @@ with default exception handlers.
 **/
 EFI_STATUS
 EFIAPI
-InitializeCpuExceptionHandlers(
+InitializeCpuExceptionHandlers (
   IN EFI_VECTOR_HANDOFF_INFO  *VectorInfo OPTIONAL
   )
 {
@@ -96,12 +96,10 @@ InitializeCpuExceptionHandlers(
 
   // if we are requested to copy exception handlers to another location
   if (gArmRelocateVectorTable) {
-
+    VectorBase = PcdGet64 (PcdCpuVectorBaseAddress);
-    VectorBase = PcdGet64(PcdCpuVectorBaseAddress);
+    Status     = CopyExceptionHandlers (VectorBase);
-    Status = CopyExceptionHandlers(VectorBase);
+  } else {
-
+    // use VBAR to point to where our exception handlers are
-  }
-  else { // use VBAR to point to where our exception handlers are
 
     // The vector table must be aligned for the architecture.  If this
     // assertion fails ensure the appropriate FFS alignment is in effect,
@@ -110,7 +108,7 @@ InitializeCpuExceptionHandlers(
     // for AArch64 Align=4K is required.  Align=Auto can be used but this
     // is known to cause an issue with populating the reset vector area
     // for encapsulated FVs.
-    ASSERT(((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);
+    ASSERT (((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);
 
     // We do not copy the Exception Table at PcdGet64(PcdCpuVectorBaseAddress). We just set Vector
     // Base Address to point into CpuDxe code.
@@ -119,12 +117,12 @@ InitializeCpuExceptionHandlers(
     Status = RETURN_SUCCESS;
   }
 
-  if (!RETURN_ERROR(Status)) {
+  if (!RETURN_ERROR (Status)) {
     // call the architecture-specific routine to prepare for the new vector
     // configuration to take effect
-    ArchVectorConfig(VectorBase);
+    ArchVectorConfig (VectorBase);
 
-    ArmWriteVBar(VectorBase);
+    ArmWriteVBar (VectorBase);
   }
 
   return RETURN_SUCCESS;
@@ -148,7 +146,7 @@ with default exception handlers.
 **/
 STATIC
 RETURN_STATUS
-CopyExceptionHandlers(
+CopyExceptionHandlers (
   IN  PHYSICAL_ADDRESS  BaseAddress
   )
 {
@@ -167,37 +165,35 @@ CopyExceptionHandlers(
 
   VectorBase = (UINT32 *)(UINTN)BaseAddress;
 
-  if (FeaturePcdGet(PcdDebuggerExceptionSupport) == TRUE) {
+  if (FeaturePcdGet (PcdDebuggerExceptionSupport) == TRUE) {
     // Save existing vector table, in case debugger is already hooked in
-    CopyMem((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (EFI_EXCEPTION_CALLBACK)* (gMaxExceptionNumber+1));
+    CopyMem ((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (EFI_EXCEPTION_CALLBACK)* (gMaxExceptionNumber+1));
   }
 
   // Copy our assembly code into the page that contains the exception vectors.
-  CopyMem((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);
+  CopyMem ((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);
 
   //
   // Initialize the C entry points for interrupts
   //
   for (Index = 0; Index <= gMaxExceptionNumber; Index++) {
-    if (!FeaturePcdGet(PcdDebuggerExceptionSupport) ||
+    if (!FeaturePcdGet (PcdDebuggerExceptionSupport) ||
-      (gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)gDebuggerNoHandlerValue)) {
+        (gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)gDebuggerNoHandlerValue))
-
+    {
-      Status = RegisterExceptionHandler(Index, NULL);
+      Status = RegisterExceptionHandler (Index, NULL);
-      ASSERT_EFI_ERROR(Status);
+      ASSERT_EFI_ERROR (Status);
-    }
+    } else {
-    else {
       // If the debugger has already hooked put its vector back
       VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];
     }
   }
 
   // Flush Caches since we updated executable stuff
-  InvalidateInstructionCacheRange((VOID *)(UINTN)BaseAddress, Length);
+  InvalidateInstructionCacheRange ((VOID *)(UINTN)BaseAddress, Length);
 
   return RETURN_SUCCESS;
 }
 
-
 /**
 Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
 
@@ -216,9 +212,9 @@ with default interrupt/exception handlers.
 **/
 EFI_STATUS
 EFIAPI
-InitializeCpuInterruptHandlers(
+InitializeCpuInterruptHandlers (
-IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL
+  IN EFI_VECTOR_HANDOFF_INFO  *VectorInfo OPTIONAL
-)
+  )
 {
   // not needed, this is what the CPU driver is for
   return EFI_UNSUPPORTED;
@@ -250,7 +246,7 @@ previously installed.
 or this function is not supported.
 **/
 RETURN_STATUS
-RegisterCpuInterruptHandler(
+RegisterCpuInterruptHandler (
   IN EFI_EXCEPTION_TYPE         ExceptionType,
   IN EFI_CPU_INTERRUPT_HANDLER  ExceptionHandler
   )
@@ -287,17 +283,17 @@ If this parameter is NULL, then the handler will be uninstalled.
 **/
 EFI_STATUS
 EFIAPI
-RegisterExceptionHandler(
+RegisterExceptionHandler (
   IN EFI_EXCEPTION_TYPE         ExceptionType,
   IN EFI_CPU_INTERRUPT_HANDLER  InterruptHandler
   )
 {
-  return RegisterCpuInterruptHandler(ExceptionType, InterruptHandler);
+  return RegisterCpuInterruptHandler (ExceptionType, InterruptHandler);
 }
 
 VOID
 EFIAPI
-CommonCExceptionHandler(
+CommonCExceptionHandler (
   IN     EFI_EXCEPTION_TYPE  ExceptionType,
   IN OUT EFI_SYSTEM_CONTEXT  SystemContext
   )
@@ -307,13 +303,12 @@ CommonCExceptionHandler(
       gExceptionHandlers[ExceptionType](ExceptionType, SystemContext);
       return;
     }
-  }
+  } else {
-  else {
+    DEBUG ((DEBUG_ERROR, "Unknown exception type %d\n", ExceptionType));
-    DEBUG((DEBUG_ERROR, "Unknown exception type %d\n", ExceptionType));
+    ASSERT (FALSE);
-    ASSERT(FALSE);
   }
 
-  DefaultExceptionHandler(ExceptionType, SystemContext);
+  DefaultExceptionHandler (ExceptionType, SystemContext);
 }
 
 /**

ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.c

@@ -71,7 +71,6 @@ ArmGenericTimerGetTimerVal (
   return ArmReadCntpTval ();
 }
 
-
 VOID
 EFIAPI
 ArmGenericTimerSetTimerVal (

ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c

@@ -71,7 +71,6 @@ ArmGenericTimerGetTimerVal (
   return ArmReadCntvTval ();
 }
 
-
 VOID
 EFIAPI
 ArmGenericTimerSetTimerVal (

ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.c

@@ -38,6 +38,7 @@ ArmGicArchLibInitialize (
       ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
       IccSre = ArmGicV3GetControlSystemRegisterEnable ();
     }
+
     if (IccSre & ICC_SRE_EL2_SRE) {
       mGicArchRevision = ARM_GIC_ARCH_REVISION_3;
       goto Done;

ArmPkg/Library/ArmGicArchSecLib/ArmGicArchLib.c

@@ -36,6 +36,7 @@ ArmGicGetSupportedArchRevision (
       ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
       IccSre = ArmGicV3GetControlSystemRegisterEnable ();
     }
+
     if (IccSre & ICC_SRE_EL2_SRE) {
       return ARM_GIC_ARCH_REVISION_3;
     }

ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c

@@ -26,7 +26,7 @@ AArch64DataCacheOperation (
   UINTN  SavedInterruptState;
 
   SavedInterruptState = ArmGetInterruptState ();
-  ArmDisableInterrupts();
+  ArmDisableInterrupts ();
 
   AArch64AllDataCachesOperation (DataCacheOperation);
 

ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h

@@ -11,7 +11,9 @@
 #ifndef AARCH64_LIB_H_
 #define AARCH64_LIB_H_
 
-typedef VOID (*AARCH64_CACHE_OPERATION)(UINTN);
+typedef VOID (*AARCH64_CACHE_OPERATION)(
+  UINTN
+  );
 
 VOID
 AArch64AllDataCachesOperation (
@@ -53,4 +55,3 @@ ArmReadIdAA64Mmfr2 (
   );
 
 #endif // AARCH64_LIB_H_
-

ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h

@@ -23,7 +23,9 @@
 #define ID_MMFR0_SHR_IMP_HW_COHERENT  1
 #define ID_MMFR0_SHR_IGNORED          0xf
 
-typedef VOID (*ARM_V7_CACHE_OPERATION)(UINT32);
+typedef VOID (*ARM_V7_CACHE_OPERATION)(
+  UINT32
+  );
 
 VOID
 ArmV7AllDataCachesOperation (
@@ -65,4 +67,3 @@ ArmReadIdPfr1 (
   );
 
 #endif // ARM_V7_LIB_H_
-

ArmPkg/Library/ArmLib/ArmLib.c

@@ -19,7 +19,7 @@ ArmSetAuxCrBit (
   IN  UINT32  Bits
   )
 {
-  ArmWriteAuxCr(ArmReadAuxCr() | Bits);
+  ArmWriteAuxCr (ArmReadAuxCr () | Bits);
 }
 
 VOID
@@ -28,7 +28,7 @@ ArmUnsetAuxCrBit (
   IN  UINT32  Bits
   )
 {
-  ArmWriteAuxCr(ArmReadAuxCr() & ~Bits);
+  ArmWriteAuxCr (ArmReadAuxCr () & ~Bits);
 }
 
 //

ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c

@@ -47,11 +47,12 @@ ArmMemoryAttributeToPageAttribute (
       ASSERT (0);
     case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
     case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
-    if (ArmReadCurrentEL () == AARCH64_EL2)
+      if (ArmReadCurrentEL () == AARCH64_EL2) {
         return TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
-    else
+      } else {
         return TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
       }
+  }
 }
 
 #define MIN_T0SZ        16
@@ -107,12 +108,15 @@ FreePageTablesRecursive (
   if (Level < 3) {
     for (Index = 0; Index < TT_ENTRY_COUNT; Index++) {
       if ((TranslationTable[Index] & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
-        FreePageTablesRecursive ((VOID *)(UINTN)(TranslationTable[Index] &
+        FreePageTablesRecursive (
+          (VOID *)(UINTN)(TranslationTable[Index] &
                           TT_ADDRESS_MASK_BLOCK_ENTRY),
-                                 Level + 1);
+          Level + 1
+          );
       }
     }
   }
+
   FreePages (TranslationTable, 1);
 }
 
@@ -126,6 +130,7 @@ IsBlockEntry (
   if (Level == 3) {
     return (Entry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3;
   }
+
   return (Entry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY;
 }
 
@@ -143,6 +148,7 @@ IsTableEntry (
     //
     return FALSE;
   }
+
   return (Entry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY;
 }
 
@@ -170,10 +176,18 @@ UpdateRegionMappingRecursive (
   BlockShift = (Level + 1) * BITS_PER_LEVEL + MIN_T0SZ;
   BlockMask  = MAX_UINT64 >> BlockShift;
 
-  DEBUG ((DEBUG_VERBOSE, "%a(%d): %llx - %llx set %lx clr %lx\n", __FUNCTION__,
+  DEBUG ((
-    Level, RegionStart, RegionEnd, AttributeSetMask, AttributeClearMask));
+    DEBUG_VERBOSE,
+    "%a(%d): %llx - %llx set %lx clr %lx\n",
+    __FUNCTION__,
+    Level,
+    RegionStart,
+    RegionEnd,
+    AttributeSetMask,
+    AttributeClearMask
+    ));
 
-  for (; RegionStart < RegionEnd; RegionStart = BlockEnd) {
+  for ( ; RegionStart < RegionEnd; RegionStart = BlockEnd) {
     BlockEnd = MIN (RegionEnd, (RegionStart | BlockMask) + 1);
     Entry    = &PageTable[(RegionStart >> (64 - BlockShift)) & (TT_ENTRY_COUNT - 1)];
 
@@ -187,8 +201,9 @@ UpdateRegionMappingRecursive (
     // we cannot replace it with a block entry without potentially losing
     // attribute information, so keep the table entry in that case.
     //
-    if (Level == 0 || ((RegionStart | BlockEnd) & BlockMask) != 0 ||
+    if ((Level == 0) || (((RegionStart | BlockEnd) & BlockMask) != 0) ||
-        (IsTableEntry (*Entry, Level) && AttributeClearMask != 0)) {
+        (IsTableEntry (*Entry, Level) && (AttributeClearMask != 0)))
+    {
       ASSERT (Level < 3);
 
       if (!IsTableEntry (*Entry, Level)) {
@@ -216,9 +231,14 @@ UpdateRegionMappingRecursive (
           // We are splitting an existing block entry, so we have to populate
           // the new table with the attributes of the block entry it replaces.
           //
-          Status = UpdateRegionMappingRecursive (RegionStart & ~BlockMask,
+          Status = UpdateRegionMappingRecursive (
-                     (RegionStart | BlockMask) + 1, *Entry & TT_ATTRIBUTES_MASK,
+                     RegionStart & ~BlockMask,
-                     0, TranslationTable, Level + 1);
+                     (RegionStart | BlockMask) + 1,
+                     *Entry & TT_ATTRIBUTES_MASK,
+                     0,
+                     TranslationTable,
+                     Level + 1
+                     );
           if (EFI_ERROR (Status)) {
             //
             // The range we passed to UpdateRegionMappingRecursive () is block
@@ -236,9 +256,14 @@ UpdateRegionMappingRecursive (
       //
       // Recurse to the next level
       //
-      Status = UpdateRegionMappingRecursive (RegionStart, BlockEnd,
+      Status = UpdateRegionMappingRecursive (
-                 AttributeSetMask, AttributeClearMask, TranslationTable,
+                 RegionStart,
-                 Level + 1);
+                 BlockEnd,
+                 AttributeSetMask,
+                 AttributeClearMask,
+                 TranslationTable,
+                 Level + 1
+                 );
       if (EFI_ERROR (Status)) {
         if (!IsTableEntry (*Entry, Level)) {
           //
@@ -250,13 +275,18 @@ UpdateRegionMappingRecursive (
           //
           FreePageTablesRecursive (TranslationTable, Level + 1);
         }
+
         return Status;
       }
 
       if (!IsTableEntry (*Entry, Level)) {
         EntryValue = (UINTN)TranslationTable | TT_TYPE_TABLE_ENTRY;
-        ReplaceTableEntry (Entry, EntryValue, RegionStart,
+        ReplaceTableEntry (
-          IsBlockEntry (*Entry, Level));
+          Entry,
+          EntryValue,
+          RegionStart,
+          IsBlockEntry (*Entry, Level)
+          );
       }
     } else {
       EntryValue  = (*Entry & AttributeClearMask) | AttributeSetMask;
@@ -280,6 +310,7 @@ UpdateRegionMappingRecursive (
       }
     }
   }
+
   return EFI_SUCCESS;
 }
 
@@ -300,9 +331,14 @@ UpdateRegionMapping (
 
   T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
 
-  return UpdateRegionMappingRecursive (RegionStart, RegionStart + RegionLength,
+  return UpdateRegionMappingRecursive (
-           AttributeSetMask, AttributeClearMask, ArmGetTTBR0BaseAddress (),
+           RegionStart,
-           GetRootTableLevel (T0SZ));
+           RegionStart + RegionLength,
+           AttributeSetMask,
+           AttributeClearMask,
+           ArmGetTTBR0BaseAddress (),
+           GetRootTableLevel (T0SZ)
+           );
 }
 
 STATIC
@@ -346,8 +382,9 @@ GcdAttributeToPageAttribute (
       break;
   }
 
-  if ((GcdAttributes & EFI_MEMORY_XP) != 0 ||
+  if (((GcdAttributes & EFI_MEMORY_XP) != 0) ||
-      (GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) == EFI_MEMORY_UC) {
+      ((GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) == EFI_MEMORY_UC))
+  {
     if (ArmReadCurrentEL () == AARCH64_EL2) {
       PageAttributes |= TT_XN_MASK;
     } else {
@@ -385,8 +422,12 @@ ArmSetMemoryAttributes (
                           TT_PXN_MASK | TT_XN_MASK);
   }
 
-  return UpdateRegionMapping (BaseAddress, Length, PageAttributes,
+  return UpdateRegionMapping (
-           PageAttributeMask);
+           BaseAddress,
+           Length,
+           PageAttributes,
+           PageAttributeMask
+           );
 }
 
 STATIC
@@ -419,7 +460,8 @@ ArmSetMemoryRegionNoExec (
            BaseAddress,
            Length,
            Val,
-           ~TT_ADDRESS_MASK_BLOCK_ENTRY);
+           ~TT_ADDRESS_MASK_BLOCK_ENTRY
+           );
 }
 
 EFI_STATUS
@@ -437,7 +479,8 @@ ArmClearMemoryRegionNoExec (
            BaseAddress,
            Length,
            0,
-           Mask);
+           Mask
+           );
 }
 
 EFI_STATUS
@@ -450,7 +493,8 @@ ArmSetMemoryRegionReadOnly (
            BaseAddress,
            Length,
            TT_AP_RO_RO,
-           ~TT_ADDRESS_MASK_BLOCK_ENTRY);
+           ~TT_ADDRESS_MASK_BLOCK_ENTRY
+           );
 }
 
 EFI_STATUS
@@ -463,7 +507,8 @@ ArmClearMemoryRegionReadOnly (
            BaseAddress,
            Length,
            TT_AP_RW_RW,
-           ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK));
+           ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK)
+           );
 }
 
 EFI_STATUS
@@ -474,7 +519,7 @@ ArmConfigureMmu (
   OUT UINTN                         *TranslationTableSize OPTIONAL
   )
 {
-  VOID*                         TranslationTable;
+  VOID        *TranslationTable;
   UINTN       MaxAddressBits;
   UINT64      MaxAddress;
   UINTN       T0SZ;
@@ -506,7 +551,7 @@ ArmConfigureMmu (
   // Ideally we will be running at EL2, but should support EL1 as well.
   // UEFI should not run at EL3.
   if (ArmReadCurrentEL () == AARCH64_EL2) {
-    //Note: Bits 23 and 31 are reserved(RES1) bits in TCR_EL2
+    // Note: Bits 23 and 31 are reserved(RES1) bits in TCR_EL2
     TCR = T0SZ | (1UL << 31) | (1UL << 23) | TCR_TG0_4KB;
 
     // Set the Physical Address Size using MaxAddress
@@ -523,9 +568,11 @@ ArmConfigureMmu (
     } else if (MaxAddress < SIZE_256TB) {
       TCR |= TCR_PS_256TB;
     } else {
-      DEBUG ((DEBUG_ERROR,
+      DEBUG ((
+        DEBUG_ERROR,
         "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n",
-        MaxAddress));
+        MaxAddress
+        ));
       ASSERT (0); // Bigger than 48-bit memory space are not supported
       return EFI_UNSUPPORTED;
     }
@@ -547,9 +594,11 @@ ArmConfigureMmu (
     } else if (MaxAddress < SIZE_256TB) {
       TCR |= TCR_IPS_256TB;
     } else {
-      DEBUG ((DEBUG_ERROR,
+      DEBUG ((
+        DEBUG_ERROR,
         "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n",
-        MaxAddress));
+        MaxAddress
+        ));
       ASSERT (0); // Bigger than 48-bit memory space are not supported
       return EFI_UNSUPPORTED;
     }
@@ -579,6 +628,7 @@ ArmConfigureMmu (
   if (TranslationTable == NULL) {
     return EFI_OUT_OF_RESOURCES;
   }
+
   //
   // We set TTBR0 just after allocating the table to retrieve its location from
   // the subsequent functions without needing to pass this value across the
@@ -599,8 +649,10 @@ ArmConfigureMmu (
   // Make sure we are not inadvertently hitting in the caches
   // when populating the page tables.
   //
-  InvalidateDataCacheRange (TranslationTable,
+  InvalidateDataCacheRange (
-    RootTableEntryCount * sizeof (UINT64));
+    TranslationTable,
+    RootTableEntryCount * sizeof (UINT64)
+    );
   ZeroMem (TranslationTable, RootTableEntryCount * sizeof (UINT64));
 
   while (MemoryTable->Length != 0) {
@@ -608,6 +660,7 @@ ArmConfigureMmu (
     if (EFI_ERROR (Status)) {
       goto FreeTranslationTable;
     }
+
     MemoryTable++;
   }
 
@@ -649,8 +702,10 @@ ArmMmuBaseLibConstructor (
   // The ArmReplaceLiveTranslationEntry () helper function may be invoked
   // with the MMU off so we have to ensure that it gets cleaned to the PoC
   //
-  WriteBackDataCacheRange ((VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
+  WriteBackDataCacheRange (
-    ArmReplaceLiveTranslationEntrySize);
+    (VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
+    ArmReplaceLiveTranslationEntrySize
+    );
 
   return RETURN_SUCCESS;
 }

ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c

@@ -37,9 +37,10 @@ ArmMmuPeiLibConstructor (
   // is executing from DRAM, we only need to perform the cache maintenance
   // when not executing in place.
   //
-  if ((UINTN)FileInfo.Buffer <= (UINTN)ArmReplaceLiveTranslationEntry &&
+  if (((UINTN)FileInfo.Buffer <= (UINTN)ArmReplaceLiveTranslationEntry) &&
       ((UINTN)FileInfo.Buffer + FileInfo.BufferSize >=
-       (UINTN)ArmReplaceLiveTranslationEntry + ArmReplaceLiveTranslationEntrySize)) {
+       (UINTN)ArmReplaceLiveTranslationEntry + ArmReplaceLiveTranslationEntrySize))
+  {
     DEBUG ((DEBUG_INFO, "ArmMmuLib: skipping cache maintenance on XIP PEIM\n"));
   } else {
     DEBUG ((DEBUG_INFO, "ArmMmuLib: performing cache maintenance on shadowed PEIM\n"));
@@ -47,8 +48,10 @@ ArmMmuPeiLibConstructor (
     // The ArmReplaceLiveTranslationEntry () helper function may be invoked
     // with the MMU off so we have to ensure that it gets cleaned to the PoC
     //
-    WriteBackDataCacheRange ((VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
+    WriteBackDataCacheRange (
-      ArmReplaceLiveTranslationEntrySize);
+      (VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
+      ArmReplaceLiveTranslationEntrySize
+      );
   }
 
   return RETURN_SUCCESS;

ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c

@@ -76,6 +76,7 @@ PreferNonshareableMemory (
       ASSERT (FALSE);
       return FALSE;
   }
+
   return Val != ID_MMFR0_SHR_IMP_HW_COHERENT;
 }
 
@@ -88,7 +89,7 @@ PopulateLevel2PageTable (
   IN ARM_MEMORY_REGION_ATTRIBUTES  Attributes
   )
 {
-  UINT32* PageEntry;
+  UINT32  *PageEntry;
   UINT32  Pages;
   UINT32  Index;
   UINT32  PageAttributes;
@@ -132,7 +133,7 @@ PopulateLevel2PageTable (
   // Level 2 Translation Table to it
   if (*SectionEntry != 0) {
     // The entry must be a page table. Otherwise it exists an overlapping in the memory map
-    if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(*SectionEntry)) {
+    if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (*SectionEntry)) {
       TranslationTable = *SectionEntry & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK;
     } else if ((*SectionEntry & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {
       // Case where a virtual memory map descriptor overlapped a section entry
@@ -140,49 +141,55 @@ PopulateLevel2PageTable (
       // Allocate a Level2 Page Table for this Section
       TranslationTable = (UINTN)AllocateAlignedPages (
                                   EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_PAGE_SIZE),
-                                  TRANSLATION_TABLE_PAGE_ALIGNMENT);
+                                  TRANSLATION_TABLE_PAGE_ALIGNMENT
+                                  );
 
       // Translate the Section Descriptor into Page Descriptor
       SectionDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (*SectionEntry, FALSE);
 
-      BaseSectionAddress = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(*SectionEntry);
+      BaseSectionAddress = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (*SectionEntry);
 
       //
       // Make sure we are not inadvertently hitting in the caches
       // when populating the page tables
       //
-      InvalidateDataCacheRange ((VOID *)TranslationTable,
+      InvalidateDataCacheRange (
-        TRANSLATION_TABLE_PAGE_SIZE);
+        (VOID *)TranslationTable,
+        TRANSLATION_TABLE_PAGE_SIZE
+        );
 
       // Populate the new Level2 Page Table for the section
-      PageEntry = (UINT32*)TranslationTable;
+      PageEntry = (UINT32 *)TranslationTable;
       for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {
-        PageEntry[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseSectionAddress + (Index << 12)) | SectionDescriptor;
+        PageEntry[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (BaseSectionAddress + (Index << 12)) | SectionDescriptor;
       }
 
       // Overwrite the section entry to point to the new Level2 Translation Table
       *SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
-          (IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(Attributes) ? (1 << 3) : 0) |
+                      (IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE (Attributes) ? (1 << 3) : 0) |
                       TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
     } else {
       // We do not support the other section type (16MB Section)
-      ASSERT(0);
+      ASSERT (0);
       return;
     }
   } else {
     TranslationTable = (UINTN)AllocateAlignedPages (
                                 EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_PAGE_SIZE),
-                                TRANSLATION_TABLE_PAGE_ALIGNMENT);
+                                TRANSLATION_TABLE_PAGE_ALIGNMENT
+                                );
     //
     // Make sure we are not inadvertently hitting in the caches
     // when populating the page tables
     //
-    InvalidateDataCacheRange ((VOID *)TranslationTable,
+    InvalidateDataCacheRange (
-      TRANSLATION_TABLE_PAGE_SIZE);
+      (VOID *)TranslationTable,
+      TRANSLATION_TABLE_PAGE_SIZE
+      );
     ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_PAGE_SIZE);
 
     *SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
-        (IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(Attributes) ? (1 << 3) : 0) |
+                    (IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE (Attributes) ? (1 << 3) : 0) |
                     TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
   }
 
@@ -193,7 +200,7 @@ PopulateLevel2PageTable (
   ASSERT (FirstPageOffset + Pages <= TRANSLATION_TABLE_PAGE_COUNT);
 
   for (Index = 0; Index < Pages; Index++) {
-    *PageEntry++     =  TT_DESCRIPTOR_PAGE_BASE_ADDRESS(PhysicalBase) | PageAttributes;
+    *PageEntry++  =  TT_DESCRIPTOR_PAGE_BASE_ADDRESS (PhysicalBase) | PageAttributes;
     PhysicalBase += TT_DESCRIPTOR_PAGE_SIZE;
   }
 
@@ -202,8 +209,10 @@ PopulateLevel2PageTable (
   // [speculatively] since the previous invalidate are evicted again.
   //
   ArmDataMemoryBarrier ();
-  InvalidateDataCacheRange ((UINT32 *)TranslationTable + FirstPageOffset,
+  InvalidateDataCacheRange (
-    RemainLength / TT_DESCRIPTOR_PAGE_SIZE * sizeof (*PageEntry));
+    (UINT32 *)TranslationTable + FirstPageOffset,
+    RemainLength / TT_DESCRIPTOR_PAGE_SIZE * sizeof (*PageEntry)
+    );
 }
 
 STATIC
@@ -219,50 +228,50 @@ FillTranslationTable (
   UINT64  RemainLength;
   UINT32  PageMapLength;
 
-  ASSERT(MemoryRegion->Length > 0);
+  ASSERT (MemoryRegion->Length > 0);
 
   if (MemoryRegion->PhysicalBase >= SIZE_4GB) {
     return;
   }
 
   PhysicalBase = (UINT32)MemoryRegion->PhysicalBase;
-  RemainLength = MIN(MemoryRegion->Length, SIZE_4GB - PhysicalBase);
+  RemainLength = MIN (MemoryRegion->Length, SIZE_4GB - PhysicalBase);
 
   switch (MemoryRegion->Attributes) {
     case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
-      Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
+      Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK (0);
       break;
     case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:
-      Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
+      Attributes  = TT_DESCRIPTOR_SECTION_WRITE_BACK (0);
       Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
       break;
     case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
-      Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);
+      Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH (0);
       break;
     case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
-      Attributes = TT_DESCRIPTOR_SECTION_DEVICE(0);
+      Attributes = TT_DESCRIPTOR_SECTION_DEVICE (0);
       break;
     case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:
-      Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(0);
+      Attributes = TT_DESCRIPTOR_SECTION_UNCACHED (0);
       break;
     case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
-      Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
+      Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK (1);
       break;
     case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:
-      Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
+      Attributes  = TT_DESCRIPTOR_SECTION_WRITE_BACK (1);
       Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
       break;
     case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
-      Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(1);
+      Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH (1);
       break;
     case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
-      Attributes = TT_DESCRIPTOR_SECTION_DEVICE(1);
+      Attributes = TT_DESCRIPTOR_SECTION_DEVICE (1);
       break;
     case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:
-      Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(1);
+      Attributes = TT_DESCRIPTOR_SECTION_UNCACHED (1);
       break;
     default:
-      Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(0);
+      Attributes = TT_DESCRIPTOR_SECTION_UNCACHED (0);
       break;
   }
 
@@ -271,14 +280,15 @@ FillTranslationTable (
   }
 
   // Get the first section entry for this mapping
-  SectionEntry    = TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(TranslationTable, MemoryRegion->VirtualBase);
+  SectionEntry = TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS (TranslationTable, MemoryRegion->VirtualBase);
 
   while (RemainLength != 0) {
-    if (PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE == 0 &&
+    if ((PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE == 0) &&
-        RemainLength >= TT_DESCRIPTOR_SECTION_SIZE) {
+        (RemainLength >= TT_DESCRIPTOR_SECTION_SIZE))
+    {
       // Case: Physical address aligned on the Section Size (1MB) && the length
       // is greater than the Section Size
-      *SectionEntry = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(PhysicalBase) | Attributes;
+      *SectionEntry = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (PhysicalBase) | Attributes;
 
       //
       // Issue a DMB to ensure that the page table entry update made it to
@@ -291,14 +301,21 @@ FillTranslationTable (
       PhysicalBase += TT_DESCRIPTOR_SECTION_SIZE;
       RemainLength -= TT_DESCRIPTOR_SECTION_SIZE;
     } else {
-      PageMapLength = MIN ((UINT32)RemainLength, TT_DESCRIPTOR_SECTION_SIZE -
+      PageMapLength = MIN (
-                                         (PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE));
+                        (UINT32)RemainLength,
+                        TT_DESCRIPTOR_SECTION_SIZE -
+                        (PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE)
+                        );
 
       // Case: Physical address aligned on the Section Size (1MB) && the length
       //       does not fill a section
       // Case: Physical address NOT aligned on the Section Size (1MB)
-      PopulateLevel2PageTable (SectionEntry, PhysicalBase, PageMapLength,
+      PopulateLevel2PageTable (
-        MemoryRegion->Attributes);
+        SectionEntry,
+        PhysicalBase,
+        PageMapLength,
+        MemoryRegion->Attributes
+        );
 
       //
       // Issue a DMB to ensure that the page table entry update made it to
@@ -332,7 +349,8 @@ ArmConfigureMmu (
 
   TranslationTable = AllocateAlignedPages (
                        EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SECTION_SIZE),
-                       TRANSLATION_TABLE_SECTION_ALIGNMENT);
+                       TRANSLATION_TABLE_SECTION_ALIGNMENT
+                       );
   if (TranslationTable == NULL) {
     return RETURN_OUT_OF_RESOURCES;
   }
@@ -389,25 +407,27 @@ ArmConfigureMmu (
   //
   ArmSetTTBCR (0);
 
-  ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |
+  ArmSetDomainAccessControl (
-                             DOMAIN_ACCESS_CONTROL_NONE(14) |
+    DOMAIN_ACCESS_CONTROL_NONE (15) |
-                             DOMAIN_ACCESS_CONTROL_NONE(13) |
+    DOMAIN_ACCESS_CONTROL_NONE (14) |
-                             DOMAIN_ACCESS_CONTROL_NONE(12) |
+    DOMAIN_ACCESS_CONTROL_NONE (13) |
-                             DOMAIN_ACCESS_CONTROL_NONE(11) |
+    DOMAIN_ACCESS_CONTROL_NONE (12) |
-                             DOMAIN_ACCESS_CONTROL_NONE(10) |
+    DOMAIN_ACCESS_CONTROL_NONE (11) |
-                             DOMAIN_ACCESS_CONTROL_NONE( 9) |
+    DOMAIN_ACCESS_CONTROL_NONE (10) |
-                             DOMAIN_ACCESS_CONTROL_NONE( 8) |
+    DOMAIN_ACCESS_CONTROL_NONE (9) |
-                             DOMAIN_ACCESS_CONTROL_NONE( 7) |
+    DOMAIN_ACCESS_CONTROL_NONE (8) |
-                             DOMAIN_ACCESS_CONTROL_NONE( 6) |
+    DOMAIN_ACCESS_CONTROL_NONE (7) |
-                             DOMAIN_ACCESS_CONTROL_NONE( 5) |
+    DOMAIN_ACCESS_CONTROL_NONE (6) |
-                             DOMAIN_ACCESS_CONTROL_NONE( 4) |
+    DOMAIN_ACCESS_CONTROL_NONE (5) |
-                             DOMAIN_ACCESS_CONTROL_NONE( 3) |
+    DOMAIN_ACCESS_CONTROL_NONE (4) |
-                             DOMAIN_ACCESS_CONTROL_NONE( 2) |
+    DOMAIN_ACCESS_CONTROL_NONE (3) |
-                             DOMAIN_ACCESS_CONTROL_NONE( 1) |
+    DOMAIN_ACCESS_CONTROL_NONE (2) |
-                             DOMAIN_ACCESS_CONTROL_CLIENT(0));
+    DOMAIN_ACCESS_CONTROL_NONE (1) |
+    DOMAIN_ACCESS_CONTROL_CLIENT (0)
+    );
 
-  ArmEnableInstructionCache();
+  ArmEnableInstructionCache ();
-  ArmEnableDataCache();
+  ArmEnableDataCache ();
-  ArmEnableMmu();
+  ArmEnableMmu ();
   return RETURN_SUCCESS;
 }

ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c

@@ -48,7 +48,7 @@ ConvertSectionToPages (
   FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
 
   // Calculate index into first level translation table for start of modification
-  FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
+  FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
   ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
 
   // Get section attributes and convert to page attributes
@@ -63,7 +63,7 @@ ConvertSectionToPages (
 
   // Write the page table entries out
   for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {
-    PageTable[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseAddress + (Index << 12)) | PageDescriptor;
+    PageTable[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (BaseAddress + (Index << 12)) | PageDescriptor;
   }
 
   // Formulate page table entry, Domain=0, NS=0
@@ -156,19 +156,19 @@ UpdatePageEntries (
 
   // Iterate for the number of 4KB pages to change
   Offset = 0;
-  for(p = 0; p < NumPageEntries; p++) {
+  for (p = 0; p < NumPageEntries; p++) {
     // Calculate index into first level translation table for page table value
 
-    FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress + Offset) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
+    FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (BaseAddress + Offset) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
     ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
 
     // Read the descriptor from the first level page table
     Descriptor = FirstLevelTable[FirstLevelIdx];
 
     // Does this descriptor need to be converted from section entry to 4K pages?
-    if (!TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Descriptor)) {
+    if (!TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (Descriptor)) {
       Status = ConvertSectionToPages (FirstLevelIdx << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
-      if (EFI_ERROR(Status)) {
+      if (EFI_ERROR (Status)) {
         // Exit for loop
         break;
       }
@@ -181,7 +181,7 @@ UpdatePageEntries (
     }
 
     // Obtain page table base address
-    PageTable = (ARM_PAGE_TABLE_ENTRY *)TT_DESCRIPTOR_PAGE_BASE_ADDRESS(Descriptor);
+    PageTable = (ARM_PAGE_TABLE_ENTRY *)TT_DESCRIPTOR_PAGE_BASE_ADDRESS (Descriptor);
 
     // Calculate index into the page table
     PageTableIndex = ((BaseAddress + Offset) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
@@ -206,7 +206,6 @@ UpdatePageEntries (
 
     Status  = EFI_SUCCESS;
     Offset += TT_DESCRIPTOR_PAGE_SIZE;
-
   } // End first level translation table loop
 
   return Status;
@@ -286,24 +285,25 @@ UpdateSectionEntries (
   FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
 
   // calculate index into first level translation table for start of modification
-  FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
+  FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
   ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
 
   // calculate number of 1MB first level entries this applies to
   NumSections = (UINT32)(Length / TT_DESCRIPTOR_SECTION_SIZE);
 
   // iterate through each descriptor
-  for(i=0; i<NumSections; i++) {
+  for (i = 0; i < NumSections; i++) {
     CurrentDescriptor = FirstLevelTable[FirstLevelIdx + i];
 
     // has this descriptor already been converted to pages?
-    if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(CurrentDescriptor)) {
+    if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (CurrentDescriptor)) {
       // forward this 1MB range to page table function instead
       Status = UpdatePageEntries (
                  (FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT,
                  TT_DESCRIPTOR_SECTION_SIZE,
                  Attributes,
-                 NULL);
+                 NULL
+                 );
     } else {
       // still a section entry
 
@@ -355,19 +355,22 @@ ArmSetMemoryAttributes (
   FlushTlbs = FALSE;
   while (Length > 0) {
     if ((BaseAddress % TT_DESCRIPTOR_SECTION_SIZE == 0) &&
-        Length >= TT_DESCRIPTOR_SECTION_SIZE) {
+        (Length >= TT_DESCRIPTOR_SECTION_SIZE))
-
+    {
       ChunkLength = Length - Length % TT_DESCRIPTOR_SECTION_SIZE;
 
-      DEBUG ((DEBUG_PAGE,
+      DEBUG ((
+        DEBUG_PAGE,
         "SetMemoryAttributes(): MMU section 0x%lx length 0x%lx to %lx\n",
-        BaseAddress, ChunkLength, Attributes));
+        BaseAddress,
+        ChunkLength,
+        Attributes
+        ));
 
       Status = UpdateSectionEntries (BaseAddress, ChunkLength, Attributes);
 
       FlushTlbs = TRUE;
     } else {
-
       //
       // Process page by page until the next section boundary, but only if
       // we have more than a section's worth of area to deal with after that.
@@ -378,12 +381,20 @@ ArmSetMemoryAttributes (
         ChunkLength = Length;
       }
 
-      DEBUG ((DEBUG_PAGE,
+      DEBUG ((
+        DEBUG_PAGE,
         "SetMemoryAttributes(): MMU page 0x%lx length 0x%lx to %lx\n",
-        BaseAddress, ChunkLength, Attributes));
+        BaseAddress,
+        ChunkLength,
+        Attributes
+        ));
 
-      Status = UpdatePageEntries (BaseAddress, ChunkLength, Attributes,
+      Status = UpdatePageEntries (
-                 &FlushTlbs);
+                 BaseAddress,
+                 ChunkLength,
+                 Attributes,
+                 &FlushTlbs
+                 );
     }
 
     if (EFI_ERROR (Status)) {
@@ -397,6 +408,7 @@ ArmSetMemoryAttributes (
   if (FlushTlbs) {
     ArmInvalidateTlb ();
   }
+
   return Status;
 }
 

ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.c

@@ -34,7 +34,7 @@ MtlWaitUntilChannelFree (
 
   @retval UINT32*      Pointer to the payload.
 **/
-UINT32*
+UINT32 *
 MtlGetChannelPayload (
   IN  MTL_CHANNEL  *Channel
   )

ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.c

@@ -25,12 +25,18 @@ typedef uint64_t aeabi_double_t;
  * Helpers to convert between float32 and aeabi_float_t, and float64 and
  * aeabi_double_t used by the AEABI functions below.
  */
-static aeabi_float_t f32_to_f(float32_t val)
+static aeabi_float_t
+f32_to_f (
+  float32_t  val
+  )
 {
   return val.v;
 }
 
-static float32_t f32_from_f(aeabi_float_t val)
+static float32_t
+f32_from_f (
+  aeabi_float_t  val
+  )
 {
   float32_t  res;
 
@@ -39,12 +45,18 @@ static float32_t f32_from_f(aeabi_float_t val)
   return res;
 }
 
-static aeabi_double_t f64_to_d(float64_t val)
+static aeabi_double_t
+f64_to_d (
+  float64_t  val
+  )
 {
   return val.v;
 }
 
-static float64_t f64_from_d(aeabi_double_t val)
+static float64_t
+f64_from_d (
+  aeabi_double_t  val
+  )
 {
   float64_t  res;
 
@@ -64,220 +76,346 @@ static float64_t f64_from_d(aeabi_double_t val)
  * Table 2, Standard aeabi_double_t precision floating-point arithmetic helper
  * functions
  */
-
+aeabi_double_t
-aeabi_double_t __aeabi_dadd(aeabi_double_t a, aeabi_double_t b)
+__aeabi_dadd (
+  aeabi_double_t  a,
+  aeabi_double_t  b
+  )
 {
-  return f64_to_d(f64_add(f64_from_d(a), f64_from_d(b)));
+  return f64_to_d (f64_add (f64_from_d (a), f64_from_d (b)));
 }
 
-aeabi_double_t __aeabi_ddiv(aeabi_double_t a, aeabi_double_t b)
+aeabi_double_t
+__aeabi_ddiv (
+  aeabi_double_t  a,
+  aeabi_double_t  b
+  )
 {
-  return f64_to_d(f64_div(f64_from_d(a), f64_from_d(b)));
+  return f64_to_d (f64_div (f64_from_d (a), f64_from_d (b)));
 }
 
-aeabi_double_t __aeabi_dmul(aeabi_double_t a, aeabi_double_t b)
+aeabi_double_t
+__aeabi_dmul (
+  aeabi_double_t  a,
+  aeabi_double_t  b
+  )
 {
-  return f64_to_d(f64_mul(f64_from_d(a), f64_from_d(b)));
+  return f64_to_d (f64_mul (f64_from_d (a), f64_from_d (b)));
 }
 
-
+aeabi_double_t
-aeabi_double_t __aeabi_drsub(aeabi_double_t a, aeabi_double_t b)
+__aeabi_drsub (
+  aeabi_double_t  a,
+  aeabi_double_t  b
+  )
 {
-  return f64_to_d(f64_sub(f64_from_d(b), f64_from_d(a)));
+  return f64_to_d (f64_sub (f64_from_d (b), f64_from_d (a)));
 }
 
-aeabi_double_t __aeabi_dsub(aeabi_double_t a, aeabi_double_t b)
+aeabi_double_t
+__aeabi_dsub (
+  aeabi_double_t  a,
+  aeabi_double_t  b
+  )
 {
-  return f64_to_d(f64_sub(f64_from_d(a), f64_from_d(b)));
+  return f64_to_d (f64_sub (f64_from_d (a), f64_from_d (b)));
 }
 
 /*
  * Table 3, double precision floating-point comparison helper functions
  */
-
+int
-int __aeabi_dcmpeq(aeabi_double_t a, aeabi_double_t b)
+__aeabi_dcmpeq (
+  aeabi_double_t  a,
+  aeabi_double_t  b
+  )
 {
-  return f64_eq(f64_from_d(a), f64_from_d(b));
+  return f64_eq (f64_from_d (a), f64_from_d (b));
 }
 
-int __aeabi_dcmplt(aeabi_double_t a, aeabi_double_t b)
+int
+__aeabi_dcmplt (
+  aeabi_double_t  a,
+  aeabi_double_t  b
+  )
 {
-  return f64_lt(f64_from_d(a), f64_from_d(b));
+  return f64_lt (f64_from_d (a), f64_from_d (b));
 }
 
-int __aeabi_dcmple(aeabi_double_t a, aeabi_double_t b)
+int
+__aeabi_dcmple (
+  aeabi_double_t  a,
+  aeabi_double_t  b
+  )
 {
-  return f64_le(f64_from_d(a), f64_from_d(b));
+  return f64_le (f64_from_d (a), f64_from_d (b));
 }
 
-int __aeabi_dcmpge(aeabi_double_t a, aeabi_double_t b)
+int
+__aeabi_dcmpge (
+  aeabi_double_t  a,
+  aeabi_double_t  b
+  )
 {
-  return f64_le(f64_from_d(b), f64_from_d(a));
+  return f64_le (f64_from_d (b), f64_from_d (a));
 }
 
-int __aeabi_dcmpgt(aeabi_double_t a, aeabi_double_t b)
+int
+__aeabi_dcmpgt (
+  aeabi_double_t  a,
+  aeabi_double_t  b
+  )
 {
-  return f64_lt(f64_from_d(b), f64_from_d(a));
+  return f64_lt (f64_from_d (b), f64_from_d (a));
 }
 
 /*
  * Table 4, Standard single precision floating-point arithmetic helper
  * functions
  */
-
+aeabi_float_t
-aeabi_float_t __aeabi_fadd(aeabi_float_t a, aeabi_float_t b)
+__aeabi_fadd (
+  aeabi_float_t  a,
+  aeabi_float_t  b
+  )
 {
-  return f32_to_f(f32_add(f32_from_f(a), f32_from_f(b)));
+  return f32_to_f (f32_add (f32_from_f (a), f32_from_f (b)));
 }
 
-aeabi_float_t __aeabi_fdiv(aeabi_float_t a, aeabi_float_t b)
+aeabi_float_t
+__aeabi_fdiv (
+  aeabi_float_t  a,
+  aeabi_float_t  b
+  )
 {
-  return f32_to_f(f32_div(f32_from_f(a), f32_from_f(b)));
+  return f32_to_f (f32_div (f32_from_f (a), f32_from_f (b)));
 }
 
-aeabi_float_t __aeabi_fmul(aeabi_float_t a, aeabi_float_t b)
+aeabi_float_t
+__aeabi_fmul (
+  aeabi_float_t  a,
+  aeabi_float_t  b
+  )
 {
-  return f32_to_f(f32_mul(f32_from_f(a), f32_from_f(b)));
+  return f32_to_f (f32_mul (f32_from_f (a), f32_from_f (b)));
 }
 
-aeabi_float_t __aeabi_frsub(aeabi_float_t a, aeabi_float_t b)
+aeabi_float_t
+__aeabi_frsub (
+  aeabi_float_t  a,
+  aeabi_float_t  b
+  )
 {
-  return f32_to_f(f32_sub(f32_from_f(b), f32_from_f(a)));
+  return f32_to_f (f32_sub (f32_from_f (b), f32_from_f (a)));
 }
 
-aeabi_float_t __aeabi_fsub(aeabi_float_t a, aeabi_float_t b)
+aeabi_float_t
+__aeabi_fsub (
+  aeabi_float_t  a,
+  aeabi_float_t  b
+  )
 {
-  return f32_to_f(f32_sub(f32_from_f(a), f32_from_f(b)));
+  return f32_to_f (f32_sub (f32_from_f (a), f32_from_f (b)));
 }
 
 /*
  * Table 5, Standard single precision floating-point comparison helper
  * functions
  */
-
+int
-int __aeabi_fcmpeq(aeabi_float_t a, aeabi_float_t b)
+__aeabi_fcmpeq (
+  aeabi_float_t  a,
+  aeabi_float_t  b
+  )
 {
-  return f32_eq(f32_from_f(a), f32_from_f(b));
+  return f32_eq (f32_from_f (a), f32_from_f (b));
 }
 
-int __aeabi_fcmplt(aeabi_float_t a, aeabi_float_t b)
+int
+__aeabi_fcmplt (
+  aeabi_float_t  a,
+  aeabi_float_t  b
+  )
 {
-  return f32_lt(f32_from_f(a), f32_from_f(b));
+  return f32_lt (f32_from_f (a), f32_from_f (b));
 }
 
-int __aeabi_fcmple(aeabi_float_t a, aeabi_float_t b)
+int
+__aeabi_fcmple (
+  aeabi_float_t  a,
+  aeabi_float_t  b
+  )
 {
-  return f32_le(f32_from_f(a), f32_from_f(b));
+  return f32_le (f32_from_f (a), f32_from_f (b));
 }
 
-int __aeabi_fcmpge(aeabi_float_t a, aeabi_float_t b)
+int
+__aeabi_fcmpge (
+  aeabi_float_t  a,
+  aeabi_float_t  b
+  )
 {
-  return f32_le(f32_from_f(b), f32_from_f(a));
+  return f32_le (f32_from_f (b), f32_from_f (a));
 }
 
-int __aeabi_fcmpgt(aeabi_float_t a, aeabi_float_t b)
+int
+__aeabi_fcmpgt (
+  aeabi_float_t  a,
+  aeabi_float_t  b
+  )
 {
-  return f32_lt(f32_from_f(b), f32_from_f(a));
+  return f32_lt (f32_from_f (b), f32_from_f (a));
 }
 
 /*
  * Table 6, Standard floating-point to integer conversions
  */
-
+int
-int __aeabi_d2iz(aeabi_double_t a)
+__aeabi_d2iz (
+  aeabi_double_t  a
+  )
 {
-  return f64_to_i32_r_minMag(f64_from_d(a), false);
+  return f64_to_i32_r_minMag (f64_from_d (a), false);
 }
 
-unsigned __aeabi_d2uiz(aeabi_double_t a)
+unsigned
+__aeabi_d2uiz (
+  aeabi_double_t  a
+  )
 {
-  return f64_to_ui32_r_minMag(f64_from_d(a), false);
+  return f64_to_ui32_r_minMag (f64_from_d (a), false);
 }
 
-long long __aeabi_d2lz(aeabi_double_t a)
+long long
+__aeabi_d2lz (
+  aeabi_double_t  a
+  )
 {
-  return f64_to_i64_r_minMag(f64_from_d(a), false);
+  return f64_to_i64_r_minMag (f64_from_d (a), false);
 }
 
-unsigned long long __aeabi_d2ulz(aeabi_double_t a)
+unsigned long long
+__aeabi_d2ulz (
+  aeabi_double_t  a
+  )
 {
-  return f64_to_ui64_r_minMag(f64_from_d(a), false);
+  return f64_to_ui64_r_minMag (f64_from_d (a), false);
 }
 
-int __aeabi_f2iz(aeabi_float_t a)
+int
+__aeabi_f2iz (
+  aeabi_float_t  a
+  )
 {
-  return f32_to_i32_r_minMag(f32_from_f(a), false);
+  return f32_to_i32_r_minMag (f32_from_f (a), false);
 }
 
-unsigned __aeabi_f2uiz(aeabi_float_t a)
+unsigned
+__aeabi_f2uiz (
+  aeabi_float_t  a
+  )
 {
-  return f32_to_ui32_r_minMag(f32_from_f(a), false);
+  return f32_to_ui32_r_minMag (f32_from_f (a), false);
 }
 
-long long __aeabi_f2lz(aeabi_float_t a)
+long long
+__aeabi_f2lz (
+  aeabi_float_t  a
+  )
 {
-  return f32_to_i64_r_minMag(f32_from_f(a), false);
+  return f32_to_i64_r_minMag (f32_from_f (a), false);
 }
 
-unsigned long long __aeabi_f2ulz(aeabi_float_t a)
+unsigned long long
+__aeabi_f2ulz (
+  aeabi_float_t  a
+  )
 {
-  return f32_to_ui64_r_minMag(f32_from_f(a), false);
+  return f32_to_ui64_r_minMag (f32_from_f (a), false);
 }
 
 /*
  * Table 7, Standard conversions between floating types
  */
-
+aeabi_float_t
-aeabi_float_t __aeabi_d2f(aeabi_double_t a)
+__aeabi_d2f (
+  aeabi_double_t  a
+  )
 {
-  return f32_to_f(f64_to_f32(f64_from_d(a)));
+  return f32_to_f (f64_to_f32 (f64_from_d (a)));
 }
 
-aeabi_double_t __aeabi_f2d(aeabi_float_t a)
+aeabi_double_t
+__aeabi_f2d (
+  aeabi_float_t  a
+  )
 {
-  return f64_to_d(f32_to_f64(f32_from_f(a)));
+  return f64_to_d (f32_to_f64 (f32_from_f (a)));
 }
 
 /*
  * Table 8, Standard integer to floating-point conversions
  */
-
+aeabi_double_t
-aeabi_double_t __aeabi_i2d(int a)
+__aeabi_i2d (
+  int  a
+  )
 {
-  return f64_to_d(i32_to_f64(a));
+  return f64_to_d (i32_to_f64 (a));
 }
 
-aeabi_double_t __aeabi_ui2d(unsigned a)
+aeabi_double_t
+__aeabi_ui2d (
+  unsigned  a
+  )
 {
-  return f64_to_d(ui32_to_f64(a));
+  return f64_to_d (ui32_to_f64 (a));
 }
 
-aeabi_double_t __aeabi_l2d(long long a)
+aeabi_double_t
+__aeabi_l2d (
+  long long  a
+  )
 {
-  return f64_to_d(i64_to_f64(a));
+  return f64_to_d (i64_to_f64 (a));
 }
 
-aeabi_double_t __aeabi_ul2d(unsigned long long a)
+aeabi_double_t
+__aeabi_ul2d (
+  unsigned long long  a
+  )
 {
-  return f64_to_d(ui64_to_f64(a));
+  return f64_to_d (ui64_to_f64 (a));
 }
 
-aeabi_float_t __aeabi_i2f(int a)
+aeabi_float_t
+__aeabi_i2f (
+  int  a
+  )
 {
-  return f32_to_f(i32_to_f32(a));
+  return f32_to_f (i32_to_f32 (a));
 }
 
-aeabi_float_t __aeabi_ui2f(unsigned a)
+aeabi_float_t
+__aeabi_ui2f (
+  unsigned  a
+  )
 {
-  return f32_to_f(ui32_to_f32(a));
+  return f32_to_f (ui32_to_f32 (a));
 }
 
-aeabi_float_t __aeabi_l2f(long long a)
+aeabi_float_t
+__aeabi_l2f (
+  long long  a
+  )
 {
-  return f32_to_f(i64_to_f32(a));
+  return f32_to_f (i64_to_f32 (a));
 }
 
-aeabi_float_t __aeabi_ul2f(unsigned long long a)
+aeabi_float_t
+__aeabi_ul2f (
+  unsigned long long  a
+  )
 {
-  return f32_to_f(ui64_to_f32(a));
+  return f32_to_f (ui64_to_f32 (a));
 }

ArmPkg/Library/CompilerIntrinsicsLib/memcmp_ms.c

@@ -1,22 +1,33 @@
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 //
 // Copyright (c) 2019, Pete Batard. All rights reserved.
 // Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 //
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 
-#if defined(_M_ARM64)
+#if defined (_M_ARM64)
 typedef unsigned __int64 size_t;
 #else
 typedef unsigned __int32 size_t;
 #endif
 
-int memcmp(void *, void *, size_t);
+int
+memcmp (
+  void *,
+  void *,
+  size_t
+  );
+
 #pragma intrinsic(memcmp)
 #pragma function(memcmp)
-int memcmp(const void *s1, const void *s2, size_t n)
+int
+memcmp (
+  const void  *s1,
+  const void  *s2,
+  size_t      n
+  )
 {
   unsigned char const  *t1;
   unsigned char const  *t2;
@@ -25,8 +36,10 @@ int memcmp(const void *s1, const void *s2, size_t n)
   t2 = s2;
 
   while (n-- != 0) {
-    if (*t1 != *t2)
+    if (*t1 != *t2) {
       return (int)*t1 - (int)*t2;
+    }
+
     t1++;
     t2++;
   }

ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c

@@ -1,15 +1,20 @@
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 //
 // Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
 // Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 //
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 
 typedef __SIZE_TYPE__ size_t;
 
-static void __memcpy(void *dest, const void *src, size_t n)
+static void
+__memcpy (
+  void        *dest,
+  const void  *src,
+  size_t      n
+  )
 {
   unsigned char        *d;
   unsigned char const  *s;
@@ -22,21 +27,41 @@ static void __memcpy(void *dest, const void *src, size_t n)
   }
 }
 
-void *memcpy(void *dest, const void *src, size_t n)
+void *
+memcpy (
+  void        *dest,
+  const void  *src,
+  size_t      n
+  )
 {
-  __memcpy(dest, src, n);
+  __memcpy (dest, src, n);
   return dest;
 }
 
 #ifdef __arm__
 
-__attribute__((__alias__("__memcpy")))
+__attribute__ ((__alias__ ("__memcpy")))
-void __aeabi_memcpy(void *dest, const void *src, size_t n);
+void
+__aeabi_memcpy (
+  void        *dest,
+  const void  *src,
+  size_t      n
+  );
 
-__attribute__((__alias__("__memcpy")))
+__attribute__ ((__alias__ ("__memcpy")))
-void __aeabi_memcpy4(void *dest, const void *src, size_t n);
+void
+__aeabi_memcpy4 (
+  void        *dest,
+  const void  *src,
+  size_t      n
+  );
 
-__attribute__((__alias__("__memcpy")))
+__attribute__ ((__alias__ ("__memcpy")))
-void __aeabi_memcpy8(void *dest, const void *src, size_t n);
+void
+__aeabi_memcpy8 (
+  void        *dest,
+  const void  *src,
+  size_t      n
+  );
 
 #endif

ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c

@@ -1,22 +1,33 @@
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 //
 // Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
 // Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 //
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 
-#if defined(_M_ARM64)
+#if defined (_M_ARM64)
 typedef unsigned __int64 size_t;
 #else
 typedef unsigned __int32 size_t;
 #endif
 
-void* memcpy(void *, const void *, size_t);
+void *
+memcpy (
+  void *,
+  const void *,
+  size_t
+  );
+
 #pragma intrinsic(memcpy)
 #pragma function(memcpy)
-void* memcpy(void *dest, const void *src, size_t n)
+void *
+memcpy (
+  void        *dest,
+  const void  *src,
+  size_t      n
+  )
 {
   unsigned char        *d;
   unsigned char const  *s;

ArmPkg/Library/CompilerIntrinsicsLib/memmove_ms.c

@@ -1,22 +1,33 @@
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 //
 // Copyright (c) 2019, Pete Batard. All rights reserved.
 // Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 //
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 
-#if defined(_M_ARM64)
+#if defined (_M_ARM64)
 typedef unsigned __int64 size_t;
 #else
 typedef unsigned __int32 size_t;
 #endif
 
-void* memmove(void *, const void *, size_t);
+void *
+memmove (
+  void *,
+  const void *,
+  size_t
+  );
+
 #pragma intrinsic(memmove)
 #pragma function(memmove)
-void* memmove(void *dest, const void *src, size_t n)
+void *
+memmove (
+  void        *dest,
+  const void  *src,
+  size_t      n
+  )
 {
   unsigned char        *d;
   unsigned char const  *s;

ArmPkg/Library/CompilerIntrinsicsLib/memset.c

@@ -1,16 +1,21 @@
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 //
 // Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
 // Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 //
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 
 typedef __SIZE_TYPE__ size_t;
 
-static __attribute__((__used__))
+static __attribute__ ((__used__))
-void *__memset(void *s, int c, size_t n)
+void *
+__memset (
+  void    *s,
+  int     c,
+  size_t  n
+  )
 {
   unsigned char  *d;
 
@@ -29,31 +34,63 @@ void *__memset(void *s, int c, size_t n)
 // object was pulled into the link due to the definitions below. So make
 // our memset() 'weak' to let the other implementation take precedence.
 //
-__attribute__((__weak__, __alias__("__memset")))
+__attribute__ ((__weak__, __alias__ ("__memset")))
-void *memset(void *dest, int c, size_t n);
+void *
+memset (
+  void    *dest,
+  int     c,
+  size_t  n
+  );
 
 #ifdef __arm__
 
-void __aeabi_memset(void *dest, size_t n, int c)
+void
+__aeabi_memset (
+  void    *dest,
+  size_t  n,
+  int     c
+  )
 {
-  __memset(dest, c, n);
+  __memset (dest, c, n);
 }
 
-__attribute__((__alias__("__aeabi_memset")))
+__attribute__ ((__alias__ ("__aeabi_memset")))
-void __aeabi_memset4(void *dest, size_t n, int c);
+void
+__aeabi_memset4 (
+  void    *dest,
+  size_t  n,
+  int     c
+  );
 
-__attribute__((__alias__("__aeabi_memset")))
+__attribute__ ((__alias__ ("__aeabi_memset")))
-void __aeabi_memset8(void *dest, size_t n, int c);
+void
+__aeabi_memset8 (
+  void    *dest,
+  size_t  n,
+  int     c
+  );
 
-void __aeabi_memclr(void *dest, size_t n)
+void
+__aeabi_memclr (
+  void    *dest,
+  size_t  n
+  )
 {
-  __memset(dest, 0, n);
+  __memset (dest, 0, n);
 }
 
-__attribute__((__alias__("__aeabi_memclr")))
+__attribute__ ((__alias__ ("__aeabi_memclr")))
-void __aeabi_memclr4(void *dest, size_t n);
+void
+__aeabi_memclr4 (
+  void    *dest,
+  size_t  n
+  );
 
-__attribute__((__alias__("__aeabi_memclr")))
+__attribute__ ((__alias__ ("__aeabi_memclr")))
-void __aeabi_memclr8(void *dest, size_t n);
+void
+__aeabi_memclr8 (
+  void    *dest,
+  size_t  n
+  );
 
 #endif

ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c

@@ -1,22 +1,33 @@
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 //
 // Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
 // Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 //
-//------------------------------------------------------------------------------
+// ------------------------------------------------------------------------------
 
-#if defined(_M_ARM64)
+#if defined (_M_ARM64)
 typedef unsigned __int64 size_t;
 #else
 typedef unsigned __int32 size_t;
 #endif
 
-void* memset(void *, int, size_t);
+void *
+memset (
+  void *,
+  int,
+  size_t
+  );
+
 #pragma intrinsic(memset)
 #pragma function(memset)
-void *memset(void *s, int c, size_t n)
+void *
+memset (
+  void    *s,
+  int     c,
+  size_t  n
+  )
 {
   unsigned char  *d;
 

ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c

@@ -22,7 +22,6 @@
 #define GET_OCCUPIED_SIZE(ActualSize, Alignment) \
   (ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1))
 
-
 // Vector Table for Sec Phase
 VOID
 DebugAgentVectorTable (
@@ -53,7 +52,7 @@ GetFileState (
   FileState = FfsHeader->State;
 
   if (ErasePolarity != 0) {
-    FileState = (EFI_FFS_FILE_STATE)~FileState;
+    FileState = (EFI_FFS_FILE_STATE) ~FileState;
   }
 
   HighestBit = 0x80;
@@ -82,7 +81,7 @@ CalculateHeaderChecksum (
   UINT8  Sum;
 
   // Calculate the sum of the header
-  Sum = CalculateSum8 ((CONST VOID*)FileHeader,sizeof(EFI_FFS_FILE_HEADER));
+  Sum = CalculateSum8 ((CONST VOID *)FileHeader, sizeof (EFI_FFS_FILE_HEADER));
 
   // State field (since this indicates the different state of file).
   Sum = (UINT8)(Sum - FileHeader->State);
@@ -125,10 +124,9 @@ GetFfsFile (
     FileState = GetFileState (ErasePolarity, FfsFileHeader);
 
     switch (FileState) {
-
       case EFI_FILE_HEADER_INVALID:
-      FileOffset += sizeof(EFI_FFS_FILE_HEADER);
+        FileOffset   += sizeof (EFI_FFS_FILE_HEADER);
-      FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + sizeof(EFI_FFS_FILE_HEADER));
+        FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + sizeof (EFI_FFS_FILE_HEADER));
         break;
 
       case EFI_FILE_DATA_VALID:
@@ -144,7 +142,7 @@ GetFfsFile (
         }
 
         FileLength       = *(UINT32 *)(FfsFileHeader->Size) & 0x00FFFFFF;
-      FileOccupiedSize = GET_OCCUPIED_SIZE(FileLength, 8);
+        FileOccupiedSize = GET_OCCUPIED_SIZE (FileLength, 8);
 
         FileOffset   += FileOccupiedSize;
         FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + FileOccupiedSize);
@@ -152,7 +150,7 @@ GetFfsFile (
 
       case EFI_FILE_DELETED:
         FileLength       = *(UINT32 *)(FfsFileHeader->Size) & 0x00FFFFFF;
-      FileOccupiedSize = GET_OCCUPIED_SIZE(FileLength, 8);
+        FileOccupiedSize = GET_OCCUPIED_SIZE (FileLength, 8);
         FileOffset      += FileOccupiedSize;
         FfsFileHeader    = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + FileOccupiedSize);
         break;
@@ -161,6 +159,7 @@ GetFfsFile (
         return EFI_NOT_FOUND;
     }
   }
+
   return EFI_NOT_FOUND;
 }
 
@@ -188,7 +187,7 @@ GetImageContext (
 
   while (ParsedLength < SectionSize) {
     if ((Section->Type == EFI_SECTION_PE32) || (Section->Type == EFI_SECTION_TE)) {
-      EfiImage = (EFI_IMAGE_OPTIONAL_HEADER_UNION*)(Section + 1);
+      EfiImage = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(Section + 1);
       break;
     }
 
@@ -214,16 +213,16 @@ GetImageContext (
   ImageContext->ImageRead = PeCoffLoaderImageReadFromMemory;
 
   Status =  PeCoffLoaderGetImageInfo (ImageContext);
-  if (!EFI_ERROR(Status) && ((VOID*)(UINTN)ImageContext->DebugDirectoryEntryRva != NULL)) {
+  if (!EFI_ERROR (Status) && ((VOID *)(UINTN)ImageContext->DebugDirectoryEntryRva != NULL)) {
     ImageAddress = ImageContext->ImageAddress;
     if (ImageContext->IsTeImage) {
-      ImageAddress += sizeof (EFI_TE_IMAGE_HEADER) - ((EFI_TE_IMAGE_HEADER*)EfiImage)->StrippedSize;
+      ImageAddress += sizeof (EFI_TE_IMAGE_HEADER) - ((EFI_TE_IMAGE_HEADER *)EfiImage)->StrippedSize;
     }
 
-    DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY*)(ImageAddress + ImageContext->DebugDirectoryEntryRva);
+    DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *)(ImageAddress + ImageContext->DebugDirectoryEntryRva);
     if (DebugEntry->Type == EFI_IMAGE_DEBUG_TYPE_CODEVIEW) {
-      CodeViewEntryPointer = (VOID *) (ImageAddress + (UINTN) DebugEntry->RVA);
+      CodeViewEntryPointer = (VOID *)(ImageAddress + (UINTN)DebugEntry->RVA);
-      switch (* (UINT32 *) CodeViewEntryPointer) {
+      switch (*(UINT32 *)CodeViewEntryPointer) {
         case CODEVIEW_SIGNATURE_NB10:
           ImageContext->PdbPointer = (CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY);
           break;
@@ -283,10 +282,10 @@ InitializeDebugAgent (
     //
     // Get the Sec or PrePeiCore module (defined as SEC type module)
     //
-    Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdSecureFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
+    Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64 (PcdSecureFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
-    if (!EFI_ERROR(Status)) {
+    if (!EFI_ERROR (Status)) {
-      Status = GetImageContext (FfsHeader,&ImageContext);
+      Status = GetImageContext (FfsHeader, &ImageContext);
-      if (!EFI_ERROR(Status)) {
+      if (!EFI_ERROR (Status)) {
         PeCoffLoaderRelocateImageExtraAction (&ImageContext);
       }
     }
@@ -294,10 +293,10 @@ InitializeDebugAgent (
     //
     // Get the PrePi or PrePeiCore module (defined as SEC type module)
     //
-    Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
+    Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
-    if (!EFI_ERROR(Status)) {
+    if (!EFI_ERROR (Status)) {
-      Status = GetImageContext (FfsHeader,&ImageContext);
+      Status = GetImageContext (FfsHeader, &ImageContext);
-      if (!EFI_ERROR(Status)) {
+      if (!EFI_ERROR (Status)) {
         PeCoffLoaderRelocateImageExtraAction (&ImageContext);
       }
     }
@@ -305,10 +304,10 @@ InitializeDebugAgent (
     //
     // Get the PeiCore module (defined as PEI_CORE type module)
     //
-    Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);
+    Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);
-    if (!EFI_ERROR(Status)) {
+    if (!EFI_ERROR (Status)) {
-      Status = GetImageContext (FfsHeader,&ImageContext);
+      Status = GetImageContext (FfsHeader, &ImageContext);
-      if (!EFI_ERROR(Status)) {
+      if (!EFI_ERROR (Status)) {
         PeCoffLoaderRelocateImageExtraAction (&ImageContext);
       }
     }

ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.c

@@ -17,7 +17,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/PeCoffExtraActionLib.h>
 #include <Library/PrintLib.h>
 
-
 /**
   If the build is done on cygwin the paths are cygpaths.
   /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
@@ -45,7 +44,7 @@ DeCygwinPathIfNeeded (
   for (Index = 9, Index2 = 0; (Index < (Size + 9)) && (Ptr[Index] != '\0'); Index++, Index2++) {
     Temp[Index2] = Ptr[Index];
     if (Temp[Index2] == '/') {
-      Temp[Index2] = '\\' ;
+      Temp[Index2] = '\\';
     }
 
     if (Index2 == 1) {
@@ -57,7 +56,6 @@ DeCygwinPathIfNeeded (
   return Temp;
 }
 
-
 /**
   Performs additional actions after a PE/COFF image has been loaded and relocated.
 
@@ -73,32 +71,30 @@ PeCoffLoaderRelocateImageExtraAction (
   IN OUT PE_COFF_LOADER_IMAGE_CONTEXT  *ImageContext
   )
 {
-#if !defined(MDEPKG_NDEBUG)
+ #if !defined (MDEPKG_NDEBUG)
   CHAR8  Temp[512];
-#endif
+ #endif
 
   if (ImageContext->PdbPointer) {
-#ifdef __CC_ARM
+ #ifdef __CC_ARM
-#if (__ARMCC_VERSION < 500000)
+ #if (__ARMCC_VERSION < 500000)
     // Print out the command for the RVD debugger to load symbols for this image
     DEBUG ((DEBUG_LOAD | DEBUG_INFO, "load /a /ni /np %a &0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
-#else
+ #else
     // Print out the command for the DS-5 to load symbols for this image
     DEBUG ((DEBUG_LOAD | DEBUG_INFO, "add-symbol-file %a 0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
-#endif
+ #endif
-#elif __GNUC__
+ #elif __GNUC__
     // This may not work correctly if you generate PE/COFF directly as then the Offset would not be required
     DEBUG ((DEBUG_LOAD | DEBUG_INFO, "add-symbol-file %a 0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
-#else
+ #else
-    DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
+    DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN)ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
-#endif
+ #endif
   } else {
-    DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
+    DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN)ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
   }
 }
 
-
-
 /**
   Performs additional actions just before a PE/COFF image is unloaded.  Any resources
   that were allocated by PeCoffLoaderRelocateImageExtraAction() must be freed.
@@ -115,21 +111,21 @@ PeCoffLoaderUnloadImageExtraAction (
   IN OUT PE_COFF_LOADER_IMAGE_CONTEXT  *ImageContext
   )
 {
-#if !defined(MDEPKG_NDEBUG)
+ #if !defined (MDEPKG_NDEBUG)
   CHAR8  Temp[512];
-#endif
+ #endif
 
   if (ImageContext->PdbPointer) {
-#ifdef __CC_ARM
+ #ifdef __CC_ARM
     // Print out the command for the RVD debugger to load symbols for this image
     DEBUG ((DEBUG_LOAD | DEBUG_INFO, "unload symbols_only %a\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp))));
-#elif __GNUC__
+ #elif __GNUC__
     // This may not work correctly if you generate PE/COFF directly as then the Offset would not be required
     DEBUG ((DEBUG_LOAD | DEBUG_INFO, "remove-symbol-file %a 0x%08x\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
-#else
+ #else
     DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Unloading %a\n", ImageContext->PdbPointer));
-#endif
+ #endif
   } else {
-    DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Unloading driver at 0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress));
+    DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Unloading driver at 0x%11p\n", (VOID *)(UINTN)ImageContext->ImageAddress));
   }
 }

ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c

@@ -48,40 +48,72 @@ DescribeInstructionOrDataAbort (
   CHAR8  *AbortCause;
 
   switch (Iss & 0x3f) {
-    case 0x0: AbortCause = "Address size fault, zeroth level of translation or translation table base register";  break;
+    case 0x0: AbortCause = "Address size fault, zeroth level of translation or translation table base register";
-    case 0x1: AbortCause = "Address size fault, first level";  break;
+      break;
-    case 0x2: AbortCause = "Address size fault, second level";  break;
+    case 0x1: AbortCause = "Address size fault, first level";
-    case 0x3: AbortCause = "Address size fault, third level";  break;
+      break;
-    case 0x4: AbortCause = "Translation fault, zeroth level";  break;
+    case 0x2: AbortCause = "Address size fault, second level";
-    case 0x5: AbortCause = "Translation fault, first level";  break;
+      break;
-    case 0x6: AbortCause = "Translation fault, second level";  break;
+    case 0x3: AbortCause = "Address size fault, third level";
-    case 0x7: AbortCause = "Translation fault, third level";  break;
+      break;
-    case 0x9: AbortCause = "Access flag fault, first level";  break;
+    case 0x4: AbortCause = "Translation fault, zeroth level";
-    case 0xa: AbortCause = "Access flag fault, second level";  break;
+      break;
-    case 0xb: AbortCause = "Access flag fault, third level";  break;
+    case 0x5: AbortCause = "Translation fault, first level";
-    case 0xd: AbortCause = "Permission fault, first level";  break;
+      break;
-    case 0xe: AbortCause = "Permission fault, second level";  break;
+    case 0x6: AbortCause = "Translation fault, second level";
-    case 0xf: AbortCause = "Permission fault, third level";  break;
+      break;
-    case 0x10: AbortCause = "Synchronous external abort";  break;
+    case 0x7: AbortCause = "Translation fault, third level";
-    case 0x18: AbortCause = "Synchronous parity error on memory access";  break;
+      break;
-    case 0x11: AbortCause = "Asynchronous external abort";  break;
+    case 0x9: AbortCause = "Access flag fault, first level";
-    case 0x19: AbortCause = "Asynchronous parity error on memory access";  break;
+      break;
-    case 0x14: AbortCause = "Synchronous external abort on translation table walk, zeroth level";  break;
+    case 0xa: AbortCause = "Access flag fault, second level";
-    case 0x15: AbortCause = "Synchronous external abort on translation table walk, first level";  break;
+      break;
-    case 0x16: AbortCause = "Synchronous external abort on translation table walk, second level";  break;
+    case 0xb: AbortCause = "Access flag fault, third level";
-    case 0x17: AbortCause = "Synchronous external abort on translation table walk, third level";  break;
+      break;
-    case 0x1c: AbortCause = "Synchronous parity error on memory access on translation table walk, zeroth level";  break;
+    case 0xd: AbortCause = "Permission fault, first level";
-    case 0x1d: AbortCause = "Synchronous parity error on memory access on translation table walk, first level";  break;
+      break;
-    case 0x1e: AbortCause = "Synchronous parity error on memory access on translation table walk, second level";  break;
+    case 0xe: AbortCause = "Permission fault, second level";
-    case 0x1f: AbortCause = "Synchronous parity error on memory access on translation table walk, third level";  break;
+      break;
-    case 0x21: AbortCause = "Alignment fault";  break;
+    case 0xf: AbortCause = "Permission fault, third level";
-    case 0x22: AbortCause = "Debug event";  break;
+      break;
-    case 0x30: AbortCause = "TLB conflict abort";  break;
+    case 0x10: AbortCause = "Synchronous external abort";
+      break;
+    case 0x18: AbortCause = "Synchronous parity error on memory access";
+      break;
+    case 0x11: AbortCause = "Asynchronous external abort";
+      break;
+    case 0x19: AbortCause = "Asynchronous parity error on memory access";
+      break;
+    case 0x14: AbortCause = "Synchronous external abort on translation table walk, zeroth level";
+      break;
+    case 0x15: AbortCause = "Synchronous external abort on translation table walk, first level";
+      break;
+    case 0x16: AbortCause = "Synchronous external abort on translation table walk, second level";
+      break;
+    case 0x17: AbortCause = "Synchronous external abort on translation table walk, third level";
+      break;
+    case 0x1c: AbortCause = "Synchronous parity error on memory access on translation table walk, zeroth level";
+      break;
+    case 0x1d: AbortCause = "Synchronous parity error on memory access on translation table walk, first level";
+      break;
+    case 0x1e: AbortCause = "Synchronous parity error on memory access on translation table walk, second level";
+      break;
+    case 0x1f: AbortCause = "Synchronous parity error on memory access on translation table walk, third level";
+      break;
+    case 0x21: AbortCause = "Alignment fault";
+      break;
+    case 0x22: AbortCause = "Debug event";
+      break;
+    case 0x30: AbortCause = "TLB conflict abort";
+      break;
     case 0x33:
-    case 0x34: AbortCause = "IMPLEMENTATION DEFINED";  break;
+    case 0x34: AbortCause = "IMPLEMENTATION DEFINED";
+      break;
     case 0x35:
-    case 0x36: AbortCause = "Domain fault"; break;
+    case 0x36: AbortCause = "Domain fault";
-    default: AbortCause = ""; break;
+      break;
+    default: AbortCause = "";
+      break;
   }
 
   DEBUG ((DEBUG_ERROR, "\n%a: %a\n", AbortType, AbortCause));
@@ -101,13 +133,18 @@ DescribeExceptionSyndrome (
   Iss = Esr & 0x00ffffff;
 
   switch (Ec) {
-    case 0x15: Message = "SVC executed in AArch64"; break;
+    case 0x15: Message = "SVC executed in AArch64";
+      break;
     case 0x20:
-    case 0x21: DescribeInstructionOrDataAbort ("Instruction abort", Iss); return;
+    case 0x21: DescribeInstructionOrDataAbort ("Instruction abort", Iss);
-    case 0x22: Message = "PC alignment fault"; break;
+      return;
-    case 0x23: Message = "SP alignment fault"; break;
+    case 0x22: Message = "PC alignment fault";
+      break;
+    case 0x23: Message = "SP alignment fault";
+      break;
     case 0x24:
-    case 0x25: DescribeInstructionOrDataAbort ("Data abort", Iss); return;
+    case 0x25: DescribeInstructionOrDataAbort ("Data abort", Iss);
+      return;
     default: return;
   }
 
@@ -126,12 +163,14 @@ BaseName (
   Str = FullName + AsciiStrLen (FullName);
 
   while (--Str > FullName) {
-    if (*Str == '/' || *Str == '\\') {
+    if ((*Str == '/') || (*Str == '\\')) {
       return Str + 1;
     }
   }
+
   return Str;
 }
+
 #endif
 
 /**
@@ -160,12 +199,14 @@ DefaultExceptionHandler (
     if (gST->ConOut != NULL) {
       AsciiPrint (Message);
     }
+
     CpuDeadLoop ();
   }
+
   mRecursiveException = TRUE;
 
-  CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n\n%a Exception at 0x%016lx\n", gExceptionTypeString[ExceptionType], SystemContext.SystemContextAArch64->ELR);
+  CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "\n\n%a Exception at 0x%016lx\n", gExceptionTypeString[ExceptionType], SystemContext.SystemContextAArch64->ELR);
-  SerialPortWrite ((UINT8 *) Buffer, CharCount);
+  SerialPortWrite ((UINT8 *)Buffer, CharCount);
   if (gST->ConOut != NULL) {
     AsciiPrint (Buffer);
   }
@@ -180,9 +221,14 @@ DefaultExceptionHandler (
 
   PrevPdb = Pdb = GetImageName (SystemContext.SystemContextAArch64->ELR, &ImageBase, &PeCoffSizeOfHeader);
   if (Pdb != NULL) {
-      DEBUG ((DEBUG_ERROR, "PC 0x%012lx (0x%012lx+0x%08x) [ 0] %a\n",
+    DEBUG ((
-        SystemContext.SystemContextAArch64->ELR, ImageBase,
+      DEBUG_ERROR,
-        SystemContext.SystemContextAArch64->ELR - ImageBase, BaseName (Pdb)));
+      "PC 0x%012lx (0x%012lx+0x%08x) [ 0] %a\n",
+      SystemContext.SystemContextAArch64->ELR,
+      ImageBase,
+      SystemContext.SystemContextAArch64->ELR - ImageBase,
+      BaseName (Pdb)
+      ));
   } else {
     DEBUG ((DEBUG_ERROR, "PC 0x%012lx\n", SystemContext.SystemContextAArch64->ELR));
   }
@@ -196,6 +242,7 @@ DefaultExceptionHandler (
       RootFp[0] = SystemContext.SystemContextAArch64->FP;
       RootFp[1] = SystemContext.SystemContextAArch64->LR;
     }
+
     for (Fp = RootFp; Fp[0] != 0; Fp = (UINT64 *)Fp[0]) {
       Pdb = GetImageName (Fp[1], &ImageBase, &PeCoffSizeOfHeader);
       if (Pdb != NULL) {
@@ -203,12 +250,21 @@ DefaultExceptionHandler (
           Idx++;
           PrevPdb = Pdb;
         }
-          DEBUG ((DEBUG_ERROR, "PC 0x%012lx (0x%012lx+0x%08x) [% 2d] %a\n",
+
-            Fp[1], ImageBase, Fp[1] - ImageBase, Idx, BaseName (Pdb)));
+        DEBUG ((
+          DEBUG_ERROR,
+          "PC 0x%012lx (0x%012lx+0x%08x) [% 2d] %a\n",
+          Fp[1],
+          ImageBase,
+          Fp[1] - ImageBase,
+          Idx,
+          BaseName (Pdb)
+          ));
       } else {
         DEBUG ((DEBUG_ERROR, "PC 0x%012lx\n", Fp[1]));
       }
     }
+
     PrevPdb = Pdb = GetImageName (SystemContext.SystemContextAArch64->ELR, &ImageBase, &PeCoffSizeOfHeader);
     if (Pdb != NULL) {
       DEBUG ((DEBUG_ERROR, "\n[ 0] %a\n", Pdb));
@@ -217,12 +273,13 @@ DefaultExceptionHandler (
     Idx = 0;
     for (Fp = RootFp; Fp[0] != 0; Fp = (UINT64 *)Fp[0]) {
       Pdb = GetImageName (Fp[1], &ImageBase, &PeCoffSizeOfHeader);
-        if (Pdb != NULL && Pdb != PrevPdb) {
+      if ((Pdb != NULL) && (Pdb != PrevPdb)) {
         DEBUG ((DEBUG_ERROR, "[% 2d] %a\n", ++Idx, Pdb));
         PrevPdb = Pdb;
       }
     }
   }
+
   DEBUG_CODE_END ();
 
   DEBUG ((DEBUG_ERROR, "\n  X0 0x%016lx   X1 0x%016lx   X2 0x%016lx   X3 0x%016lx\n", SystemContext.SystemContextAArch64->X0, SystemContext.SystemContextAArch64->X1, SystemContext.SystemContextAArch64->X2, SystemContext.SystemContextAArch64->X3));
@@ -255,19 +312,22 @@ DefaultExceptionHandler (
 
   DEBUG ((DEBUG_ERROR, "\n  SP 0x%016lx  ELR 0x%016lx  SPSR 0x%08lx  FPSR 0x%08lx\n ESR 0x%08lx          FAR 0x%016lx\n", SystemContext.SystemContextAArch64->SP, SystemContext.SystemContextAArch64->ELR, SystemContext.SystemContextAArch64->SPSR, SystemContext.SystemContextAArch64->FPSR, SystemContext.SystemContextAArch64->ESR, SystemContext.SystemContextAArch64->FAR));
 
-  DEBUG ((DEBUG_ERROR, "\n ESR : EC 0x%02x  IL 0x%x  ISS 0x%08x\n", (SystemContext.SystemContextAArch64->ESR & 0xFC000000) >> 26, (SystemContext.SystemContextAArch64->ESR >> 25) & 0x1, SystemContext.SystemContextAArch64->ESR & 0x1FFFFFF ));
+  DEBUG ((DEBUG_ERROR, "\n ESR : EC 0x%02x  IL 0x%x  ISS 0x%08x\n", (SystemContext.SystemContextAArch64->ESR & 0xFC000000) >> 26, (SystemContext.SystemContextAArch64->ESR >> 25) & 0x1, SystemContext.SystemContextAArch64->ESR & 0x1FFFFFF));
 
   DescribeExceptionSyndrome (SystemContext.SystemContextAArch64->ESR);
 
   DEBUG ((DEBUG_ERROR, "\nStack dump:\n"));
   for (Offset = -256; Offset < 256; Offset += 32) {
-    DEBUG  ((DEBUG_ERROR, "%c %013lx: %016lx %016lx %016lx %016lx\n",
+    DEBUG ((
+      DEBUG_ERROR,
+      "%c %013lx: %016lx %016lx %016lx %016lx\n",
       Offset == 0 ? '>' : ' ',
       SystemContext.SystemContextAArch64->SP + Offset,
       *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset),
       *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 8),
       *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 16),
-      *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 24)));
+      *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 24)
+      ));
   }
 
   ASSERT (FALSE);

ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c

@@ -73,8 +73,8 @@ CpsrString (
   )
 {
   UINTN  Index;
-  CHAR8*    Str;
+  CHAR8  *Str;
-  CHAR8*    ModeStr;
+  CHAR8  *ModeStr;
 
   Str = ReturnStr;
 
@@ -134,22 +134,38 @@ FaultStatusToString (
   CHAR8  *FaultSource;
 
   switch (Status) {
-    case 0x01: FaultSource = "Alignment fault"; break;
+    case 0x01: FaultSource = "Alignment fault";
-    case 0x02: FaultSource = "Debug event fault"; break;
+      break;
-    case 0x03: FaultSource = "Access Flag fault on Section"; break;
+    case 0x02: FaultSource = "Debug event fault";
-    case 0x04: FaultSource = "Cache maintenance operation fault[2]"; break;
+      break;
-    case 0x05: FaultSource = "Translation fault on Section"; break;
+    case 0x03: FaultSource = "Access Flag fault on Section";
-    case 0x06: FaultSource = "Access Flag fault on Page"; break;
+      break;
-    case 0x07: FaultSource = "Translation fault on Page"; break;
+    case 0x04: FaultSource = "Cache maintenance operation fault[2]";
-    case 0x08: FaultSource = "Precise External Abort"; break;
+      break;
-    case 0x09: FaultSource = "Domain fault on Section"; break;
+    case 0x05: FaultSource = "Translation fault on Section";
-    case 0x0b: FaultSource = "Domain fault on Page"; break;
+      break;
-    case 0x0c: FaultSource = "External abort on translation, first level"; break;
+    case 0x06: FaultSource = "Access Flag fault on Page";
-    case 0x0d: FaultSource = "Permission fault on Section"; break;
+      break;
-    case 0x0e: FaultSource = "External abort on translation, second level"; break;
+    case 0x07: FaultSource = "Translation fault on Page";
-    case 0x0f: FaultSource = "Permission fault on Page"; break;
+      break;
-    case 0x16: FaultSource = "Imprecise External Abort"; break;
+    case 0x08: FaultSource = "Precise External Abort";
-    default:   FaultSource = "No function"; break;
+      break;
+    case 0x09: FaultSource = "Domain fault on Section";
+      break;
+    case 0x0b: FaultSource = "Domain fault on Page";
+      break;
+    case 0x0c: FaultSource = "External abort on translation, first level";
+      break;
+    case 0x0d: FaultSource = "Permission fault on Section";
+      break;
+    case 0x0e: FaultSource = "External abort on translation, second level";
+      break;
+    case 0x0f: FaultSource = "Permission fault on Page";
+      break;
+    case 0x16: FaultSource = "Imprecise External Abort";
+      break;
+    default:   FaultSource = "No function";
+      break;
   }
 
   return FaultSource;
@@ -191,8 +207,14 @@ DefaultExceptionHandler (
 
   PcAdjust = 0;
 
-  CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n%a Exception PC at 0x%08x  CPSR 0x%08x ",
+  CharCount = AsciiSPrint (
-         gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR);
+                Buffer,
+                sizeof (Buffer),
+                "\n%a Exception PC at 0x%08x  CPSR 0x%08x ",
+                gExceptionTypeString[ExceptionType],
+                SystemContext.SystemContextArm->PC,
+                SystemContext.SystemContextArm->CPSR
+                );
   SerialPortWrite ((UINT8 *)Buffer, CharCount);
   if (gST->ConOut != NULL) {
     AsciiPrint (Buffer);
@@ -245,8 +267,8 @@ DefaultExceptionHandler (
       default:
         break;
     }
-
   }
+
   DEBUG_CODE_END ();
   DEBUG ((DEBUG_ERROR, "\n  R0 0x%08x   R1 0x%08x   R2 0x%08x   R3 0x%08x\n", SystemContext.SystemContextArm->R0, SystemContext.SystemContextArm->R1, SystemContext.SystemContextArm->R2, SystemContext.SystemContextArm->R3));
   DEBUG ((DEBUG_ERROR, "  R4 0x%08x   R5 0x%08x   R6 0x%08x   R7 0x%08x\n", SystemContext.SystemContextArm->R4, SystemContext.SystemContextArm->R5, SystemContext.SystemContextArm->R6, SystemContext.SystemContextArm->R7));

ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerUefi.c

@@ -53,9 +53,11 @@ GetImageName (
   for (Entry = 0; Entry < DebugTableHeader->TableSize; Entry++, DebugTable++) {
     if (DebugTable->NormalImage != NULL) {
       if ((DebugTable->NormalImage->ImageInfoType == EFI_DEBUG_IMAGE_INFO_TYPE_NORMAL) &&
-          (DebugTable->NormalImage->LoadedImageProtocolInstance != NULL)) {
+          (DebugTable->NormalImage->LoadedImageProtocolInstance != NULL))
+      {
         if ((Address >= (CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase) &&
-            (Address <= ((CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase + DebugTable->NormalImage->LoadedImageProtocolInstance->ImageSize))) {
+            (Address <= ((CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase + DebugTable->NormalImage->LoadedImageProtocolInstance->ImageSize)))
+        {
           *ImageBase           = (UINTN)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase;
           *PeCoffSizeOfHeaders = PeCoffGetSizeOfHeaders ((VOID *)(UINTN)*ImageBase);
           return PeCoffLoaderGetPdbPointer (DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase);
@@ -66,4 +68,3 @@ GetImageName (
 
   return NULL;
 }
-

ArmPkg/Library/LinuxBootBootManagerLib/LinuxBootBm.c

@@ -96,6 +96,7 @@ PlatformRegisterFvBootOption (
     Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
     ASSERT_EFI_ERROR (Status);
   }
+
   EfiBootManagerFreeLoadOption (&NewOption);
   EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
 }

ArmPkg/Library/OpteeLib/Optee.c

@@ -41,7 +41,8 @@ IsOpteePresent (
   if ((ArmSmcArgs.Arg0 == OPTEE_OS_UID0) &&
       (ArmSmcArgs.Arg1 == OPTEE_OS_UID1) &&
       (ArmSmcArgs.Arg2 == OPTEE_OS_UID2) &&
-      (ArmSmcArgs.Arg3 == OPTEE_OS_UID3)) {
+      (ArmSmcArgs.Arg3 == OPTEE_OS_UID3))
+  {
     return TRUE;
   } else {
     return FALSE;
@@ -441,7 +442,8 @@ OpteeInvokeFunction (
         InvokeFunctionArg->Params,
         OPTEE_MAX_CALL_PARAMS,
         MessageArg->Params
-        ) != 0) {
+        ) != 0)
+  {
     MessageArg->Return       = OPTEE_ERROR_COMMUNICATION;
     MessageArg->ReturnOrigin = OPTEE_ORIGIN_COMMUNICATION;
   }

ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c

@@ -28,10 +28,10 @@
 VOID
 EFIAPI
 SetPeiServicesTablePointer (
-  IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
+  IN CONST EFI_PEI_SERVICES  **PeiServicesTablePointer
   )
 {
-  ArmWriteTpidrurw((UINTN)PeiServicesTablePointer);
+  ArmWriteTpidrurw ((UINTN)PeiServicesTablePointer);
 }
 
 /**
@@ -52,7 +52,7 @@ GetPeiServicesTablePointer (
   VOID
   )
 {
-  return (CONST EFI_PEI_SERVICES **)ArmReadTpidrurw();
+  return (CONST EFI_PEI_SERVICES **)ArmReadTpidrurw ();
 }
 
 /**
@@ -71,9 +71,9 @@ migration actions are required for Itanium or ARM CPUs.
 **/
 VOID
 EFIAPI
-MigratePeiServicesTablePointer(
+MigratePeiServicesTablePointer (
-VOID
+  VOID
-)
+  )
 {
   return;
 }

ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c

@@ -91,7 +91,6 @@ STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
   }
 };
 
-
 #pragma pack (1)
 typedef struct {
   USB_CLASS_DEVICE_PATH       Keyboard;
@@ -124,7 +123,6 @@ STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
   }
 };
 
-
 /**
   Check if the handle satisfies a particular condition.
 
@@ -138,12 +136,11 @@ STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
 **/
 typedef
 BOOLEAN
-(EFIAPI *FILTER_FUNCTION) (
+(EFIAPI *FILTER_FUNCTION)(
   IN EFI_HANDLE   Handle,
   IN CONST CHAR16 *ReportText
   );
 
-
 /**
   Process a handle.
 
@@ -153,7 +150,7 @@ BOOLEAN
 **/
 typedef
 VOID
-(EFIAPI *CALLBACK_FUNCTION)  (
+(EFIAPI *CALLBACK_FUNCTION)(
   IN EFI_HANDLE   Handle,
   IN CONST CHAR16 *ReportText
   );
@@ -184,14 +181,24 @@ FilterAndProcess (
   UINTN       NoHandles;
   UINTN       Idx;
 
-  Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
+  Status = gBS->LocateHandleBuffer (
-                  NULL /* SearchKey */, &NoHandles, &Handles);
+                  ByProtocol,
+                  ProtocolGuid,
+                  NULL /* SearchKey */,
+                  &NoHandles,
+                  &Handles
+                  );
   if (EFI_ERROR (Status)) {
     //
     // This is not an error, just an informative condition.
     //
-    DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
+    DEBUG ((
-      Status));
+      DEBUG_VERBOSE,
+      "%a: %g: %r\n",
+      __FUNCTION__,
+      ProtocolGuid,
+      Status
+      ));
     return;
   }
 
@@ -212,7 +219,7 @@ FilterAndProcess (
       DevicePathText = Fallback;
     }
 
-    if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) {
+    if ((Filter == NULL) || Filter (Handles[Idx], DevicePathText)) {
       Process (Handles[Idx], DevicePathText);
     }
 
@@ -220,10 +227,10 @@ FilterAndProcess (
       FreePool (DevicePathText);
     }
   }
+
   gBS->FreePool (Handles);
 }
 
-
 /**
   This FILTER_FUNCTION checks if a handle corresponds to a PCI display device.
 **/
@@ -239,8 +246,11 @@ IsPciDisplay (
   EFI_PCI_IO_PROTOCOL  *PciIo;
   PCI_TYPE00           Pci;
 
-  Status = gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid,
+  Status = gBS->HandleProtocol (
-                  (VOID**)&PciIo);
+                  Handle,
+                  &gEfiPciIoProtocolGuid,
+                  (VOID **)&PciIo
+                  );
   if (EFI_ERROR (Status)) {
     //
     // This is not an error worth reporting.
@@ -248,8 +258,13 @@ IsPciDisplay (
     return FALSE;
   }
 
-  Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */,
+  Status = PciIo->Pci.Read (
-                        sizeof Pci / sizeof (UINT32), &Pci);
+                        PciIo,
+                        EfiPciIoWidthUint32,
+                        0 /* Offset */,
+                        sizeof Pci / sizeof (UINT32),
+                        &Pci
+                        );
   if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status));
     return FALSE;
@@ -258,7 +273,6 @@ IsPciDisplay (
   return IS_PCI_DISPLAY (&Pci);
 }
 
-
 /**
   This FILTER_FUNCTION checks if a handle corresponds to a non-discoverable
   USB host controller.
@@ -274,22 +288,25 @@ IsUsbHost (
   NON_DISCOVERABLE_DEVICE  *Device;
   EFI_STATUS               Status;
 
-  Status = gBS->HandleProtocol (Handle,
+  Status = gBS->HandleProtocol (
+                  Handle,
                   &gEdkiiNonDiscoverableDeviceProtocolGuid,
-                  (VOID **)&Device);
+                  (VOID **)&Device
+                  );
   if (EFI_ERROR (Status)) {
     return FALSE;
   }
 
   if (CompareGuid (Device->Type, &gEdkiiNonDiscoverableUhciDeviceGuid) ||
       CompareGuid (Device->Type, &gEdkiiNonDiscoverableEhciDeviceGuid) ||
-      CompareGuid (Device->Type, &gEdkiiNonDiscoverableXhciDeviceGuid)) {
+      CompareGuid (Device->Type, &gEdkiiNonDiscoverableXhciDeviceGuid))
+  {
     return TRUE;
   }
+
   return FALSE;
 }
 
-
 /**
   This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
   the matching driver to produce all first-level child handles.
@@ -310,11 +327,15 @@ Connect (
                   NULL,   // RemainingDevicePath -- produce all children
                   FALSE   // Recursive
                   );
-  DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n",
+  DEBUG ((
-    __FUNCTION__, ReportText, Status));
+    EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE,
+    "%a: %s: %r\n",
+    __FUNCTION__,
+    ReportText,
+    Status
+    ));
 }
 
-
 /**
   This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the
   handle, and adds it to ConOut and ErrOut.
@@ -332,27 +353,46 @@ AddOutput (
 
   DevicePath = DevicePathFromHandle (Handle);
   if (DevicePath == NULL) {
-    DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n",
+    DEBUG ((
-      __FUNCTION__, ReportText, Handle));
+      DEBUG_ERROR,
+      "%a: %s: handle %p: device path not found\n",
+      __FUNCTION__,
+      ReportText,
+      Handle
+      ));
     return;
   }
 
   Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__,
+    DEBUG ((
-      ReportText, Status));
+      DEBUG_ERROR,
+      "%a: %s: adding to ConOut: %r\n",
+      __FUNCTION__,
+      ReportText,
+      Status
+      ));
     return;
   }
 
   Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__,
+    DEBUG ((
-      ReportText, Status));
+      DEBUG_ERROR,
+      "%a: %s: adding to ErrOut: %r\n",
+      __FUNCTION__,
+      ReportText,
+      Status
+      ));
     return;
   }
 
-  DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
+  DEBUG ((
-    ReportText));
+    DEBUG_VERBOSE,
+    "%a: %s: added to ConOut and ErrOut\n",
+    __FUNCTION__,
+    ReportText
+    ));
 }
 
 STATIC
@@ -376,7 +416,7 @@ PlatformRegisterFvBootOption (
   Status = gBS->HandleProtocol (
                   gImageHandle,
                   &gEfiLoadedImageProtocolGuid,
-                  (VOID **) &LoadedImage
+                  (VOID **)&LoadedImage
                   );
   ASSERT_EFI_ERROR (Status);
 
@@ -385,7 +425,7 @@ PlatformRegisterFvBootOption (
   ASSERT (DevicePath != NULL);
   DevicePath = AppendDevicePathNode (
                  DevicePath,
-                 (EFI_DEVICE_PATH_PROTOCOL *) &FileNode
+                 (EFI_DEVICE_PATH_PROTOCOL *)&FileNode
                  );
   ASSERT (DevicePath != NULL);
 
@@ -403,25 +443,33 @@ PlatformRegisterFvBootOption (
   FreePool (DevicePath);
 
   BootOptions = EfiBootManagerGetLoadOptions (
-                  &BootOptionCount, LoadOptionTypeBoot
+                  &BootOptionCount,
+                  LoadOptionTypeBoot
                   );
 
   OptionIndex = EfiBootManagerFindLoadOption (
-                  &NewOption, BootOptions, BootOptionCount
+                  &NewOption,
+                  BootOptions,
+                  BootOptionCount
                   );
 
   if (OptionIndex == -1) {
     Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
     ASSERT_EFI_ERROR (Status);
-    Status = EfiBootManagerAddKeyOptionVariable (NULL,
+    Status = EfiBootManagerAddKeyOptionVariable (
-               (UINT16)NewOption.OptionNumber, 0, Key, NULL);
+               NULL,
+               (UINT16)NewOption.OptionNumber,
+               0,
+               Key,
+               NULL
+               );
     ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
   }
+
   EfiBootManagerFreeLoadOption (&NewOption);
   EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
 }
 
-
 STATIC
 VOID
 GetPlatformOptions (
@@ -437,11 +485,15 @@ GetPlatformOptions (
   UINTN                           Index;
   UINTN                           BootCount;
 
-  Status = gBS->LocateProtocol (&gPlatformBootManagerProtocolGuid, NULL,
+  Status = gBS->LocateProtocol (
-                  (VOID **)&PlatformBootManager);
+                  &gPlatformBootManagerProtocolGuid,
+                  NULL,
+                  (VOID **)&PlatformBootManager
+                  );
   if (EFI_ERROR (Status)) {
     return;
   }
+
   Status = PlatformBootManager->GetPlatformBootOptionsAndKeys (
                                   &BootCount,
                                   &BootOptions,
@@ -450,6 +502,7 @@ GetPlatformOptions (
   if (EFI_ERROR (Status)) {
     return;
   }
+
   //
   // Fetch the existent boot options. If there are none, CurrentBootCount
   // will be zeroed.
@@ -491,10 +544,16 @@ GetPlatformOptions (
                  MAX_UINTN
                  );
       if (EFI_ERROR (Status)) {
-        DEBUG ((DEBUG_ERROR, "%a: failed to register \"%s\": %r\n",
+        DEBUG ((
-          __FUNCTION__, BootOptions[Index].Description, Status));
+          DEBUG_ERROR,
+          "%a: failed to register \"%s\": %r\n",
+          __FUNCTION__,
+          BootOptions[Index].Description,
+          Status
+          ));
         continue;
       }
+
       BootOptionNumber = BootOptions[Index].OptionNumber;
     }
 
@@ -513,10 +572,16 @@ GetPlatformOptions (
                NULL
                );
     if (EFI_ERROR (Status)) {
-      DEBUG ((DEBUG_ERROR, "%a: failed to register hotkey for \"%s\": %r\n",
+      DEBUG ((
-        __FUNCTION__, BootOptions[Index].Description, Status));
+        DEBUG_ERROR,
+        "%a: failed to register hotkey for \"%s\": %r\n",
+        __FUNCTION__,
+        BootOptions[Index].Description,
+        Status
+        ));
     }
   }
+
   EfiBootManagerFreeLoadOptions (CurrentBootOptions, CurrentBootOptionCount);
   EfiBootManagerFreeLoadOptions (BootOptions, BootCount);
   FreePool (BootKeys);
@@ -554,19 +619,27 @@ PlatformRegisterOptionsAndKeys (
   Status          = EfiBootManagerGetBootManagerMenu (&BootOption);
   ASSERT_EFI_ERROR (Status);
   Status = EfiBootManagerAddKeyOptionVariable (
-             NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL
+             NULL,
+             (UINT16)BootOption.OptionNumber,
+             0,
+             &F2,
+             NULL
              );
   ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
   Status = EfiBootManagerAddKeyOptionVariable (
-             NULL, (UINT16) BootOption.OptionNumber, 0, &Esc, NULL
+             NULL,
+             (UINT16)BootOption.OptionNumber,
+             0,
+             &Esc,
+             NULL
              );
   ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
 }
 
-
 //
 // BDS Platform Functions
 //
+
 /**
   Do the platform init, can be customized by OEM/IBV
   Possible things that can be done in PlatformBootManagerBeforeConsole:
@@ -626,27 +699,45 @@ PlatformBootManagerBeforeConsole (
   //
   // Add the hardcoded short-form USB keyboard device path to ConIn.
   //
-  EfiBootManagerUpdateConsoleVariable (ConIn,
+  EfiBootManagerUpdateConsoleVariable (
-    (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL);
+    ConIn,
+    (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard,
+    NULL
+    );
 
   //
   // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
   //
-  STATIC_ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) == 4,
+  STATIC_ASSERT (
-    "PcdDefaultTerminalType must be TTYTERM");
+    FixedPcdGet8 (PcdDefaultTerminalType) == 4,
-  STATIC_ASSERT (FixedPcdGet8 (PcdUartDefaultParity) != 0,
+    "PcdDefaultTerminalType must be TTYTERM"
-    "PcdUartDefaultParity must be set to an actual value, not 'default'");
+    );
-  STATIC_ASSERT (FixedPcdGet8 (PcdUartDefaultStopBits) != 0,
+  STATIC_ASSERT (
-    "PcdUartDefaultStopBits must be set to an actual value, not 'default'");
+    FixedPcdGet8 (PcdUartDefaultParity) != 0,
+    "PcdUartDefaultParity must be set to an actual value, not 'default'"
+    );
+  STATIC_ASSERT (
+    FixedPcdGet8 (PcdUartDefaultStopBits) != 0,
+    "PcdUartDefaultStopBits must be set to an actual value, not 'default'"
+    );
 
   CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid);
 
-  EfiBootManagerUpdateConsoleVariable (ConIn,
+  EfiBootManagerUpdateConsoleVariable (
-    (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+    ConIn,
-  EfiBootManagerUpdateConsoleVariable (ConOut,
+    (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole,
-    (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+    NULL
-  EfiBootManagerUpdateConsoleVariable (ErrOut,
+    );
-    (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+  EfiBootManagerUpdateConsoleVariable (
+    ConOut,
+    (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole,
+    NULL
+    );
+  EfiBootManagerUpdateConsoleVariable (
+    ErrOut,
+    (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole,
+    NULL
+    );
 
   //
   // Register platform-specific boot options and keyboard shortcuts.
@@ -668,8 +759,11 @@ HandleCapsules (
 
   DEBUG ((DEBUG_INFO, "%a: processing capsules ...\n", __FUNCTION__));
 
-  Status = gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL,
+  Status = gBS->LocateProtocol (
-                  (VOID **)&EsrtManagement);
+                  &gEsrtManagementProtocolGuid,
+                  NULL,
+                  (VOID **)&EsrtManagement
+                  );
   if (!EFI_ERROR (Status)) {
     EsrtManagement->SyncEsrtFmp ();
   }
@@ -679,14 +773,22 @@ HandleCapsules (
   //
   HobPointer.Raw = GetHobList ();
   NeedReset      = FALSE;
-  while ((HobPointer.Raw = GetNextHob (EFI_HOB_TYPE_UEFI_CAPSULE,
+  while ((HobPointer.Raw = GetNextHob (
-                             HobPointer.Raw)) != NULL) {
+                             EFI_HOB_TYPE_UEFI_CAPSULE,
+                             HobPointer.Raw
+                             )) != NULL)
+  {
     CapsuleHeader = (VOID *)(UINTN)HobPointer.Capsule->BaseAddress;
 
     Status = ProcessCapsuleImage (CapsuleHeader);
     if (EFI_ERROR (Status)) {
-      DEBUG ((DEBUG_ERROR, "%a: failed to process capsule %p - %r\n",
+      DEBUG ((
-        __FUNCTION__, CapsuleHeader, Status));
+        DEBUG_ERROR,
+        "%a: failed to process capsule %p - %r\n",
+        __FUNCTION__,
+        CapsuleHeader,
+        Status
+        ));
       return;
     }
 
@@ -695,15 +797,17 @@ HandleCapsules (
   }
 
   if (NeedReset) {
-      DEBUG ((DEBUG_WARN, "%a: capsule update successful, resetting ...\n",
+    DEBUG ((
-        __FUNCTION__));
+      DEBUG_WARN,
+      "%a: capsule update successful, resetting ...\n",
+      __FUNCTION__
+      ));
 
     gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
-      CpuDeadLoop();
+    CpuDeadLoop ();
   }
 }
 
-
 #define VERSION_STRING_PREFIX  L"Tianocore/EDK2 firmware version "
 
 /**
@@ -776,13 +880,17 @@ BootDiscoveryPolicyHandler (
                   (VOID **)&BMPolicy
                   );
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_INFO, "%a - Failed to locate gEfiBootManagerPolicyProtocolGuid."
+    DEBUG ((
-      "Driver connect will be skipped.\n", __FUNCTION__));
+      DEBUG_INFO,
+      "%a - Failed to locate gEfiBootManagerPolicyProtocolGuid."
+      "Driver connect will be skipped.\n",
+      __FUNCTION__
+      ));
     return Status;
   }
 
   Status = BMPolicy->ConnectDeviceClass (BMPolicy, Class);
-  if (EFI_ERROR (Status)){
+  if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "%a - ConnectDeviceClass returns - %r\n", __FUNCTION__, Status));
     return Status;
   }
@@ -845,21 +953,33 @@ PlatformBootManagerAfterConsole (
   Status = BootLogoEnableLogo ();
   if (EFI_ERROR (Status)) {
     if (FirmwareVerLength > 0) {
-      Print (VERSION_STRING_PREFIX L"%s\n",
+      Print (
-        PcdGetPtr (PcdFirmwareVersionString));
+        VERSION_STRING_PREFIX L"%s\n",
+        PcdGetPtr (PcdFirmwareVersionString)
+        );
     }
+
     Print (L"Press ESCAPE for boot options ");
   } else if (FirmwareVerLength > 0) {
-    Status = gBS->HandleProtocol (gST->ConsoleOutHandle,
+    Status = gBS->HandleProtocol (
-                    &gEfiGraphicsOutputProtocolGuid, (VOID **)&GraphicsOutput);
+                    gST->ConsoleOutHandle,
+                    &gEfiGraphicsOutputProtocolGuid,
+                    (VOID **)&GraphicsOutput
+                    );
     if (!EFI_ERROR (Status)) {
       PosX = (GraphicsOutput->Mode->Info->HorizontalResolution -
               (StrLen (VERSION_STRING_PREFIX) + FirmwareVerLength) *
               EFI_GLYPH_WIDTH) / 2;
       PosY = 0;
 
-      PrintXY (PosX, PosY, NULL, NULL, VERSION_STRING_PREFIX L"%s",
+      PrintXY (
-        PcdGetPtr (PcdFirmwareVersionString));
+        PosX,
+        PosY,
+        NULL,
+        NULL,
+        VERSION_STRING_PREFIX L"%s",
+        PcdGetPtr (PcdFirmwareVersionString)
+        );
     }
   }
 
@@ -943,8 +1063,10 @@ PlatformBootManagerUnableToBoot (
   //
   // Record the total number of boot configured boot options
   //
-  BootOptions = EfiBootManagerGetLoadOptions (&OldBootOptionCount,
+  BootOptions = EfiBootManagerGetLoadOptions (
-                  LoadOptionTypeBoot);
+                  &OldBootOptionCount,
+                  LoadOptionTypeBoot
+                  );
   EfiBootManagerFreeLoadOptions (BootOptions, OldBootOptionCount);
 
   //
@@ -956,8 +1078,10 @@ PlatformBootManagerUnableToBoot (
   //
   // Record the updated number of boot configured boot options
   //
-  BootOptions = EfiBootManagerGetLoadOptions (&NewBootOptionCount,
+  BootOptions = EfiBootManagerGetLoadOptions (
-                  LoadOptionTypeBoot);
+                  &NewBootOptionCount,
+                  LoadOptionTypeBoot
+                  );
   EfiBootManagerFreeLoadOptions (BootOptions, NewBootOptionCount);
 
   //
@@ -969,8 +1093,11 @@ PlatformBootManagerUnableToBoot (
   //
   if (!PcdGetBool (PcdEmuVariableNvModeEnable)) {
     if (NewBootOptionCount != OldBootOptionCount) {
-      DEBUG ((DEBUG_WARN, "%a: rebooting after refreshing all boot options\n",
+      DEBUG ((
-        __FUNCTION__));
+        DEBUG_WARN,
+        "%a: rebooting after refreshing all boot options\n",
+        __FUNCTION__
+        ));
       gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
     }
   }
@@ -980,7 +1107,7 @@ PlatformBootManagerUnableToBoot (
     return;
   }
 
-  for (;;) {
+  for ( ; ;) {
     EfiBootManagerBoot (&BootManagerMenu);
   }
 }

ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c

@@ -39,7 +39,8 @@ WriteStringToFile (
   // This gets you all the symbols except for SEC. To get SEC symbols you need to copy the
   // debug print in the SEC into the debugger manually
   SemihostWriteString (Buffer);
-/*
+
+  /*
     I'm currently having issues with this code crashing the debugger. Seems like it should work.
 
     UINT32        SemihostHandle;
@@ -51,7 +52,6 @@ WriteStringToFile (
    */
 }
 
-
 /**
   If the build is done on cygwin the paths are cygpaths.
   /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
@@ -88,14 +88,13 @@ DeCygwinPathIfNeeded (
   // switch path separators
   for (Index = 11; Index < Len; Index++) {
     if (Ptr[Index] == '/') {
-      Ptr[Index] = '\\' ;
+      Ptr[Index] = '\\';
     }
   }
 
   return Name;
 }
 
-
 /**
   Performs additional actions after a PE/COFF image has been loaded and relocated.
 
@@ -113,18 +112,16 @@ PeCoffLoaderRelocateImageExtraAction (
 {
   CHAR8  Buffer[256];
 
-#if (__ARMCC_VERSION < 500000)
+ #if (__ARMCC_VERSION < 500000)
-  AsciiSPrint (Buffer, sizeof(Buffer), "load /a /ni /np \"%a\" &0x%08x\n", ImageContext->PdbPointer, (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders));
+  AsciiSPrint (Buffer, sizeof (Buffer), "load /a /ni /np \"%a\" &0x%08x\n", ImageContext->PdbPointer, (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders));
-#else
+ #else
-  AsciiSPrint (Buffer, sizeof(Buffer), "add-symbol-file %a 0x%08x\n", ImageContext->PdbPointer, (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders));
+  AsciiSPrint (Buffer, sizeof (Buffer), "add-symbol-file %a 0x%08x\n", ImageContext->PdbPointer, (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders));
-#endif
+ #endif
   DeCygwinPathIfNeeded (&Buffer[16]);
 
   WriteStringToFile (Buffer, AsciiStrSize (Buffer));
 }
 
-
-
 /**
   Performs additional actions just before a PE/COFF image is unloaded.  Any resources
   that were allocated by PeCoffLoaderRelocateImageExtraAction() must be freed.
@@ -143,7 +140,7 @@ PeCoffLoaderUnloadImageExtraAction (
 {
   CHAR8  Buffer[256];
 
-  AsciiSPrint (Buffer, sizeof(Buffer), "unload symbols_only \"%a\"\n", ImageContext->PdbPointer);
+  AsciiSPrint (Buffer, sizeof (Buffer), "unload symbols_only \"%a\"\n", ImageContext->PdbPointer);
   DeCygwinPathIfNeeded (Buffer);
 
   WriteStringToFile (Buffer, AsciiStrSize (Buffer));

ArmPkg/Library/SemiHostingDebugLib/DebugLib.c

@@ -7,7 +7,6 @@
 
 **/
 
-
 #include <Uefi.h>
 #include <Library/DebugLib.h>
 #include <Library/PrintLib.h>
@@ -56,7 +55,6 @@ DebugPrint (
   VA_END (Marker);
 }
 
-
 /**
   Prints a debug message to the debug output device if the specified
   error level is enabled base on Null-terminated format string and a
@@ -92,7 +90,7 @@ DebugPrintMarker (
   //
   // Check driver debug mask value and global mask
   //
-  if ((ErrorLevel & PcdGet32(PcdDebugPrintErrorLevel)) == 0) {
+  if ((ErrorLevel & PcdGet32 (PcdDebugPrintErrorLevel)) == 0) {
     return;
   }
 
@@ -108,7 +106,6 @@ DebugPrintMarker (
   SemihostWriteString (AsciiBuffer);
 }
 
-
 /**
   Prints a debug message to the debug output device if the specified
   error level is enabled.
@@ -135,7 +132,6 @@ DebugVPrint (
   DebugPrintMarker (ErrorLevel, Format, VaListMarker, NULL);
 }
 
-
 /**
   Prints a debug message to the debug output device if the specified
   error level is enabled.
@@ -164,7 +160,6 @@ DebugBPrint (
   DebugPrintMarker (ErrorLevel, Format, mVaListNull, BaseListMarker);
 }
 
-
 /**
 
   Prints an assert message containing a filename, line number, and description.
@@ -208,14 +203,13 @@ DebugAssert (
   //
   // Generate a Breakpoint, DeadLoop, or NOP based on PCD settings
   //
-  if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED) != 0) {
+  if ((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED) != 0) {
     CpuBreakpoint ();
-  } else if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED) != 0) {
+  } else if ((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED) != 0) {
     CpuDeadLoop ();
   }
 }
 
-
 /**
 
   Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
@@ -248,10 +242,9 @@ DebugClearMemory (
   //
   // SetMem() checks for the ASSERT() condition on Length and returns Buffer
   //
-  return SetMem (Buffer, Length, PcdGet8(PcdDebugClearMemoryValue));
+  return SetMem (Buffer, Length, PcdGet8 (PcdDebugClearMemoryValue));
 }
 
-
 /**
 
   Returns TRUE if ASSERT() macros are enabled.
@@ -269,10 +262,9 @@ DebugAssertEnabled (
   VOID
   )
 {
-  return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
+  return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
 }
 
-
 /**
 
   Returns TRUE if DEBUG()macros are enabled.
@@ -290,10 +282,9 @@ DebugPrintEnabled (
   VOID
   )
 {
-  return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
+  return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
 }
 
-
 /**
 
   Returns TRUE if DEBUG_CODE()macros are enabled.
@@ -311,10 +302,9 @@ DebugCodeEnabled (
   VOID
   )
 {
-  return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
+  return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
 }
 
-
 /**
 
   Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.
@@ -332,5 +322,5 @@ DebugClearMemoryEnabled (
   VOID
   )
 {
-  return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0);
+  return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0);
 }

ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c

@@ -13,7 +13,6 @@
 #include <Library/SemihostLib.h>
 #include <Library/SerialPortLib.h>
 
-
 /*
 
   Programmed hardware of Serial port.
@@ -53,7 +52,7 @@ EFIAPI
 SerialPortWrite (
   IN UINT8  *Buffer,
   IN UINTN  NumberOfBytes
-)
+  )
 {
   UINT8  PrintBuffer[PRINT_BUFFER_SIZE];
   UINTN  SourceIndex;
@@ -63,12 +62,10 @@ SerialPortWrite (
   SourceIndex      = 0;
   DestinationIndex = 0;
 
-  while (SourceIndex < NumberOfBytes)
+  while (SourceIndex < NumberOfBytes) {
-  {
     CurrentCharacter = Buffer[SourceIndex++];
 
-      switch (CurrentCharacter)
+    switch (CurrentCharacter) {
-      {
       case '\r':
         continue;
 
@@ -81,25 +78,22 @@ SerialPortWrite (
         break;
     }
 
-      if (DestinationIndex > PRINT_BUFFER_THRESHOLD)
+    if (DestinationIndex > PRINT_BUFFER_THRESHOLD) {
-      {
       PrintBuffer[DestinationIndex] = '\0';
-          SemihostWriteString ((CHAR8 *) PrintBuffer);
+      SemihostWriteString ((CHAR8 *)PrintBuffer);
 
       DestinationIndex = 0;
     }
   }
 
-  if (DestinationIndex > 0)
+  if (DestinationIndex > 0) {
-  {
     PrintBuffer[DestinationIndex] = '\0';
-      SemihostWriteString ((CHAR8 *) PrintBuffer);
+    SemihostWriteString ((CHAR8 *)PrintBuffer);
   }
 
   return NumberOfBytes;
 }
 
-
 /**
   Read data from serial device and save the datas in buffer.
 
@@ -115,14 +109,12 @@ EFIAPI
 SerialPortRead (
   OUT UINT8  *Buffer,
   IN  UINTN  NumberOfBytes
-)
+  )
 {
   *Buffer = SemihostReadCharacter ();
   return 1;
 }
 
-
-
 /**
   Check to see if any data is available to be read from the debug device.
 
@@ -139,4 +131,3 @@ SerialPortPoll (
   // Since SemiHosting read character is blocking always say we have a char ready?
   return SemihostConnectionSupported ();
 }
-

ArmPkg/Library/SemihostLib/SemihostLib.c

@@ -42,7 +42,7 @@ SemihostFileOpen (
 
   OpenBlock.FileName   = FileName;
   OpenBlock.Mode       = Mode;
-  OpenBlock.NameLength  = AsciiStrLen(FileName);
+  OpenBlock.NameLength = AsciiStrLen (FileName);
 
   Result = SEMIHOST_SYS_OPEN (&OpenBlock);
 
@@ -124,10 +124,11 @@ SemihostFileWrite (
 
   *Length = SEMIHOST_SYS_WRITE (&WriteBlock);
 
-  if (*Length != 0)
+  if (*Length != 0) {
     return RETURN_ABORTED;
-  else
+  } else {
     return RETURN_SUCCESS;
+  }
 }
 
 RETURN_STATUS
@@ -178,7 +179,7 @@ SemihostFileLength (
 
 **/
 RETURN_STATUS
-SemihostFileTmpName(
+SemihostFileTmpName (
   OUT  VOID   *Buffer,
   IN   UINT8  Identifier,
   IN   UINTN  Length
@@ -218,7 +219,7 @@ SemihostFileRemove (
   }
 
   RemoveBlock.FileName   = FileName;
-  RemoveBlock.NameLength  = AsciiStrLen(FileName);
+  RemoveBlock.NameLength = AsciiStrLen (FileName);
 
   Result = SEMIHOST_SYS_REMOVE (&RemoveBlock);
 
@@ -241,7 +242,7 @@ SemihostFileRemove (
 
 **/
 RETURN_STATUS
-SemihostFileRename(
+SemihostFileRename (
   IN  CHAR8  *FileName,
   IN  CHAR8  *NewFileName
   )
@@ -299,7 +300,7 @@ SemihostSystem (
   SEMIHOST_SYSTEM_BLOCK  SystemBlock;
 
   SystemBlock.CommandLine   = CommandLine;
-  SystemBlock.CommandLength = AsciiStrLen(CommandLine);
+  SystemBlock.CommandLength = AsciiStrLen (CommandLine);
 
   return SEMIHOST_SYS_SYSTEM (&SystemBlock);
 }

ArmPkg/Library/SemihostLib/SemihostPrivate.h

@@ -50,103 +50,103 @@ typedef struct {
   UINTN    CommandLength;
 } SEMIHOST_SYSTEM_BLOCK;
 
-#if defined(__CC_ARM)
+#if defined (__CC_ARM)
 
-#if defined(__thumb__)
+  #if defined (__thumb__)
 #define SWI  0xAB
-#else
+  #else
 #define SWI  0x123456
-#endif
+  #endif
 
 #define SEMIHOST_SUPPORTED  TRUE
 
-__swi(SWI)
+__swi (SWI)
 INT32
-_Semihost_SYS_OPEN(
+_Semihost_SYS_OPEN (
   IN UINTN                     SWI_0x01,
   IN SEMIHOST_FILE_OPEN_BLOCK  *OpenBlock
   );
 
-__swi(SWI)
+__swi (SWI)
 INT32
-_Semihost_SYS_CLOSE(
+_Semihost_SYS_CLOSE (
   IN UINTN   SWI_0x02,
   IN UINT32  *Handle
   );
 
-__swi(SWI)
+__swi (SWI)
 VOID
-_Semihost_SYS_WRITEC(
+_Semihost_SYS_WRITEC (
   IN UINTN  SWI_0x03,
   IN CHAR8  *Character
   );
 
-__swi(SWI)
+__swi (SWI)
 VOID
-_Semihost_SYS_WRITE0(
+_Semihost_SYS_WRITE0 (
   IN UINTN  SWI_0x04,
   IN CHAR8  *String
   );
 
-__swi(SWI)
+__swi (SWI)
 UINT32
-_Semihost_SYS_WRITE(
+_Semihost_SYS_WRITE (
   IN     UINTN                           SWI_0x05,
   IN OUT SEMIHOST_FILE_READ_WRITE_BLOCK  *WriteBlock
   );
 
-__swi(SWI)
+__swi (SWI)
 UINT32
-_Semihost_SYS_READ(
+_Semihost_SYS_READ (
   IN     UINTN                           SWI_0x06,
   IN OUT SEMIHOST_FILE_READ_WRITE_BLOCK  *ReadBlock
   );
 
-__swi(SWI)
+__swi (SWI)
 CHAR8
-_Semihost_SYS_READC(
+_Semihost_SYS_READC (
   IN     UINTN  SWI_0x07,
   IN     UINTN  Zero
   );
 
-__swi(SWI)
+__swi (SWI)
 INT32
-_Semihost_SYS_SEEK(
+_Semihost_SYS_SEEK (
   IN UINTN                     SWI_0x0A,
   IN SEMIHOST_FILE_SEEK_BLOCK  *SeekBlock
   );
 
-__swi(SWI)
+__swi (SWI)
 INT32
-_Semihost_SYS_FLEN(
+_Semihost_SYS_FLEN (
   IN UINTN   SWI_0x0C,
   IN UINT32  *Handle
   );
 
-__swi(SWI)
+__swi (SWI)
 UINT32
-_Semihost_SYS_TMPNAME(
+_Semihost_SYS_TMPNAME (
   IN UINTN                        SWI_0x0D,
   IN SEMIHOST_FILE_TMPNAME_BLOCK  *TmpNameBlock
   );
 
-__swi(SWI)
+__swi (SWI)
 UINT32
-_Semihost_SYS_REMOVE(
+_Semihost_SYS_REMOVE (
   IN UINTN                       SWI_0x0E,
   IN SEMIHOST_FILE_REMOVE_BLOCK  *RemoveBlock
   );
 
-__swi(SWI)
+__swi (SWI)
 UINT32
-_Semihost_SYS_RENAME(
+_Semihost_SYS_RENAME (
   IN UINTN                       SWI_0x0F,
   IN SEMIHOST_FILE_RENAME_BLOCK  *RenameBlock
   );
 
-__swi(SWI)
+__swi (SWI)
 UINT32
-_Semihost_SYS_SYSTEM(
+_Semihost_SYS_SYSTEM (
   IN UINTN                  SWI_0x12,
   IN SEMIHOST_SYSTEM_BLOCK  *SystemBlock
   );
@@ -165,7 +165,7 @@ _Semihost_SYS_SYSTEM(
 #define SEMIHOST_SYS_RENAME(RenameBlock)    _Semihost_SYS_RENAME(0x0F, RenameBlock)
 #define SEMIHOST_SYS_SYSTEM(SystemBlock)    _Semihost_SYS_SYSTEM(0x12, SystemBlock)
 
-#elif defined(__GNUC__) // __CC_ARM
+#elif defined (__GNUC__) // __CC_ARM
 
 #define SEMIHOST_SUPPORTED  TRUE
 

ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c

@@ -256,6 +256,7 @@ ArmSetMemoryRegionNoExec (
              MemoryAttributes | CodePermission
              );
   }
+
   return Status;
 }
 
@@ -278,6 +279,7 @@ ArmClearMemoryRegionNoExec (
              MemoryAttributes & ~CodePermission
              );
   }
+
   return Status;
 }
 
@@ -300,6 +302,7 @@ ArmSetMemoryRegionReadOnly (
              MemoryAttributes | DataPermission
              );
   }
+
   return Status;
 }
 
@@ -315,13 +318,16 @@ ArmClearMemoryRegionReadOnly (
 
   Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
   if (!EFI_ERROR (Status)) {
-    PermissionRequest = SET_MEM_ATTR_MAKE_PERM_REQUEST (SET_MEM_ATTR_DATA_PERM_RW,
+    PermissionRequest = SET_MEM_ATTR_MAKE_PERM_REQUEST (
-                                                        MemoryAttributes);
+                          SET_MEM_ATTR_DATA_PERM_RW,
+                          MemoryAttributes
+                          );
     return RequestMemoryPermissionChange (
              BaseAddress,
              Length,
              PermissionRequest
              );
   }
+
   return Status;
 }

ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c

@@ -15,7 +15,6 @@
 #include <Library/HiiLib.h>
 #include <Library/OemMiscLib.h>
 
-
 /** Gets the CPU frequency of the specified processor.
 
   @param ProcessorIndex Index of the processor to get the frequency for.

ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c

@@ -90,7 +90,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTableTemplate = {
   5,                          // AssetTag
   6,                          // PartNumber
   0,                          // CoreCount
-    0,                        //EnabledCoreCount
+  0,                          // EnabledCoreCount
   0,                          // ThreadCount
   0,                          // ProcessorCharacteristics
   ProcessorFamilyARM,         // ProcessorFamily2
@@ -148,22 +148,27 @@ GetCacheSocketStr (
 {
   UINTN  CacheSocketStrLen;
 
-  if (CacheLevel == CpuCacheL1 && !DataCache && !UnifiedCache) {
+  if ((CacheLevel == CpuCacheL1) && !DataCache && !UnifiedCache) {
     CacheSocketStrLen = UnicodeSPrint (
                           CacheSocketStr,
                           SMBIOS_STRING_MAX_LENGTH - 1,
                           L"L%x Instruction Cache",
-                          CacheLevel);
+                          CacheLevel
-  } else if (CacheLevel == CpuCacheL1 && DataCache) {
+                          );
-    CacheSocketStrLen = UnicodeSPrint (CacheSocketStr,
+  } else if ((CacheLevel == CpuCacheL1) && DataCache) {
+    CacheSocketStrLen = UnicodeSPrint (
+                          CacheSocketStr,
                           SMBIOS_STRING_MAX_LENGTH - 1,
                           L"L%x Data Cache",
-                          CacheLevel);
+                          CacheLevel
+                          );
   } else {
-    CacheSocketStrLen = UnicodeSPrint (CacheSocketStr,
+    CacheSocketStrLen = UnicodeSPrint (
+                          CacheSocketStr,
                           SMBIOS_STRING_MAX_LENGTH - 1,
                           L"L%x Cache",
-                          CacheLevel);
+                          CacheLevel
+                          );
   }
 
   return CacheSocketStrLen;
@@ -198,15 +203,17 @@ ConfigureCacheArchitectureInformation (
   } else if (UnifiedCache) {
     Type7Record->SystemCacheType = CacheTypeUnified;
   } else {
-    ASSERT(FALSE);
+    ASSERT (FALSE);
   }
 
-  CacheSize64 = SmbiosProcessorGetCacheSize (CacheLevel,
+  CacheSize64 = SmbiosProcessorGetCacheSize (
+                  CacheLevel,
                   DataCache,
                   UnifiedCache
                   );
 
-  Associativity = SmbiosProcessorGetCacheAssociativity (CacheLevel,
+  Associativity = SmbiosProcessorGetCacheAssociativity (
+                    CacheLevel,
                     DataCache,
                     UnifiedCache
                     );
@@ -278,7 +285,6 @@ ConfigureCacheArchitectureInformation (
                                     (CacheLevel - 1);
 }
 
-
 /** Allocates and initializes an SMBIOS_TABLE_TYPE7 structure.
 
   @param[in]  CacheLevel       The cache level (L1-L7).
@@ -308,15 +314,17 @@ AllocateAndInitCacheInformation (
     return NULL;
   }
 
-  CacheSocketStrLen = GetCacheSocketStr (CacheLevel,
+  CacheSocketStrLen = GetCacheSocketStr (
+                        CacheLevel,
                         DataCache,
                         UnifiedCache,
-                                         CacheSocketStr);
+                        CacheSocketStr
+                        );
 
   TableSize   = sizeof (SMBIOS_TABLE_TYPE7) + CacheSocketStrLen + 1 + 1;
   Type7Record = AllocateZeroPool (TableSize);
   if (Type7Record == NULL) {
-    FreePool(CacheSocketStr);
+    FreePool (CacheSocketStr);
     return NULL;
   }
 
@@ -385,11 +393,12 @@ AddSmbiosCacheTypeTable (
     // process the instruction cache.
     for (DataCacheType = 0; DataCacheType <= 1; DataCacheType++) {
       // If there's no separate data/instruction cache, skip the second iteration
-      if (DataCacheType == 1 && !SeparateCaches) {
+      if ((DataCacheType == 1) && !SeparateCaches) {
         continue;
       }
 
-      Type7Record = AllocateAndInitCacheInformation (CacheLevel,
+      Type7Record = AllocateAndInitCacheInformation (
+                      CacheLevel,
                       DataCacheType,
                       !SeparateCaches
                       );
@@ -397,22 +406,33 @@ AddSmbiosCacheTypeTable (
         continue;
       }
 
-      ConfigureCacheArchitectureInformation(CacheLevel,
+      ConfigureCacheArchitectureInformation (
+        CacheLevel,
         DataCacheType,
         !SeparateCaches,
         Type7Record
         );
 
       // Allow the platform to fill in other information such as speed, SRAM type etc.
-      if (!OemGetCacheInformation (ProcessorIndex, CacheLevel,
+      if (!OemGetCacheInformation (
-                                   DataCacheType, !SeparateCaches, Type7Record)) {
+             ProcessorIndex,
+             CacheLevel,
+             DataCacheType,
+             !SeparateCaches,
+             Type7Record
+             ))
+      {
         continue;
       }
 
       SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
       // Finally, install the table
-      Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle,
+      Status = mSmbios->Add (
-                             (EFI_SMBIOS_TABLE_HEADER *)Type7Record);
+                          mSmbios,
+                          NULL,
+                          &SmbiosHandle,
+                          (EFI_SMBIOS_TABLE_HEADER *)Type7Record
+                          );
       if (EFI_ERROR (Status)) {
         continue;
       }
@@ -504,8 +524,12 @@ AllocateType4AndSetProcessorInformationStrings (
     return EFI_OUT_OF_RESOURCES;
   }
 
-  ProcessorStrLen = UnicodeSPrint (ProcessorStr, StringBufferSize,
+  ProcessorStrLen = UnicodeSPrint (
-                                         L"CPU%02d", ProcessorIndex + 1);
+                      ProcessorStr,
+                      StringBufferSize,
+                      L"CPU%02d",
+                      ProcessorIndex + 1
+                      );
 
   // Processor Manufacture
   ProcessorManuStr    = HiiGetPackageString (&gEfiCallerIdGuid, ProcessorManu, NULL);
@@ -643,18 +667,24 @@ AddSmbiosProcessorTypeTable (
     return Status;
   }
 
-  OemGetProcessorInformation (ProcessorIndex,
+  OemGetProcessorInformation (
+    ProcessorIndex,
     &ProcessorStatus,
-                              (PROCESSOR_CHARACTERISTIC_FLAGS*)
+    (PROCESSOR_CHARACTERISTIC_FLAGS *)
     &Type4Record->ProcessorCharacteristics,
-                              &MiscProcessorData);
+    &MiscProcessorData
+    );
 
   if (ProcessorPopulated) {
-    AddSmbiosCacheTypeTable (ProcessorIndex, &L1CacheHandle,
+    AddSmbiosCacheTypeTable (
-                             &L2CacheHandle, &L3CacheHandle);
+      ProcessorIndex,
+      &L1CacheHandle,
+      &L2CacheHandle,
+      &L3CacheHandle
+      );
   }
 
-  LegacyVoltage = (UINT8*)&Type4Record->Voltage;
+  LegacyVoltage = (UINT8 *)&Type4Record->Voltage;
 
   *LegacyVoltage                 = MiscProcessorData.Voltage;
   Type4Record->CurrentSpeed      = MiscProcessorData.CurrentSpeed;
@@ -674,23 +704,33 @@ AddSmbiosProcessorTypeTable (
   Type4Record->ExternalClock =
     (UINT16)(SmbiosGetExternalClockFrequency () / 1000 / 1000);
 
-  ProcessorId = (UINT64*)&Type4Record->ProcessorId;
+  ProcessorId  = (UINT64 *)&Type4Record->ProcessorId;
   *ProcessorId = SmbiosGetProcessorId ();
 
   ProcessorCharacteristics               = SmbiosGetProcessorCharacteristics ();
-  Type4Record->ProcessorCharacteristics |= *((UINT64*)&ProcessorCharacteristics);
+  Type4Record->ProcessorCharacteristics |= *((UINT64 *)&ProcessorCharacteristics);
 
   Type4Record->ProcessorFamily  = SmbiosGetProcessorFamily ();
   Type4Record->ProcessorFamily2 = SmbiosGetProcessorFamily2 ();
 
   SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
-  Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle,
+  Status       = mSmbios->Add (
-                         (EFI_SMBIOS_TABLE_HEADER *)Type4Record);
+                            mSmbios,
+                            NULL,
+                            &SmbiosHandle,
+                            (EFI_SMBIOS_TABLE_HEADER *)Type4Record
+                            );
 
   if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type04 Table Log Failed! %r \n",
+    DEBUG ((
-            __FUNCTION__, DEBUG_LINE_NUMBER, Status));
+      DEBUG_ERROR,
+      "[%a]:[%dL] Smbios Type04 Table Log Failed! %r \n",
+      __FUNCTION__,
+      DEBUG_LINE_NUMBER,
+      Status
+      ));
   }
+
   FreePool (Type4Record);
 
   return Status;
@@ -707,7 +747,7 @@ AddSmbiosProcessorTypeTable (
 **/
 EFI_STATUS
 EFIAPI
-ProcessorSubClassEntryPoint(
+ProcessorSubClassEntryPoint (
   IN EFI_HANDLE        ImageHandle,
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
@@ -718,7 +758,7 @@ ProcessorSubClassEntryPoint(
   //
   // Locate dependent protocols
   //
-  Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID**)&mSmbios);
+  Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID **)&mSmbios);
   if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol.  %r\n", Status));
     return Status;
@@ -727,7 +767,8 @@ ProcessorSubClassEntryPoint(
   //
   // Add our default strings to the HII database. They will be modified later.
   //
-  mHiiHandle = HiiAddPackages (&gEfiCallerIdGuid,
+  mHiiHandle = HiiAddPackages (
+                 &gEfiCallerIdGuid,
                  NULL,
                  ProcessorSubClassStrings,
                  NULL,

ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessor.h

@@ -69,34 +69,44 @@ SmbiosProcessorGetCacheAssociativity (
     @return Processor ID.
 **/
 UINT64
-SmbiosGetProcessorId (VOID);
+SmbiosGetProcessorId (
+  VOID
+  );
 
 /** Returns the external clock frequency.
 
     @return The external CPU clock frequency.
 **/
 UINTN
-SmbiosGetExternalClockFrequency (VOID);
+SmbiosGetExternalClockFrequency (
+  VOID
+  );
 
 /** Returns the SMBIOS ProcessorFamily field value.
 
     @return The value for the ProcessorFamily field.
 **/
 UINT8
-SmbiosGetProcessorFamily (VOID);
+SmbiosGetProcessorFamily (
+  VOID
+  );
 
 /** Returns the ProcessorFamily2 field value.
 
     @return The value for the ProcessorFamily2 field.
 **/
 UINT16
-SmbiosGetProcessorFamily2 (VOID);
+SmbiosGetProcessorFamily2 (
+  VOID
+  );
 
 /** Returns the SMBIOS Processor Characteristics.
 
     @return Processor Characteristics bitfield.
 **/
 PROCESSOR_CHARACTERISTIC_FLAGS
-SmbiosGetProcessorCharacteristics (VOID);
+SmbiosGetProcessorCharacteristics (
+  VOID
+  );
 
 #endif // SMBIOS_PROCESSOR_H_

ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorAArch64.c

@@ -26,7 +26,7 @@ SmbiosProcessorGetCacheSize (
   IN UINT8    CacheLevel,
   IN BOOLEAN  DataCache,
   IN BOOLEAN  UnifiedCache
-)
+  )
 {
   CCSIDR_DATA  Ccsidr;
   CSSELR_DATA  Csselr;
@@ -90,4 +90,3 @@ SmbiosProcessorGetCacheAssociativity (
 
   return Associativity;
 }
-

ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c

@@ -94,4 +94,3 @@ SmbiosProcessorGetCacheAssociativity (
 
   return Associativity;
 }
-

ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c

@@ -98,7 +98,7 @@ HasSmcArm64SocId (
   ArmCallSmc (&Args);
   SmcCallStatus = (INT32)Args.Arg0;
 
-  if (SmcCallStatus < 0 || (SmcCallStatus >> 16) >= 1) {
+  if ((SmcCallStatus < 0) || ((SmcCallStatus >> 16) >= 1)) {
     Args.Arg0 = SMCCC_ARCH_FEATURES;
     Args.Arg1 = SMCCC_ARCH_SOC_ID;
     ArmCallSmc (&Args);
@@ -221,7 +221,7 @@ SmbiosGetProcessorFamily2 (
   if (((MainIdRegister >> 16) & 0xF) < 8) {
     ProcessorFamily2 = ProcessorFamilyARM;
   } else {
-    if (sizeof (VOID*) == 4) {
+    if (sizeof (VOID *) == 4) {
       ProcessorFamily2 = ProcessorFamilyARMv7;
     } else {
       ProcessorFamily2 = ProcessorFamilyARMv8;