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ArmPkg: Apply uncrustify changes

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the ArmPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
This commit is contained in:
Michael Kubacki
2021-12-05 14:53:50 -08:00
committed by mergify[bot]
parent 7c2a6033c1
commit 429309e0c6
142 changed files with 6020 additions and 5216 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.c
View File

@ -26,7 +26,9 @@ ArmCrashDumpDxeInitialize (
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
ASSERT_EFI_ERROR (Status);
return mCpu->RegisterInterruptHandler (mCpu,
return mCpu->RegisterInterruptHandler (
mCpu,
EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS,
&DefaultExceptionHandler);
&DefaultExceptionHandler
);
}

29
ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c
View File

@ -33,7 +33,6 @@ UINTN mGicNumInterrupts = 0;
HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL;
/**
Calculate GICD_ICFGRn base address and corresponding bit
field Int_config[1] of the GIC distributor register.
@ -71,8 +70,6 @@ GicGetDistributorIcfgBaseAndBit (
return EFI_SUCCESS;
}
/**
Register Handler for the specified interrupt source.
@ -137,17 +134,28 @@ CpuArchEventProtocolNotify (
// Unregister the default exception handler.
Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__,
Status
));
return;
}
// Register to receive interrupts
Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ,
Context);
Status = Cpu->RegisterInterruptHandler (
Cpu,
ARM_ARCH_EXCEPTION_IRQ,
Context
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__,
Status
));
}
gBS->CloseEvent (Event);
@ -191,7 +199,8 @@ InstallAndRegisterInterruptService (
TPL_CALLBACK,
CpuArchEventProtocolNotify,
InterruptHandler,
&mCpuArchProtocolNotifyEventRegistration);
&mCpuArchProtocolNotifyEventRegistration
);
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (

1
ArmPkg/Drivers/ArmGic/ArmGicDxe.h
View File

@ -55,7 +55,6 @@ GicV3DxeInitialize (
IN EFI_SYSTEM_TABLE *SystemTable
);
// Shared code
/**

12
ArmPkg/Drivers/ArmGic/ArmGicLib.c
View File

@ -230,7 +230,8 @@ ArmGicSetInterruptPriority (
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source)) {
SourceIsSpi (Source))
{
MmioAndThenOr32 (
GicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
~(0xff << RegShift),
@ -273,7 +274,8 @@ ArmGicEnableInterrupt (
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source)) {
SourceIsSpi (Source))
{
// Write set-enable register
MmioWrite32 (
GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset),
@ -317,7 +319,8 @@ ArmGicDisableInterrupt (
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source)) {
SourceIsSpi (Source))
{
// Write clear-enable register
MmioWrite32 (
GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset),
@ -361,7 +364,8 @@ ArmGicIsInterruptEnabled (
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source)) {
SourceIsSpi (Source))
{
Interrupts = ((MmioRead32 (
GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)
)

10
ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
View File

@ -261,9 +261,13 @@ GicV2SetTriggerType (
BOOLEAN SourceEnabled;
if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
TriggerType));
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH))
{
DEBUG ((
DEBUG_ERROR,
"Invalid interrupt trigger type: %d\n", \
TriggerType
));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}

1
ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c
View File

@ -10,7 +10,6 @@
#include <Library/IoLib.h>
#include <Library/ArmGicLib.h>
VOID
EFIAPI
ArmGicV2EnableInterruptInterface (

14
ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
View File

@ -255,9 +255,13 @@ GicV3SetTriggerType (
BOOLEAN SourceEnabled;
if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
TriggerType));
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH))
{
DEBUG ((
DEBUG_ERROR,
"Invalid interrupt trigger type: %d\n", \
TriggerType
));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -430,8 +434,8 @@ GicV3DxeInitialize (
if ((MmioRead32 (
mGicDistributorBase + ARM_GIC_ICDDCR
) & ARM_GIC_ICDDCR_DS) != 0) {
) & ARM_GIC_ICDDCR_DS) != 0)
{
// If the Disable Security (DS) control bit is set, we are dealing with a
// GIC that has only one security state. In this case, let's assume we are
// executing in non-secure state (which is appropriate for DXE modules)

9
ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
View File

@ -117,7 +117,7 @@ CpuIoCheckParameter (
// For FIFO type, the target address won't increase during the access,
// so treat Count as 1
//
if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
if ((Width >= EfiCpuIoWidthFifoUint8) && (Width <= EfiCpuIoWidthFifoUint64)) {
Count = 1;
}
@ -161,6 +161,7 @@ CpuIoCheckParameter (
if (MaxCount < (Count - 1)) {
return EFI_UNSUPPORTED;
}
if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
return EFI_UNSUPPORTED;
}
@ -254,6 +255,7 @@ CpuMemoryServiceRead (
*((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
}
}
return EFI_SUCCESS;
}
@ -335,6 +337,7 @@ CpuMemoryServiceWrite (
MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
}
}
return EFI_SUCCESS;
}
@ -521,7 +524,6 @@ STATIC EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
}
};
/**
The user Entry Point for module CpuIo2Dxe. The user code starts with this function.
@ -544,7 +546,8 @@ ArmPciCpuIo2Initialize (
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiCpuIo2ProtocolGuid);
Status = gBS->InstallMultipleProtocolInterfaces (
&mHandle,
&gEfiCpuIo2ProtocolGuid, &mCpuIo2,
&gEfiCpuIo2ProtocolGuid,
&mCpuIo2,
NULL
);
ASSERT_EFI_ERROR (Status);

1
ArmPkg/Drivers/ArmScmiDxe/ArmScmiClockProtocolPrivate.h
View File

@ -53,7 +53,6 @@ typedef struct {
CLOCK_RATE_DWORD Rate;
} CLOCK_RATE_SET_ATTRIBUTES;
// Message parameters for CLOCK_CONFIG_SET command.
typedef struct {
UINT32 ClockId;

4
ArmPkg/Drivers/ArmScmiDxe/Scmi.c
View File

@ -124,7 +124,9 @@ ScmiCommandExecute (
Response = (SCMI_MESSAGE_RESPONSE *)MtlGetChannelPayload (Channel);
if (Response->Status != ScmiSuccess) {
DEBUG ((DEBUG_ERROR, "SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
DEBUG ((
DEBUG_ERROR,
"SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
Command->ProtocolId,
Command->MessageId,
Response->Status

1
ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c
View File

@ -256,7 +256,6 @@ BaseDiscoverListProtocols (
Skip = 0;
while (Skip < TotalProtocols) {
*MessageParams = Skip;
// Note PayloadLength is a IN/OUT parameter.

2
ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
View File

@ -135,6 +135,7 @@ ClockGetClockAttributes (
if (EFI_ERROR (Status)) {
return Status;
}
// TRUE if bit 0 of ClockAttributes->Attributes is set.
*Enabled = CLOCK_ENABLED (ClockAttributes->Attributes);
@ -209,7 +210,6 @@ ClockDescribeRates (
*MessageParams++ = ClockId;
do {
*MessageParams = RateIndex;
// Set Payload length, note PayloadLength is a IN/OUT parameter.

7
ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c
View File

@ -88,7 +88,8 @@ ArmScmiDxeEntryPoint (
// Accept any version between SCMI v1.0 and SCMI v2.0
if ((Version < BASE_PROTOCOL_VERSION_V1) ||
(Version > BASE_PROTOCOL_VERSION_V2)) {
(Version > BASE_PROTOCOL_VERSION_V2))
{
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -130,7 +131,8 @@ ArmScmiDxeEntryPoint (
// Install supported protocol on ImageHandle.
for (ProtocolIndex = 1; ProtocolIndex < ARRAY_SIZE (Protocols);
ProtocolIndex++) {
ProtocolIndex++)
{
for (Index = 0; Index < NumProtocols; Index++) {
if (Protocols[ProtocolIndex].Id == SupportedList[Index]) {
Status = Protocols[ProtocolIndex].InitFn (&ImageHandle);
@ -138,6 +140,7 @@ ArmScmiDxeEntryPoint (
ASSERT_EFI_ERROR (Status);
return Status;
}
break;
}
}

1
ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.h
View File

@ -8,6 +8,7 @@
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
DEN0056A_System_Control_and_Management_Interface.pdf
**/
#ifndef SCMI_DXE_H_
#define SCMI_DXE_H_

2
ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c
View File

@ -183,7 +183,6 @@ PerformanceDescribeLevels (
Cmd.MessageId = ScmiMessageIdPerformanceDescribeLevels;
do {
*MessageParams = LevelIndex;
// Note, PayloadLength is an IN/OUT parameter.
@ -219,7 +218,6 @@ PerformanceDescribeLevels (
sizeof (SCMI_PERFORMANCE_LEVEL)
);
}
} while (ReturnRemainNumLevels != 0);
*LevelArraySize = RequiredSize;

1
ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
View File

@ -8,6 +8,7 @@
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
DEN0056A_System_Control_and_Management_Interface.pdf
**/
#ifndef SCMI_PRIVATE_H_
#define SCMI_PRIVATE_H_

71
ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
View File

@ -52,9 +52,11 @@ PageAttributeToGcdAttribute (
GcdAttributes = EFI_MEMORY_WB;
break;
default:
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n",
PageAttributes));
PageAttributes
));
ASSERT (0);
// The Global Coherency Domain (GCD) value is defined as a bit set.
// Returning 0 means no attribute has been set.
@ -63,7 +65,8 @@ PageAttributeToGcdAttribute (
// Determine protection attributes
if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) ||
((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {
((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO))
{
// Read only cases map to write-protect
GcdAttributes |= EFI_MEMORY_RO;
}
@ -88,7 +91,7 @@ GetFirstPageAttribute (
// Get the first entry of the table
FirstEntry = *FirstLevelTableAddress;
if ((TableLevel != 3) && (FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
if ((TableLevel != 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY)) {
// Only valid for Levels 0, 1 and 2
// Get the attribute of the subsequent table
@ -138,14 +141,18 @@ GetNextEntryAttribute (
// If Entry is a Table Descriptor type entry then go through the sub-level table
if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {
((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
{
if ((*PrevEntryAttribute == INVALID_ENTRY) || (EntryAttribute != *PrevEntryAttribute)) {
if (*PrevEntryAttribute != INVALID_ENTRY) {
// Update GCD with the last region
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
*StartGcdRegion,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))) - *StartGcdRegion,
PageAttributeToGcdAttribute (*PrevEntryAttribute));
PageAttributeToGcdAttribute (*PrevEntryAttribute)
);
}
// Start of the new region
@ -159,17 +166,24 @@ GetNextEntryAttribute (
ASSERT (TableLevel < 3);
// Increase the level number and scan the sub-level table
GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
TT_ENTRY_COUNT, TableLevel + 1,
GetNextEntryAttribute (
(UINT64 *)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
TT_ENTRY_COUNT,
TableLevel + 1,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))),
PrevEntryAttribute, StartGcdRegion);
PrevEntryAttribute,
StartGcdRegion
);
} else {
if (*PrevEntryAttribute != INVALID_ENTRY) {
// Update GCD with the last region
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
*StartGcdRegion,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))) - *StartGcdRegion,
PageAttributeToGcdAttribute (*PrevEntryAttribute));
PageAttributeToGcdAttribute (*PrevEntryAttribute)
);
// Start of the new region
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel));
@ -232,17 +246,24 @@ SyncCacheConfig (
// We scan from the start of the memory map (ie: at the address 0x0)
BaseAddressGcdRegion = 0x0;
EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,
TableCount, TableLevel,
EndAddressGcdRegion = GetNextEntryAttribute (
FirstLevelTableAddress,
TableCount,
TableLevel,
BaseAddressGcdRegion,
&PageAttribute, &BaseAddressGcdRegion);
&PageAttribute,
&BaseAddressGcdRegion
);
// Update GCD with the last region if valid
if (PageAttribute != INVALID_ENTRY) {
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
BaseAddressGcdRegion,
EndAddressGcdRegion - BaseAddressGcdRegion,
PageAttributeToGcdAttribute (PageAttribute));
PageAttributeToGcdAttribute (PageAttribute)
);
}
FreePool (MemorySpaceMap);
@ -264,6 +285,7 @@ EfiAttributeToArmAttribute (
} else {
ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
}
break;
case EFI_MEMORY_WC:
ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
@ -330,7 +352,10 @@ GetMemoryRegionRec (
NextTranslationTable, // Address of the next level page table
TableLevel + 1, // Next Page Table level
(UINTN *)TT_LAST_BLOCK_ADDRESS (NextTranslationTable, TT_ENTRY_COUNT),
BaseAddress, RegionLength, RegionAttributes);
BaseAddress,
RegionLength,
RegionAttributes
);
// In case of 'Success', it means the end of the block region has been found into the upper
// level translation table
@ -358,6 +383,7 @@ GetMemoryRegionRec (
// In case we have found the end of the region we return success
return EFI_SUCCESS;
}
BlockEntry++;
}
@ -388,9 +414,14 @@ GetMemoryRegion (
// Get the Table info from T0SZ
GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);
Status = GetMemoryRegionRec (TranslationTable, TableLevel,
Status = GetMemoryRegionRec (
TranslationTable,
TableLevel,
(UINTN *)TT_LAST_BLOCK_ADDRESS (TranslationTable, EntryCount),
BaseAddress, RegionLength, RegionAttributes);
BaseAddress,
RegionLength,
RegionAttributes
);
// If the region continues up to the end of the root table then GetMemoryRegionRec()
// will return EFI_NOT_FOUND

19
ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
View File

@ -206,6 +206,7 @@ SyncCacheConfigPage (
*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
NextPageAttributes = 0;
}
*NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;
}
@ -233,7 +234,6 @@ SyncCacheConfig (
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));
// This code assumes MMU is enabled and filed with section translations
@ -246,7 +246,6 @@ SyncCacheConfig (
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
ASSERT_EFI_ERROR (Status);
// The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
// to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
// GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were
@ -284,6 +283,7 @@ SyncCacheConfig (
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextSectionAttributes = SectionAttributes;
}
NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
} else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (FirstLevelTable[i])) {
// In this case any bits set in the 'NextSectionAttributes' are garbage and were set from
@ -292,9 +292,14 @@ SyncCacheConfig (
// section attributes into page attributes
NextSectionAttributes = 0;
Status = SyncCacheConfigPage (
i,FirstLevelTable[i],
NumberOfDescriptors, MemorySpaceMap,
&NextRegionBase,&NextRegionLength,&NextSectionAttributes);
i,
FirstLevelTable[i],
NumberOfDescriptors,
MemorySpaceMap,
&NextRegionBase,
&NextRegionLength,
&NextSectionAttributes
);
ASSERT_EFI_ERROR (Status);
} else {
// We do not support yet 16MB sections
@ -313,6 +318,7 @@ SyncCacheConfig (
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextSectionAttributes = 0;
}
NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
}
} // section entry loop
@ -494,7 +500,8 @@ GetMemoryRegion (
break;
}
} else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) {
((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
{
if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {
// If the attributes of the section differ from the one targeted then we exit the loop
break;

8
ArmPkg/Drivers/CpuDxe/CpuDxe.c
View File

@ -49,7 +49,6 @@ CpuFlushCpuDataCache (
IN EFI_CPU_FLUSH_TYPE FlushType
)
{
switch (FlushType) {
case EfiCpuFlushTypeWriteBack:
WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
@ -67,7 +66,6 @@ CpuFlushCpuDataCache (
return EFI_SUCCESS;
}
/**
This function enables interrupt processing by the processor.
@ -88,7 +86,6 @@ CpuEnableInterrupt (
return EFI_SUCCESS;
}
/**
This function disables interrupt processing by the processor.
@ -109,7 +106,6 @@ CpuDisableInterrupt (
return EFI_SUCCESS;
}
/**
This function retrieves the processor's current interrupt state a returns it in
State. If interrupts are currently enabled, then TRUE is returned. If interrupts
@ -138,7 +134,6 @@ CpuGetInterruptState (
return EFI_SUCCESS;
}
/**
This function generates an INIT on the processor. If this function succeeds, then the
processor will be reset, and control will not be returned to the caller. If InitType is
@ -247,7 +242,8 @@ CpuDxeInitialize (
Status = gBS->InstallMultipleProtocolInterfaces (
&mCpuHandle,
&gEfiCpuArchProtocolGuid, &mCpu,
&gEfiCpuArchProtocolGuid,
&mCpu,
NULL
);

2
ArmPkg/Drivers/CpuDxe/CpuDxe.h
View File

@ -59,7 +59,6 @@ RegisterInterruptHandler (
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
);
/**
This function registers and enables the handler specified by InterruptHandler for a processor
interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
@ -86,7 +85,6 @@ RegisterDebuggerInterruptHandler (
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
);
EFI_STATUS
EFIAPI
CpuSetMemoryAttributes (

27
ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
View File

@ -43,19 +43,22 @@ SearchGcdMemorySpaces (
*EndIndex = 0;
for (Index = 0; Index < NumberOfDescriptors; Index++) {
if ((BaseAddress >= MemorySpaceMap[Index].BaseAddress) &&
(BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
(BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)))
{
*StartIndex = Index;
}
if (((BaseAddress + Length - 1) >= MemorySpaceMap[Index].BaseAddress) &&
((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)))
{
*EndIndex = Index;
return EFI_SUCCESS;
}
}
return EFI_NOT_FOUND;
}
/**
Sets the attributes for a specified range in Gcd Memory Space Map.
@ -88,14 +91,21 @@ SetGcdMemorySpaceAttributes (
EFI_PHYSICAL_ADDRESS RegionStart;
UINT64 RegionLength;
DEBUG ((DEBUG_GCD, "SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",
BaseAddress, BaseAddress + Length, Attributes));
DEBUG ((
DEBUG_GCD,
"SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",
BaseAddress,
BaseAddress + Length,
Attributes
));
// We do not support a smaller granularity than 4KB on ARM Architecture
if ((Length & EFI_PAGE_MASK) != 0) {
DEBUG ((DEBUG_WARN,
DEBUG ((
DEBUG_WARN,
"Warning: We do not support smaller granularity than 4KB on ARM Architecture (passed length: 0x%lX).\n",
Length));
Length
));
}
//
@ -120,6 +130,7 @@ SetGcdMemorySpaceAttributes (
if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
continue;
}
//
// Calculate the start and end address of the overlapping range
//
@ -128,11 +139,13 @@ SetGcdMemorySpaceAttributes (
} else {
RegionStart = MemorySpaceMap[Index].BaseAddress;
}
if ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)) {
RegionLength = BaseAddress + Length - RegionStart;
} else {
RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
}
//
// Set memory attributes according to MTRR attribute and the original attribute of descriptor
//

3
ArmPkg/Drivers/CpuDxe/CpuMpCore.c
View File

@ -79,7 +79,8 @@ PublishArmProcessorTable (
// Allocate runtime memory for ARM processor Table entries
ArmProcessorTable->ArmCpus = (ARM_CORE_INFO *)AllocateRuntimePool (
ArmProcessorTable->NumberOfEntries * sizeof(ARM_CORE_INFO));
ArmProcessorTable->NumberOfEntries * sizeof (ARM_CORE_INFO)
);
// Check if the memory allocation is successful or not
ASSERT (NULL != ArmProcessorTable->ArmCpus);

2
ArmPkg/Drivers/CpuDxe/Exception.c
View File

@ -24,7 +24,7 @@ InitializeExceptions (
VectorInfo = (EFI_VECTOR_HANDOFF_INFO *)NULL;
Status = EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList);
if (Status == EFI_SUCCESS && VectorInfoList != NULL) {
if ((Status == EFI_SUCCESS) && (VectorInfoList != NULL)) {
VectorInfo = VectorInfoList;
}

2
ArmPkg/Drivers/CpuPei/CpuPei.c
View File

@ -16,8 +16,6 @@ Abstract:
**/
//
// The package level header files this module uses
//

1
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h
View File

@ -5,6 +5,7 @@
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#ifndef GENERIC_WATCHDOG_H_
#define GENERIC_WATCHDOG_H_

56
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
View File

@ -119,8 +119,12 @@ WatchdogInterruptHandler (
mWatchdogNotify (TimerPeriod + 1);
}
gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, StrSize (ResetString),
(CHAR16 *)ResetString);
gRT->ResetSystem (
EfiResetCold,
EFI_TIMEOUT,
StrSize (ResetString),
(CHAR16 *)ResetString
);
// If we got here then the reset didn't work
ASSERT (FALSE);
@ -158,11 +162,11 @@ WatchdogRegisterHandler (
IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
)
{
if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
if ((mWatchdogNotify == NULL) && (NotifyFunction == NULL)) {
return EFI_INVALID_PARAMETER;
}
if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
if ((mWatchdogNotify != NULL) && (NotifyFunction != NULL)) {
return EFI_ALREADY_STARTED;
}
@ -307,8 +311,11 @@ GenericWatchdogEntry (
EFI_STATUS Status;
EFI_HANDLE Handle;
Status = gBS->LocateProtocol (&gHardwareInterrupt2ProtocolGuid, NULL,
(VOID **)&mInterruptProtocol);
Status = gBS->LocateProtocol (
&gHardwareInterrupt2ProtocolGuid,
NULL,
(VOID **)&mInterruptProtocol
);
ASSERT_EFI_ERROR (Status);
/* Make sure the Watchdog Timer Architectural Protocol has not been installed
@ -320,33 +327,44 @@ GenericWatchdogEntry (
ASSERT (mTimerFrequencyHz != 0);
// Install interrupt handler
Status = mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
Status = mInterruptProtocol->RegisterInterruptSource (
mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
WatchdogInterruptHandler);
WatchdogInterruptHandler
);
if (EFI_ERROR (Status)) {
return Status;
}
Status = mInterruptProtocol->SetTriggerType (mInterruptProtocol,
Status = mInterruptProtocol->SetTriggerType (
mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING);
EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING
);
if (EFI_ERROR (Status)) {
goto UnregisterHandler;
}
// Install the Timer Architectural Protocol onto a new handle
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
&gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,
NULL);
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEfiWatchdogTimerArchProtocolGuid,
&mWatchdogTimer,
NULL
);
if (EFI_ERROR (Status)) {
goto UnregisterHandler;
}
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
WatchdogExitBootServicesEvent, NULL,
&mEfiExitBootServicesEvent);
Status = gBS->CreateEvent (
EVT_SIGNAL_EXIT_BOOT_SERVICES,
TPL_NOTIFY,
WatchdogExitBootServicesEvent,
NULL,
&mEfiExitBootServicesEvent
);
ASSERT_EFI_ERROR (Status);
mNumTimerTicks = 0;
@ -356,8 +374,10 @@ GenericWatchdogEntry (
UnregisterHandler:
// Unregister the handler
mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
mInterruptProtocol->RegisterInterruptSource (
mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
NULL);
NULL
);
return Status;
}

74
ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c
View File

@ -100,10 +100,12 @@ MmCommunication2Communicate (
// This case can be used by the consumer of this driver to find out the
// max size that can be used for allocating CommBuffer.
if ((*CommSize == 0) ||
(*CommSize > mNsCommBuffMemRegion.Length)) {
(*CommSize > mNsCommBuffMemRegion.Length))
{
*CommSize = mNsCommBuffMemRegion.Length;
return EFI_BAD_BUFFER_SIZE;
}
//
// CommSize must match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
//
@ -117,7 +119,8 @@ MmCommunication2Communicate (
// environment then return the expected size.
//
if ((BufferSize == 0) ||
(BufferSize > mNsCommBuffMemRegion.Length)) {
(BufferSize > mNsCommBuffMemRegion.Length))
{
CommunicateHeader->MessageLength = mNsCommBuffMemRegion.Length -
sizeof (CommunicateHeader->HeaderGuid) -
sizeof (CommunicateHeader->MessageLength);
@ -219,15 +222,19 @@ NotifySetVirtualAddressMap (
(VOID **)&mNsCommBuffMemRegion.VirtualBase
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "NotifySetVirtualAddressMap():"
" Unable to convert MM runtime pointer. Status:0x%r\n", Status));
DEBUG ((
DEBUG_ERROR,
"NotifySetVirtualAddressMap():"
" Unable to convert MM runtime pointer. Status:0x%r\n",
Status
));
}
}
STATIC
EFI_STATUS
GetMmCompatibility ()
GetMmCompatibility (
)
{
EFI_STATUS Status;
UINT32 MmVersion;
@ -241,13 +248,24 @@ GetMmCompatibility ()
MmVersion = MmVersionArgs.Arg0;
if ((MM_MAJOR_VER (MmVersion) == MM_CALLER_MAJOR_VER) &&
(MM_MINOR_VER(MmVersion) >= MM_CALLER_MINOR_VER)) {
DEBUG ((DEBUG_INFO, "MM Version: Major=0x%x, Minor=0x%x\n",
MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion)));
(MM_MINOR_VER (MmVersion) >= MM_CALLER_MINOR_VER))
{
DEBUG ((
DEBUG_INFO,
"MM Version: Major=0x%x, Minor=0x%x\n",
MM_MAJOR_VER (MmVersion),
MM_MINOR_VER (MmVersion)
));
Status = EFI_SUCCESS;
} else {
DEBUG ((DEBUG_ERROR, "Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion), MM_CALLER_MAJOR_VER, MM_CALLER_MINOR_VER));
DEBUG ((
DEBUG_ERROR,
"Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
MM_MAJOR_VER (MmVersion),
MM_MINOR_VER (MmVersion),
MM_CALLER_MAJOR_VER,
MM_CALLER_MINOR_VER
));
Status = EFI_UNSUPPORTED;
}
@ -339,8 +357,11 @@ MmCommunication2Initialize (
EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
"Failed to add MM-NS Buffer Memory Space\n"));
DEBUG ((
DEBUG_ERROR,
"MmCommunicateInitialize: "
"Failed to add MM-NS Buffer Memory Space\n"
));
goto ReturnErrorStatus;
}
@ -350,8 +371,11 @@ MmCommunication2Initialize (
EFI_MEMORY_WB | EFI_MEMORY_XP | EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
"Failed to set MM-NS Buffer Memory attributes\n"));
DEBUG ((
DEBUG_ERROR,
"MmCommunicateInitialize: "
"Failed to set MM-NS Buffer Memory attributes\n"
));
goto CleanAddedMemorySpace;
}
@ -363,8 +387,11 @@ MmCommunication2Initialize (
&mMmCommunication2
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "MmCommunicationInitialize: "
"Failed to install MM communication protocol\n"));
DEBUG ((
DEBUG_ERROR,
"MmCommunicationInitialize: "
"Failed to install MM communication protocol\n"
));
goto CleanAddedMemorySpace;
}
@ -381,17 +408,24 @@ MmCommunication2Initialize (
ASSERT_EFI_ERROR (Status);
for (Index = 0; Index < ARRAY_SIZE (mGuidedEventGuid); Index++) {
Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
MmGuidedEventNotify, mGuidedEventGuid[Index],
mGuidedEventGuid[Index], &mGuidedEvent[Index]);
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_CALLBACK,
MmGuidedEventNotify,
mGuidedEventGuid[Index],
mGuidedEventGuid[Index],
&mGuidedEvent[Index]
);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
while (Index-- > 0) {
gBS->CloseEvent (mGuidedEvent[Index]);
}
goto UninstallProtocol;
}
}
return EFI_SUCCESS;
UninstallProtocol:

6
ArmPkg/Drivers/TimerDxe/TimerDxe.c
View File

@ -7,7 +7,6 @@
**/
#include <PiDxe.h>
#include <Library/ArmLib.h>
@ -306,7 +305,6 @@ TimerInterruptHandler (
// Check if the timer interrupt is active
if ((ArmGenericTimerGetTimerCtrlReg ()) & ARM_ARCH_TIMER_ISTATUS) {
if (mTimerNotifyFunction != 0) {
mTimerNotifyFunction (mTimerPeriod * mElapsedPeriod);
}
@ -338,7 +336,6 @@ TimerInterruptHandler (
gBS->RestoreTPL (OriginalTPL);
}
/**
Initialize the state information for the Timer Architectural Protocol and
the Timer Debug support protocol that allows the debugger to break into a
@ -412,7 +409,8 @@ TimerInitialize (
// Install the Timer Architectural Protocol onto a new handle
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEfiTimerArchProtocolGuid, &gTimer,
&gEfiTimerArchProtocolGuid,
&gTimer,
NULL
);
ASSERT_EFI_ERROR (Status);

61
ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c
View File

@ -60,10 +60,12 @@ typedef struct {
SEMIHOST_DEVICE_PATH gDevicePath = {
{
{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 } },
{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 }
},
EFI_CALLER_ID_GUID
},
{ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } }
{ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }
}
};
typedef struct {
@ -115,8 +117,6 @@ FreeFCB (
FreePool (Fcb);
}
EFI_STATUS
VolumeOpen (
IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
@ -193,12 +193,14 @@ FileOpen (
if ((OpenMode != EFI_FILE_MODE_READ) &&
(OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE)) &&
(OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)) ) {
(OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)))
{
return EFI_INVALID_PARAMETER;
}
if (((OpenMode & EFI_FILE_MODE_CREATE) != 0) &&
((Attributes & EFI_FILE_DIRECTORY) != 0)) {
((Attributes & EFI_FILE_DIRECTORY) != 0))
{
return EFI_WRITE_PROTECTED;
}
@ -207,13 +209,15 @@ FileOpen (
if (AsciiFileName == NULL) {
return EFI_OUT_OF_RESOURCES;
}
UnicodeStrToAsciiStrS (FileName, AsciiFileName, Length);
// Opening '/', '\', '.', or the NULL pathname is trying to open the root directory
if ((AsciiStrCmp (AsciiFileName, "\\") == 0) ||
(AsciiStrCmp (AsciiFileName, "/") == 0) ||
(AsciiStrCmp (AsciiFileName, "") == 0) ||
(AsciiStrCmp (AsciiFileName, ".") == 0) ) {
(AsciiStrCmp (AsciiFileName, ".") == 0))
{
FreePool (AsciiFileName);
return (VolumeOpen (&gSemihostFs, NewHandle));
}
@ -232,6 +236,7 @@ FileOpen (
} else {
SemihostMode = SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE;
}
Return = SemihostFileOpen (AsciiFileName, SemihostMode, &SemihostHandle);
if (RETURN_ERROR (Return)) {
@ -346,6 +351,7 @@ TruncateFile (
if (RETURN_ERROR (Return)) {
goto Error;
}
Remaining -= ToRead;
Read += ToRead;
}
@ -379,12 +385,12 @@ Error:
if (FileHandle != 0) {
SemihostFileClose (FileHandle);
}
if (Buffer != NULL) {
FreePool (Buffer);
}
return (Status);
}
/**
@ -420,6 +426,7 @@ FileClose (
if (Fcb->Info.FileSize < Fcb->Info.PhysicalSize) {
TruncateFile (Fcb->FileName, Fcb->Info.FileSize);
}
FreePool (Fcb->FileName);
}
@ -471,6 +478,7 @@ FileDelete (
if (RETURN_ERROR (Return)) {
return EFI_WARN_DELETE_FAILURE;
}
return EFI_SUCCESS;
} else {
return EFI_WARN_DELETE_FAILURE;
@ -574,6 +582,7 @@ ExtendFile (
if (RETURN_ERROR (Return)) {
return EFI_DEVICE_ERROR;
}
Remaining -= WriteNb;
}
@ -618,7 +627,8 @@ FileWrite (
// We cannot write a read-only file
if ( (Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE))
{
return EFI_ACCESS_DENIED;
}
@ -632,6 +642,7 @@ FileWrite (
if (EFI_ERROR (Status)) {
return Status;
}
Fcb->Info.FileSize = Fcb->Position;
}
@ -650,6 +661,7 @@ FileWrite (
if (RETURN_ERROR (Return)) {
return EFI_DEVICE_ERROR;
}
Fcb->Info.PhysicalSize = Length;
return EFI_SUCCESS;
@ -718,8 +730,7 @@ FileSetPosition (
if (Position != 0) {
return EFI_UNSUPPORTED;
}
}
else {
} else {
//
// UEFI Spec section 12.5:
// "Seeking to position 0xFFFFFFFFFFFFFFFF causes the current position to
@ -728,6 +739,7 @@ FileSetPosition (
if (Position == 0xFFFFFFFFFFFFFFFF) {
Position = Fcb->Info.FileSize;
}
Return = SemihostFileSeek (Fcb->SemihostHandle, MIN (Position, Fcb->Info.FileSize));
if (RETURN_ERROR (Return)) {
return EFI_DEVICE_ERROR;
@ -889,7 +901,8 @@ FileGetInfo (
if ((This == NULL) ||
(InformationType == NULL) ||
(BufferSize == NULL) ||
((Buffer == NULL) && (*BufferSize > 0)) ) {
((Buffer == NULL) && (*BufferSize > 0)))
{
return EFI_INVALID_PARAMETER;
}
@ -968,6 +981,7 @@ SetFileInfo (
if (AsciiFileName == NULL) {
return EFI_OUT_OF_RESOURCES;
}
UnicodeStrToAsciiStrS (Info->FileName, AsciiFileName, Length);
FileSizeIsDifferent = (Info->FileSize != Fcb->Info.FileSize);
@ -985,7 +999,8 @@ SetFileInfo (
// description.
//
if ((Fcb->OpenMode == EFI_FILE_MODE_READ) ||
(Fcb->Info.Attribute & EFI_FILE_READ_ONLY) ) {
(Fcb->Info.Attribute & EFI_FILE_READ_ONLY))
{
if (FileSizeIsDifferent || FileNameIsDifferent || ReadOnlyIsDifferent) {
Status = EFI_ACCESS_DENIED;
goto Error;
@ -1006,6 +1021,7 @@ SetFileInfo (
if (EFI_ERROR (Status)) {
goto Error;
}
//
// The read/write position from the host file system point of view
// is at the end of the file. If the position from this module
@ -1016,12 +1032,14 @@ SetFileInfo (
FileSetPosition (&Fcb->File, Fcb->Position);
}
}
Fcb->Info.FileSize = FileSize;
Return = SemihostFileLength (Fcb->SemihostHandle, &Length);
if (RETURN_ERROR (Return)) {
goto Error;
}
Fcb->Info.PhysicalSize = Length;
}
@ -1048,6 +1066,7 @@ SetFileInfo (
if (RETURN_ERROR (Return)) {
goto Error;
}
FreePool (Fcb->FileName);
Fcb->FileName = AsciiFileName;
AsciiFileName = NULL;
@ -1119,19 +1138,24 @@ FileSetInfo (
if (Info->Size < (SIZE_OF_EFI_FILE_INFO + StrSize (Info->FileName))) {
return EFI_INVALID_PARAMETER;
}
if (BufferSize < Info->Size) {
return EFI_BAD_BUFFER_SIZE;
}
return SetFileInfo (Fcb, Info);
} else if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
SystemInfo = Buffer;
if (SystemInfo->Size <
(SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel))) {
(SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel)))
{
return EFI_INVALID_PARAMETER;
}
if (BufferSize < SystemInfo->Size) {
return EFI_BAD_BUFFER_SIZE;
}
Buffer = SystemInfo->VolumeLabel;
if (StrSize (Buffer) > 0) {
@ -1166,7 +1190,8 @@ FileFlush (
return EFI_SUCCESS;
} else {
if ( (Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE))
{
return EFI_ACCESS_DENIED;
} else {
return EFI_SUCCESS;
@ -1192,8 +1217,10 @@ SemihostFsEntryPoint (
Status = gBS->InstallMultipleProtocolInterfaces (
&gInstallHandle,
&gEfiSimpleFileSystemProtocolGuid, &gSemihostFs,
&gEfiDevicePathProtocolGuid, &gDevicePath,
&gEfiSimpleFileSystemProtocolGuid,
&gSemihostFs,
&gEfiDevicePathProtocolGuid,
&gDevicePath,
NULL
);

1
ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h
View File

@ -243,4 +243,3 @@ FileFlush (
);
#endif // SEMIHOST_FS_H_

1
ArmPkg/Include/AsmMacroIoLib.h
View File

@ -9,7 +9,6 @@
**/
#ifndef ASM_MACRO_IO_LIB_H_
#define ASM_MACRO_IO_LIB_H_

2
ArmPkg/Include/AsmMacroIoLibV8.h
View File

@ -9,7 +9,6 @@
**/
#ifndef ASM_MACRO_IO_LIBV8_H_
#define ASM_MACRO_IO_LIBV8_H_
@ -24,7 +23,6 @@
cbnz SAFE_XREG, 1f ;\
b . ;// We should never get here
// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
// This only selects between EL1 and EL2 and EL3, else we die.
// Provide the Macro with a safe temp xreg to use.

3
ArmPkg/Include/Chipset/AArch64Mmu.h
View File

@ -152,7 +152,6 @@
#define TCR_EL1_TBI0_MASK (0x01UL << TCR_EL1_TBI0_FIELD)
#define TCR_EL1_TBI1_MASK (0x01UL << TCR_EL1_TBI1_FIELD)
#define TCR_EL23_T0SZ_FIELD (0)
#define TCR_EL23_IRGN0_FIELD (8)
#define TCR_EL23_ORGN0_FIELD (10)
@ -166,7 +165,6 @@
#define TCR_EL23_TG0_MASK (0x01UL << TCR_EL23_TG0_FIELD)
#define TCR_EL23_PS_MASK (0x07UL << TCR_EL23_PS_FIELD)
#define TCR_RGN_OUTER_NON_CACHEABLE (0x0UL << 10)
#define TCR_RGN_OUTER_WRITE_BACK_ALLOC (0x1UL << 10)
#define TCR_RGN_OUTER_WRITE_THROUGH (0x2UL << 10)
@ -195,4 +193,3 @@
// Uses LPAE Page Table format
#endif // AARCH64_MMU_H_

2
ArmPkg/Include/Chipset/ArmCortexA9.h
View File

@ -48,7 +48,6 @@
#define A9_SCU_SACR_OFFSET 0x50
#define A9_SCU_SSACR_OFFSET 0x54
UINTN
EFIAPI
ArmGetScuBaseAddress (
@ -56,4 +55,3 @@ ArmGetScuBaseAddress (
);
#endif // ARM_CORTEX_A9_H_

1
ArmPkg/Include/Chipset/ArmV7.h
View File

@ -41,7 +41,6 @@
#define CPSR_IRQ (1 << 7)
#define CPSR_FIQ (1 << 6)
// CPACR - Coprocessor Access Control Register definitions
#define CPACR_CP_DENIED(cp) 0x00
#define CPACR_CP_PRIV(cp) ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)

1
ArmPkg/Include/Chipset/ArmV7Mmu.h
View File

@ -33,7 +33,6 @@
#define TTBR_MP_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )
#define TTBR_MP_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
#define TRANSLATION_TABLE_SECTION_COUNT 4096
#define TRANSLATION_TABLE_SECTION_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
#define TRANSLATION_TABLE_SECTION_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)

1
ArmPkg/Include/Guid/ArmMpCoreInfo.h
View File

@ -43,7 +43,6 @@ typedef struct {
ARM_CORE_INFO *ArmCpus;
} ARM_PROCESSOR_TABLE;
#define ARM_MP_CORE_INFO_GUID \
{ 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }

3
ArmPkg/Include/IndustryStandard/ArmCache.h
View File

@ -27,8 +27,7 @@ typedef union {
} CSSELR_DATA;
/// The cache type values for the InD field of the CSSELR register
typedef enum
{
typedef enum {
/// Select the data or unified cache
CsselrCacheTypeDataOrUnified = 0,
/// Select the instruction cache

1
ArmPkg/Include/Library/ArmGicArchLib.h
View File

@ -17,7 +17,6 @@ typedef enum {
ARM_GIC_ARCH_REVISION_3
} ARM_GIC_ARCH_REVISION;
ARM_GIC_ARCH_REVISION
EFIAPI
ArmGicGetSupportedArchRevision (

1
ArmPkg/Include/Library/ArmGicLib.h
View File

@ -52,7 +52,6 @@
#define ARM_GIC_ICDICFR_LEVEL_TRIGGERED 0x0 // Level triggered interrupt
#define ARM_GIC_ICDICFR_EDGE_TRIGGERED 0x1 // Edge triggered interrupt
// GIC Redistributor
#define ARM_GICR_CTLR_FRAME_SIZE SIZE_64KB
#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB

13
ArmPkg/Include/Library/ArmLib.h
View File

@ -59,8 +59,12 @@ typedef struct {
ARM_MEMORY_REGION_ATTRIBUTES Attributes;
} ARM_MEMORY_REGION_DESCRIPTOR;
typedef VOID (*CACHE_OPERATION)(VOID);
typedef VOID (*LINE_OPERATION)(UINTN);
typedef VOID (*CACHE_OPERATION)(
VOID
);
typedef VOID (*LINE_OPERATION)(
UINTN
);
//
// ARM Processor Mode
@ -183,7 +187,6 @@ ArmInvalidateDataCache (
VOID
);
VOID
EFIAPI
ArmCleanInvalidateDataCache (
@ -573,7 +576,6 @@ ArmWriteHVBar (
IN UINTN HypModeVectorBase
);
//
// Helper functions for accessing CPU ACTLR
//
@ -736,7 +738,6 @@ ArmGetPhysicalAddressBits (
VOID
);
///
/// ID Register Helper functions
///
@ -768,6 +769,7 @@ ArmHasCcidx (
///
/// AArch32-only ID Register Helper functions
///
/**
Check whether the CPU supports the Security extensions
@ -779,6 +781,7 @@ EFIAPI
ArmHasSecurityExtensions (
VOID
);
#endif // MDE_CPU_ARM
#endif // ARM_LIB_H_

1
ArmPkg/Include/Library/ArmMtlLib.h
View File

@ -128,4 +128,3 @@ MtlReceiveMessage (
);
#endif /* ARM_MTL_LIB_H_ */

10
ArmPkg/Include/Library/OemMiscLib.h
View File

@ -8,15 +8,13 @@
*
**/
#ifndef OEM_MISC_LIB_H_
#define OEM_MISC_LIB_H_
#include <Uefi.h>
#include <IndustryStandard/SmBios.h>
typedef enum
{
typedef enum {
CpuCacheL1 = 1,
CpuCacheL2,
CpuCacheL3,
@ -27,8 +25,7 @@ typedef enum
CpuCacheLevelMax
} OEM_MISC_CPU_CACHE_LEVEL;
typedef struct
{
typedef struct {
UINT8 Voltage; ///< Processor voltage
UINT16 CurrentSpeed; ///< Current clock speed in MHz
UINT16 MaxSpeed; ///< Maximum clock speed in MHz
@ -38,8 +35,7 @@ typedef struct
UINT16 ThreadCount; ///< Number of threads per processor
} OEM_MISC_PROCESSOR_DATA;
typedef enum
{
typedef enum {
ProductNameType01,
SerialNumType01,
UuidType01,

1
ArmPkg/Include/Protocol/ArmScmi.h
View File

@ -18,4 +18,3 @@
#define SCMI_MAX_STR_LEN 16
#endif /* ARM_SCMI_H_ */

1
ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
View File

@ -215,4 +215,3 @@ typedef struct _SCMI_CLOCK_PROTOCOL {
} SCMI_CLOCK_PROTOCOL;
#endif /* ARM_SCMI_CLOCK_PROTOCOL_H_ */

1
ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h
View File

@ -256,4 +256,3 @@ typedef enum {
} SCMI_MESSAGE_ID_PERFORMANCE;
#endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_H_ */

14
ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c
View File

@ -7,7 +7,6 @@
**/
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/BaseLib.h>
@ -25,7 +24,6 @@
#define MULT_U64_X_N MultU64x64
#endif
RETURN_STATUS
EFIAPI
TimerConstructor (
@ -36,7 +34,6 @@ TimerConstructor (
// Check if the ARM Generic Timer Extension is implemented.
//
if (ArmIsArchTimerImplemented ()) {
//
// Check if Architectural Timer frequency is pre-determined by the platform
// (ie. nonzero).
@ -59,6 +56,7 @@ TimerConstructor (
if (ArmHasSecurityExtensions ()) {
ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
}
#endif
}
@ -68,7 +66,6 @@ TimerConstructor (
// If the reset value (0) is returned, just ASSERT.
//
ASSERT (ArmGenericTimerGetTimerFreq () != 0);
} else {
DEBUG ((DEBUG_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library cannot be used.\n"));
ASSERT (0);
@ -96,10 +93,10 @@ GetPlatformTimerFreq (
if (TimerFreq == 0) {
TimerFreq = ArmGenericTimerGetTimerFreq ();
}
return TimerFreq;
}
/**
Stalls the CPU for the number of microseconds specified by MicroSeconds.
@ -141,7 +138,6 @@ MicroSecondDelay (
return MicroSeconds;
}
/**
Stalls the CPU for at least the given number of nanoseconds.
@ -267,7 +263,8 @@ GetTimeInNanoSecond (
DivU64x32Remainder (
Ticks,
TimerFreq,
&Remainder),
&Remainder
),
1000000000U
);
@ -278,7 +275,8 @@ GetTimeInNanoSecond (
NanoSeconds += DivU64x32 (
MULT_U64_X_N (
(UINT64)Remainder,
1000000000U),
1000000000U
),
TimerFreq
);

40
ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
View File

@ -34,6 +34,7 @@ CacheRangeOperation (
LineOperation (AlignedAddress);
AlignedAddress += LineLength;
}
ArmDataSynchronizationBarrier ();
}
@ -62,11 +63,18 @@ InvalidateInstructionCacheRange (
IN UINTN Length
)
{
CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,
ArmDataCacheLineLength ());
CacheRangeOperation (Address, Length,
CacheRangeOperation (
Address,
Length,
ArmCleanDataCacheEntryToPoUByMVA,
ArmDataCacheLineLength ()
);
CacheRangeOperation (
Address,
Length,
ArmInvalidateInstructionCacheEntryToPoUByMVA,
ArmInstructionCacheLineLength ());
ArmInstructionCacheLineLength ()
);
ArmInstructionSynchronizationBarrier ();
@ -89,8 +97,12 @@ WriteBackInvalidateDataCacheRange (
IN UINTN Length
)
{
CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,
ArmDataCacheLineLength ());
CacheRangeOperation (
Address,
Length,
ArmCleanInvalidateDataCacheEntryByMVA,
ArmDataCacheLineLength ()
);
return Address;
}
@ -110,8 +122,12 @@ WriteBackDataCacheRange (
IN UINTN Length
)
{
CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,
ArmDataCacheLineLength ());
CacheRangeOperation (
Address,
Length,
ArmCleanDataCacheEntryByMVA,
ArmDataCacheLineLength ()
);
return Address;
}
@ -122,7 +138,11 @@ InvalidateDataCacheRange (
IN UINTN Length
)
{
CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,
ArmDataCacheLineLength ());
CacheRangeOperation (
Address,
Length,
ArmInvalidateDataCacheEntryByMVA,
ArmDataCacheLineLength ()
);
return Address;
}

26
ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
View File

@ -69,7 +69,6 @@ CHAR8 *gLdmStack[] = {
#define LDM_EXT(_reg, _off) ((_reg == 13) ? gLdmStack[(_off)] : gLdmAdr[(_off)])
#define SIGN(_U) ((_U) ? "" : "-")
#define WRITE(_Write) ((_Write) ? "!" : "")
#define BYTE(_B) ((_B) ? "B":"")
@ -110,9 +109,11 @@ MRegList (
}
}
}
if (First) {
AsciiStrCatS (mMregListStr, sizeof mMregListStr, "ERROR");
}
AsciiStrCatS (mMregListStr, sizeof mMregListStr, "}");
// BugBug: Make caller pass in buffer it is cleaner
@ -136,7 +137,6 @@ RotateRight (
return (Op >> Shift) | (Op << (32 - Shift));
}
/**
Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
point to next instruction.
@ -181,7 +181,6 @@ DisassembleArmInstruction (
Rd = (OpCode >> 12) & 0xf;
Rm = (OpCode & 0xf);
if (Extended) {
Index = AsciiSPrint (Buf, Size, "0x%08x ", OpCode);
Buf += Index;
@ -197,6 +196,7 @@ DisassembleArmInstruction (
// A4.1.103 STREX{<cond>} <Rd>, <Rm>, [<Rn>]
AsciiSPrint (Buf, Size, "STREX%a %a, %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn], gReg[Rn]);
}
return;
}
@ -212,6 +212,7 @@ DisassembleArmInstruction (
// A4.1.98 STM{<cond>}<addressing_mode> <Rn>, <registers>^
AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn, (OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
}
return;
}
@ -223,6 +224,7 @@ DisassembleArmInstruction (
} else {
Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T" : "", gReg[Rd]);
}
if (Pre) {
if (!Imm) {
// A5.2.2 [<Rn>, #+/-<offset_12>]
@ -255,7 +257,8 @@ DisassembleArmInstruction (
AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm, WRITE (Write));
}
} else { // !Pre
} else {
// !Pre
if (!Imm) {
// A5.2.8 [<Rn>], #+/-<offset_12>
AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (Up), Offset12);
@ -287,6 +290,7 @@ DisassembleArmInstruction (
AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm);
}
}
return;
}
@ -337,6 +341,7 @@ DisassembleArmInstruction (
AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);
}
}
return;
}
@ -371,15 +376,20 @@ DisassembleArmInstruction (
AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f));
} else {
IMod = (OpCode >> 18) & 0x3;
Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a",
Index = AsciiSPrint (
Buf,
Size,
"CPS%a %a%a%a",
(IMod == 3) ? "ID" : "IE",
((OpCode & BIT8) != 0) ? "A" : "",
((OpCode & BIT7) != 0) ? "I" : "",
((OpCode & BIT6) != 0) ? "F":"");
((OpCode & BIT6) != 0) ? "F" : ""
);
if ((OpCode & BIT17) != 0) {
AsciiSPrint (&Buf[Index], Size - Index, ", #0x%x", OpCode & 0x1f);
}
}
return;
}
@ -395,7 +405,6 @@ DisassembleArmInstruction (
return;
}
if ((OpCode & 0x0db00000) == 0x01200000) {
// A4.1.38 MSR{<cond>} CPSR_<fields>, #<immediate> MSR{<cond>} CPSR_<fields>, <Rm>
if (Imm) {
@ -405,6 +414,7 @@ DisassembleArmInstruction (
// MSR{<cond>} CPSR_<fields>, <Rm>
AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), WriteBack ? "SPSR" : "CPSR", gReg[Rd]);
}
return;
}
@ -434,7 +444,6 @@ DisassembleArmInstruction (
// A5.5.5.2 [<Rn>, #+/-<offset_8>*4 ]!
AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (Up), OpCode & 0xff, WRITE (Write));
}
}
if ((OpCode & 0x0f000010) == 0x0e000010) {
@ -454,4 +463,3 @@ DisassembleArmInstruction (
*OpCodePtr += 1;
return;
}

35
ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c
View File

@ -93,9 +93,6 @@ extern CHAR8 *gReg[];
#define THUMB2_MRS 235
#define THUMB2_MSR 236
typedef struct {
CHAR8 *Start;
UINT32 OpCode;
@ -202,7 +199,6 @@ THUMB_INSTRUCTIONS gOpThumb[] = {
{ "UXTH", 0xb280, 0xffc0, DATA_FORMAT5 },
{ "IT", 0xbf00, 0xff00, IT_BLOCK }
};
THUMB_INSTRUCTIONS gOpThumb2[] = {
@ -281,7 +277,6 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
{ "MLA", 0xfb000000, 0xfff000f0, THUMB2_4REGS }, // MLA <Rd>, <Rn>, <Rm>, <Ra>
{ "MLS", 0xfb000010, 0xfff000f0, THUMB2_4REGS }, // MLA <Rd>, <Rn>, <Rm>, <Ra>
{ "SMLABB", 0xfb100000, 0xfff000f0, THUMB2_4REGS }, // SMLABB <Rd>, <Rn>, <Rm>, <Ra>
{ "SMLABT", 0xfb100010, 0xfff000f0, THUMB2_4REGS }, // SMLABT <Rd>, <Rn>, <Rm>, <Ra>
{ "SMLABB", 0xfb100020, 0xfff000f0, THUMB2_4REGS }, // SMLATB <Rd>, <Rn>, <Rm>, <Ra>
@ -298,7 +293,6 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
{ "SMLAD", 0xfb200000, 0xfff000f0, THUMB2_4REGS }, // SMLAD <Rd>, <Rn>, <Rm>, <Ra>
{ "SMLADX", 0xfb200010, 0xfff000f0, THUMB2_4REGS }, // SMLADX <Rd>, <Rn>, <Rm>, <Ra>
{ "B", 0xf0008000, 0xf800d000, B_T3 }, // B<c> <label>
{ "B", 0xf0009000, 0xf800d000, B_T4 }, // B<c> <label>
{ "BL", 0xf000d000, 0xf800d000, B_T4 }, // BL<c> <label>
@ -419,9 +413,11 @@ ThumbMRegList (
}
}
}
if (First) {
AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "ERROR");
}
AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "}");
// BugBug: Make caller pass in buffer it is cleaner
@ -521,6 +517,7 @@ DisassembleThumbInstruction (
*OpCodePtrPtr += 1;
// Manage IT Block ItFlag TRUE means we are in an IT block
/*if (*ItBlock != 0) {
ItFlag = TRUE;
*ItBlock -= 1;
@ -535,6 +532,7 @@ DisassembleThumbInstruction (
} else {
Offset = AsciiSPrint (Buf, Size, "%-6a", gOpThumb[Index].Start);
}
switch (gOpThumb[Index].AddressMode) {
case LOAD_STORE_FORMAT1:
// A6.5.1 <Rd>, [<Rn>, #<5_bit_offset>]
@ -579,7 +577,6 @@ DisassembleThumbInstruction (
AsciiSPrint (&Buf[Offset], Size - Offset, " %a", ThumbMRegList ((OpCode & 0xff) | ((OpCode & BIT8) == BIT8 ? BIT14 : 0)));
return;
case IMMED_8:
// A6.7 <immed_8>
AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%x", OpCode & 0xff);
@ -684,13 +681,13 @@ DisassembleThumbInstruction (
} else if ((OpCode & 0xf) == 0x8) {
*ItBlock = 1;
}
AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gCondition[(OpCode >> 4) & 0xf]);
return;
}
}
}
// Thumb2 are 32-bit instructions
*OpCodePtrPtr += 1;
Rt = (OpCode32 >> 12) & 0xf;
@ -705,6 +702,7 @@ DisassembleThumbInstruction (
} else {
Offset = AsciiSPrint (Buf, Size, " %-6a", gOpThumb2[Index].Start);
}
switch (gOpThumb2[Index].AddressMode) {
case B_T3:
Cond = gCondition[(OpCode32 >> 22) & 0xf];
@ -767,6 +765,7 @@ DisassembleThumbInstruction (
// U == 0 means subtrack, U == 1 means add
Target = -Target;
}
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[(OpCode32 >> 12) & 0xf], PcAlign4 (Pc) + Target);
return;
@ -778,6 +777,7 @@ DisassembleThumbInstruction (
} else {
AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL #%d]", (OpCode32 >> 4) & 3);
}
return;
case LDM_REG_IMM12:
@ -788,6 +788,7 @@ DisassembleThumbInstruction (
} else {
AsciiSPrint (&Buf[Offset], Size - Offset, ", #0x%x]", OpCode32 & 0xfff);
}
return;
case LDM_REG_IMM8:
@ -805,6 +806,7 @@ DisassembleThumbInstruction (
} else {
AsciiSPrint (&Buf[Offset], Size - Offset, "], #%a0x%x", UAdd ? "" : "-", OpCode32 & 0xff);
}
return;
case LDRD_REG_IMM8_SIGNED:
@ -824,6 +826,7 @@ DisassembleThumbInstruction (
AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x", UAdd ? "" : "-", (OpCode32 & 0xff) << 2);
}
}
return;
case LDRD_REG_IMM8:
@ -833,6 +836,7 @@ DisassembleThumbInstruction (
// U == 0 means subtrack, U == 1 means add
Target = -Target;
}
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rt], gReg[Rt2], Pc + 4 + Target);
return;
@ -863,6 +867,7 @@ DisassembleThumbInstruction (
if ((OpCode32 & BIT20) == BIT20) {
Buf[Offset - 3] = 'S'; // assume %-6a
}
Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #0x%x", gReg[Rd], gReg[Rn], Target);
return;
@ -872,6 +877,7 @@ DisassembleThumbInstruction (
if ((OpCode32 & BIT20) == BIT20) {
Buf[Offset - 3] = 'S'; // assume %-6a
}
Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #0x%x", gReg[Rd], Target);
return;
@ -888,11 +894,13 @@ DisassembleThumbInstruction (
if ((OpCode32 & BIT20) == BIT20) {
Buf[Offset - 3] = 'S'; // assume %-6a
}
Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rd], gReg[Rn], gReg[Rm]);
if (Target != 0) {
AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL %d", gShiftType[(OpCode >> 5) & 3], Target);
}
return;
case ADD_IMM5_2REG:
@ -903,12 +911,12 @@ DisassembleThumbInstruction (
AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL %d", gShiftType[(OpCode >> 5) & 3], Target);
}
case ASR_IMM5:
// ARS <Rd>, <Rm> #<const>} imm3:imm2
if ((OpCode32 & BIT20) == BIT20) {
Buf[Offset - 3] = 'S'; // assume %-6a
}
Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a #%d", gReg[Rd], gReg[Rm], Target);
return;
@ -918,6 +926,7 @@ DisassembleThumbInstruction (
if ((OpCode32 & BIT20) == BIT20) {
Buf[Offset - 3] = 'S'; // assume %-6a
}
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a %a", gReg[Rd], gReg[Rn], gReg[Rm]);
return;
@ -929,6 +938,7 @@ DisassembleThumbInstruction (
} else {
Target = PcAlign4 (Pc) + Target;
}
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, 0x%08x", gReg[Rd], Target);
return;
@ -950,6 +960,7 @@ DisassembleThumbInstruction (
} else {
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], LsBit, MsBit + 1);
}
return;
case CPD_THUMB2:
@ -964,6 +975,7 @@ DisassembleThumbInstruction (
if (Opc2 != 0) {
AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", Opc2);
}
return;
case MRC_THUMB2:
@ -977,6 +989,7 @@ DisassembleThumbInstruction (
if (Opc2 != 0) {
AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", Opc2);
}
return;
case MRRC_THUMB2:
@ -1019,8 +1032,6 @@ DisassembleThumbInstruction (
AsciiSPrint (Buf, Size, "0x%08x", OpCode32);
}
VOID
DisassembleArmInstruction (
IN UINT32 **OpCodePtr,
@ -1029,7 +1040,6 @@ DisassembleArmInstruction (
IN BOOLEAN Extended
);
/**
Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
point to next instruction.
@ -1061,4 +1071,3 @@ DisassembleInstruction (
DisassembleArmInstruction ((UINT32 **)OpCodePtr, Buf, Size, Extended);
}
}

3
ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c
View File

@ -35,8 +35,7 @@ ArchVectorConfig (
if (VectorBaseAddress == 0xFFFF0000) {
// set SCTLR.V to enable high vectors
ArmSetHighVectors ();
}
else {
} else {
// Set SCTLR.V to 0 to enable VBAR to be used
ArmSetLowVectors ();
}

21
ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
View File

@ -43,7 +43,8 @@ ExceptionHandlersEnd(
VOID
);
RETURN_STATUS ArchVectorConfig(
RETURN_STATUS
ArchVectorConfig (
IN UINTN VectorBaseAddress
);
@ -66,7 +67,6 @@ STATIC CONST BOOLEAN gArmRelocateVectorTable = TRUE;
STATIC CONST BOOLEAN gArmRelocateVectorTable = FALSE;
#endif
/**
Initializes all CPU exceptions entries and provides the default exception handlers.
@ -96,12 +96,10 @@ InitializeCpuExceptionHandlers(
// if we are requested to copy exception handlers to another location
if (gArmRelocateVectorTable) {
VectorBase = PcdGet64 (PcdCpuVectorBaseAddress);
Status = CopyExceptionHandlers (VectorBase);
}
else { // use VBAR to point to where our exception handlers are
} else {
// use VBAR to point to where our exception handlers are
// The vector table must be aligned for the architecture. If this
// assertion fails ensure the appropriate FFS alignment is in effect,
@ -180,12 +178,11 @@ CopyExceptionHandlers(
//
for (Index = 0; Index <= gMaxExceptionNumber; Index++) {
if (!FeaturePcdGet (PcdDebuggerExceptionSupport) ||
(gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)gDebuggerNoHandlerValue)) {
(gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)gDebuggerNoHandlerValue))
{
Status = RegisterExceptionHandler (Index, NULL);
ASSERT_EFI_ERROR (Status);
}
else {
} else {
// If the debugger has already hooked put its vector back
VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];
}
@ -197,7 +194,6 @@ CopyExceptionHandlers(
return RETURN_SUCCESS;
}
/**
Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
@ -307,8 +303,7 @@ CommonCExceptionHandler(
gExceptionHandlers[ExceptionType](ExceptionType, SystemContext);
return;
}
}
else {
} else {
DEBUG ((DEBUG_ERROR, "Unknown exception type %d\n", ExceptionType));
ASSERT (FALSE);
}

1
ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.c
View File

@ -71,7 +71,6 @@ ArmGenericTimerGetTimerVal (
return ArmReadCntpTval ();
}
VOID
EFIAPI
ArmGenericTimerSetTimerVal (

1
ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c
View File

@ -71,7 +71,6 @@ ArmGenericTimerGetTimerVal (
return ArmReadCntvTval ();
}
VOID
EFIAPI
ArmGenericTimerSetTimerVal (

1
ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.c
View File

@ -38,6 +38,7 @@ ArmGicArchLibInitialize (
ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
IccSre = ArmGicV3GetControlSystemRegisterEnable ();
}
if (IccSre & ICC_SRE_EL2_SRE) {
mGicArchRevision = ARM_GIC_ARCH_REVISION_3;
goto Done;

1
ArmPkg/Library/ArmGicArchSecLib/ArmGicArchLib.c
View File

@ -36,6 +36,7 @@ ArmGicGetSupportedArchRevision (
ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
IccSre = ArmGicV3GetControlSystemRegisterEnable ();
}
if (IccSre & ICC_SRE_EL2_SRE) {
return ARM_GIC_ARCH_REVISION_3;
}

5
ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h
View File

@ -11,7 +11,9 @@
#ifndef AARCH64_LIB_H_
#define AARCH64_LIB_H_
typedef VOID (*AARCH64_CACHE_OPERATION)(UINTN);
typedef VOID (*AARCH64_CACHE_OPERATION)(
UINTN
);
VOID
AArch64AllDataCachesOperation (
@ -53,4 +55,3 @@ ArmReadIdAA64Mmfr2 (
);
#endif // AARCH64_LIB_H_

5
ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h
View File

@ -23,7 +23,9 @@
#define ID_MMFR0_SHR_IMP_HW_COHERENT 1
#define ID_MMFR0_SHR_IGNORED 0xf
typedef VOID (*ARM_V7_CACHE_OPERATION)(UINT32);
typedef VOID (*ARM_V7_CACHE_OPERATION)(
UINT32
);
VOID
ArmV7AllDataCachesOperation (
@ -65,4 +67,3 @@ ArmReadIdPfr1 (
);
#endif // ARM_V7_LIB_H_

125
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
View File

@ -47,12 +47,13 @@ ArmMemoryAttributeToPageAttribute (
ASSERT (0);
case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
if (ArmReadCurrentEL () == AARCH64_EL2)
if (ArmReadCurrentEL () == AARCH64_EL2) {
return TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
else
} else {
return TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
}
}
}
#define MIN_T0SZ 16
#define BITS_PER_LEVEL 9
@ -107,12 +108,15 @@ FreePageTablesRecursive (
if (Level < 3) {
for (Index = 0; Index < TT_ENTRY_COUNT; Index++) {
if ((TranslationTable[Index] & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
FreePageTablesRecursive ((VOID *)(UINTN)(TranslationTable[Index] &
FreePageTablesRecursive (
(VOID *)(UINTN)(TranslationTable[Index] &
TT_ADDRESS_MASK_BLOCK_ENTRY),
Level + 1);
Level + 1
);
}
}
}
FreePages (TranslationTable, 1);
}
@ -126,6 +130,7 @@ IsBlockEntry (
if (Level == 3) {
return (Entry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3;
}
return (Entry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY;
}
@ -143,6 +148,7 @@ IsTableEntry (
//
return FALSE;
}
return (Entry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY;
}
@ -170,8 +176,16 @@ UpdateRegionMappingRecursive (
BlockShift = (Level + 1) * BITS_PER_LEVEL + MIN_T0SZ;
BlockMask = MAX_UINT64 >> BlockShift;
DEBUG ((DEBUG_VERBOSE, "%a(%d): %llx - %llx set %lx clr %lx\n", __FUNCTION__,
Level, RegionStart, RegionEnd, AttributeSetMask, AttributeClearMask));
DEBUG ((
DEBUG_VERBOSE,
"%a(%d): %llx - %llx set %lx clr %lx\n",
__FUNCTION__,
Level,
RegionStart,
RegionEnd,
AttributeSetMask,
AttributeClearMask
));
for ( ; RegionStart < RegionEnd; RegionStart = BlockEnd) {
BlockEnd = MIN (RegionEnd, (RegionStart | BlockMask) + 1);
@ -187,8 +201,9 @@ UpdateRegionMappingRecursive (
// we cannot replace it with a block entry without potentially losing
// attribute information, so keep the table entry in that case.
//
if (Level == 0 || ((RegionStart | BlockEnd) & BlockMask) != 0 ||
(IsTableEntry (*Entry, Level) && AttributeClearMask != 0)) {
if ((Level == 0) || (((RegionStart | BlockEnd) & BlockMask) != 0) ||
(IsTableEntry (*Entry, Level) && (AttributeClearMask != 0)))
{
ASSERT (Level < 3);
if (!IsTableEntry (*Entry, Level)) {
@ -216,9 +231,14 @@ UpdateRegionMappingRecursive (
// We are splitting an existing block entry, so we have to populate
// the new table with the attributes of the block entry it replaces.
//
Status = UpdateRegionMappingRecursive (RegionStart & ~BlockMask,
(RegionStart | BlockMask) + 1, *Entry & TT_ATTRIBUTES_MASK,
0, TranslationTable, Level + 1);
Status = UpdateRegionMappingRecursive (
RegionStart & ~BlockMask,
(RegionStart | BlockMask) + 1,
*Entry & TT_ATTRIBUTES_MASK,
0,
TranslationTable,
Level + 1
);
if (EFI_ERROR (Status)) {
//
// The range we passed to UpdateRegionMappingRecursive () is block
@ -236,9 +256,14 @@ UpdateRegionMappingRecursive (
//
// Recurse to the next level
//
Status = UpdateRegionMappingRecursive (RegionStart, BlockEnd,
AttributeSetMask, AttributeClearMask, TranslationTable,
Level + 1);
Status = UpdateRegionMappingRecursive (
RegionStart,
BlockEnd,
AttributeSetMask,
AttributeClearMask,
TranslationTable,
Level + 1
);
if (EFI_ERROR (Status)) {
if (!IsTableEntry (*Entry, Level)) {
//
@ -250,13 +275,18 @@ UpdateRegionMappingRecursive (
//
FreePageTablesRecursive (TranslationTable, Level + 1);
}
return Status;
}
if (!IsTableEntry (*Entry, Level)) {
EntryValue = (UINTN)TranslationTable | TT_TYPE_TABLE_ENTRY;
ReplaceTableEntry (Entry, EntryValue, RegionStart,
IsBlockEntry (*Entry, Level));
ReplaceTableEntry (
Entry,
EntryValue,
RegionStart,
IsBlockEntry (*Entry, Level)
);
}
} else {
EntryValue = (*Entry & AttributeClearMask) | AttributeSetMask;
@ -280,6 +310,7 @@ UpdateRegionMappingRecursive (
}
}
}
return EFI_SUCCESS;
}
@ -300,9 +331,14 @@ UpdateRegionMapping (
T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
return UpdateRegionMappingRecursive (RegionStart, RegionStart + RegionLength,
AttributeSetMask, AttributeClearMask, ArmGetTTBR0BaseAddress (),
GetRootTableLevel (T0SZ));
return UpdateRegionMappingRecursive (
RegionStart,
RegionStart + RegionLength,
AttributeSetMask,
AttributeClearMask,
ArmGetTTBR0BaseAddress (),
GetRootTableLevel (T0SZ)
);
}
STATIC
@ -346,8 +382,9 @@ GcdAttributeToPageAttribute (
break;
}
if ((GcdAttributes & EFI_MEMORY_XP) != 0 ||
(GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) == EFI_MEMORY_UC) {
if (((GcdAttributes & EFI_MEMORY_XP) != 0) ||
((GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) == EFI_MEMORY_UC))
{
if (ArmReadCurrentEL () == AARCH64_EL2) {
PageAttributes |= TT_XN_MASK;
} else {
@ -385,8 +422,12 @@ ArmSetMemoryAttributes (
TT_PXN_MASK | TT_XN_MASK);
}
return UpdateRegionMapping (BaseAddress, Length, PageAttributes,
PageAttributeMask);
return UpdateRegionMapping (
BaseAddress,
Length,
PageAttributes,
PageAttributeMask
);
}
STATIC
@ -419,7 +460,8 @@ ArmSetMemoryRegionNoExec (
BaseAddress,
Length,
Val,
~TT_ADDRESS_MASK_BLOCK_ENTRY);
~TT_ADDRESS_MASK_BLOCK_ENTRY
);
}
EFI_STATUS
@ -437,7 +479,8 @@ ArmClearMemoryRegionNoExec (
BaseAddress,
Length,
0,
Mask);
Mask
);
}
EFI_STATUS
@ -450,7 +493,8 @@ ArmSetMemoryRegionReadOnly (
BaseAddress,
Length,
TT_AP_RO_RO,
~TT_ADDRESS_MASK_BLOCK_ENTRY);
~TT_ADDRESS_MASK_BLOCK_ENTRY
);
}
EFI_STATUS
@ -463,7 +507,8 @@ ArmClearMemoryRegionReadOnly (
BaseAddress,
Length,
TT_AP_RW_RW,
~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK));
~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK)
);
}
EFI_STATUS
@ -523,9 +568,11 @@ ArmConfigureMmu (
} else if (MaxAddress < SIZE_256TB) {
TCR |= TCR_PS_256TB;
} else {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n",
MaxAddress));
MaxAddress
));
ASSERT (0); // Bigger than 48-bit memory space are not supported
return EFI_UNSUPPORTED;
}
@ -547,9 +594,11 @@ ArmConfigureMmu (
} else if (MaxAddress < SIZE_256TB) {
TCR |= TCR_IPS_256TB;
} else {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n",
MaxAddress));
MaxAddress
));
ASSERT (0); // Bigger than 48-bit memory space are not supported
return EFI_UNSUPPORTED;
}
@ -579,6 +628,7 @@ ArmConfigureMmu (
if (TranslationTable == NULL) {
return EFI_OUT_OF_RESOURCES;
}
//
// We set TTBR0 just after allocating the table to retrieve its location from
// the subsequent functions without needing to pass this value across the
@ -599,8 +649,10 @@ ArmConfigureMmu (
// Make sure we are not inadvertently hitting in the caches
// when populating the page tables.
//
InvalidateDataCacheRange (TranslationTable,
RootTableEntryCount * sizeof (UINT64));
InvalidateDataCacheRange (
TranslationTable,
RootTableEntryCount * sizeof (UINT64)
);
ZeroMem (TranslationTable, RootTableEntryCount * sizeof (UINT64));
while (MemoryTable->Length != 0) {
@ -608,6 +660,7 @@ ArmConfigureMmu (
if (EFI_ERROR (Status)) {
goto FreeTranslationTable;
}
MemoryTable++;
}
@ -649,8 +702,10 @@ ArmMmuBaseLibConstructor (
// The ArmReplaceLiveTranslationEntry () helper function may be invoked
// with the MMU off so we have to ensure that it gets cleaned to the PoC
//
WriteBackDataCacheRange ((VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
ArmReplaceLiveTranslationEntrySize);
WriteBackDataCacheRange (
(VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
ArmReplaceLiveTranslationEntrySize
);
return RETURN_SUCCESS;
}

11
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c
View File

@ -37,9 +37,10 @@ ArmMmuPeiLibConstructor (
// is executing from DRAM, we only need to perform the cache maintenance
// when not executing in place.
//
if ((UINTN)FileInfo.Buffer <= (UINTN)ArmReplaceLiveTranslationEntry &&
if (((UINTN)FileInfo.Buffer <= (UINTN)ArmReplaceLiveTranslationEntry) &&
((UINTN)FileInfo.Buffer + FileInfo.BufferSize >=
(UINTN)ArmReplaceLiveTranslationEntry + ArmReplaceLiveTranslationEntrySize)) {
(UINTN)ArmReplaceLiveTranslationEntry + ArmReplaceLiveTranslationEntrySize))
{
DEBUG ((DEBUG_INFO, "ArmMmuLib: skipping cache maintenance on XIP PEIM\n"));
} else {
DEBUG ((DEBUG_INFO, "ArmMmuLib: performing cache maintenance on shadowed PEIM\n"));
@ -47,8 +48,10 @@ ArmMmuPeiLibConstructor (
// The ArmReplaceLiveTranslationEntry () helper function may be invoked
// with the MMU off so we have to ensure that it gets cleaned to the PoC
//
WriteBackDataCacheRange ((VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
ArmReplaceLiveTranslationEntrySize);
WriteBackDataCacheRange (
(VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
ArmReplaceLiveTranslationEntrySize
);
}
return RETURN_SUCCESS;

54
ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
View File

@ -76,6 +76,7 @@ PreferNonshareableMemory (
ASSERT (FALSE);
return FALSE;
}
return Val != ID_MMFR0_SHR_IMP_HW_COHERENT;
}
@ -140,7 +141,8 @@ PopulateLevel2PageTable (
// Allocate a Level2 Page Table for this Section
TranslationTable = (UINTN)AllocateAlignedPages (
EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_PAGE_SIZE),
TRANSLATION_TABLE_PAGE_ALIGNMENT);
TRANSLATION_TABLE_PAGE_ALIGNMENT
);
// Translate the Section Descriptor into Page Descriptor
SectionDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (*SectionEntry, FALSE);
@ -151,8 +153,10 @@ PopulateLevel2PageTable (
// Make sure we are not inadvertently hitting in the caches
// when populating the page tables
//
InvalidateDataCacheRange ((VOID *)TranslationTable,
TRANSLATION_TABLE_PAGE_SIZE);
InvalidateDataCacheRange (
(VOID *)TranslationTable,
TRANSLATION_TABLE_PAGE_SIZE
);
// Populate the new Level2 Page Table for the section
PageEntry = (UINT32 *)TranslationTable;
@ -172,13 +176,16 @@ PopulateLevel2PageTable (
} else {
TranslationTable = (UINTN)AllocateAlignedPages (
EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_PAGE_SIZE),
TRANSLATION_TABLE_PAGE_ALIGNMENT);
TRANSLATION_TABLE_PAGE_ALIGNMENT
);
//
// Make sure we are not inadvertently hitting in the caches
// when populating the page tables
//
InvalidateDataCacheRange ((VOID *)TranslationTable,
TRANSLATION_TABLE_PAGE_SIZE);
InvalidateDataCacheRange (
(VOID *)TranslationTable,
TRANSLATION_TABLE_PAGE_SIZE
);
ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_PAGE_SIZE);
*SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
@ -202,8 +209,10 @@ PopulateLevel2PageTable (
// [speculatively] since the previous invalidate are evicted again.
//
ArmDataMemoryBarrier ();
InvalidateDataCacheRange ((UINT32 *)TranslationTable + FirstPageOffset,
RemainLength / TT_DESCRIPTOR_PAGE_SIZE * sizeof (*PageEntry));
InvalidateDataCacheRange (
(UINT32 *)TranslationTable + FirstPageOffset,
RemainLength / TT_DESCRIPTOR_PAGE_SIZE * sizeof (*PageEntry)
);
}
STATIC
@ -274,8 +283,9 @@ FillTranslationTable (
SectionEntry = TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS (TranslationTable, MemoryRegion->VirtualBase);
while (RemainLength != 0) {
if (PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE == 0 &&
RemainLength >= TT_DESCRIPTOR_SECTION_SIZE) {
if ((PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE == 0) &&
(RemainLength >= TT_DESCRIPTOR_SECTION_SIZE))
{
// Case: Physical address aligned on the Section Size (1MB) && the length
// is greater than the Section Size
*SectionEntry = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (PhysicalBase) | Attributes;
@ -291,14 +301,21 @@ FillTranslationTable (
PhysicalBase += TT_DESCRIPTOR_SECTION_SIZE;
RemainLength -= TT_DESCRIPTOR_SECTION_SIZE;
} else {
PageMapLength = MIN ((UINT32)RemainLength, TT_DESCRIPTOR_SECTION_SIZE -
(PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE));
PageMapLength = MIN (
(UINT32)RemainLength,
TT_DESCRIPTOR_SECTION_SIZE -
(PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE)
);
// Case: Physical address aligned on the Section Size (1MB) && the length
// does not fill a section
// Case: Physical address NOT aligned on the Section Size (1MB)
PopulateLevel2PageTable (SectionEntry, PhysicalBase, PageMapLength,
MemoryRegion->Attributes);
PopulateLevel2PageTable (
SectionEntry,
PhysicalBase,
PageMapLength,
MemoryRegion->Attributes
);
//
// Issue a DMB to ensure that the page table entry update made it to
@ -332,7 +349,8 @@ ArmConfigureMmu (
TranslationTable = AllocateAlignedPages (
EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SECTION_SIZE),
TRANSLATION_TABLE_SECTION_ALIGNMENT);
TRANSLATION_TABLE_SECTION_ALIGNMENT
);
if (TranslationTable == NULL) {
return RETURN_OUT_OF_RESOURCES;
}
@ -389,7 +407,8 @@ ArmConfigureMmu (
//
ArmSetTTBCR (0);
ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |
ArmSetDomainAccessControl (
DOMAIN_ACCESS_CONTROL_NONE (15) |
DOMAIN_ACCESS_CONTROL_NONE (14) |
DOMAIN_ACCESS_CONTROL_NONE (13) |
DOMAIN_ACCESS_CONTROL_NONE (12) |
@ -404,7 +423,8 @@ ArmConfigureMmu (
DOMAIN_ACCESS_CONTROL_NONE (3) |
DOMAIN_ACCESS_CONTROL_NONE (2) |
DOMAIN_ACCESS_CONTROL_NONE (1) |
DOMAIN_ACCESS_CONTROL_CLIENT(0));
DOMAIN_ACCESS_CONTROL_CLIENT (0)
);
ArmEnableInstructionCache ();
ArmEnableDataCache ();

34
ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c
View File

@ -206,7 +206,6 @@ UpdatePageEntries (
Status = EFI_SUCCESS;
Offset += TT_DESCRIPTOR_PAGE_SIZE;
} // End first level translation table loop
return Status;
@ -303,7 +302,8 @@ UpdateSectionEntries (
(FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT,
TT_DESCRIPTOR_SECTION_SIZE,
Attributes,
NULL);
NULL
);
} else {
// still a section entry
@ -355,19 +355,22 @@ ArmSetMemoryAttributes (
FlushTlbs = FALSE;
while (Length > 0) {
if ((BaseAddress % TT_DESCRIPTOR_SECTION_SIZE == 0) &&
Length >= TT_DESCRIPTOR_SECTION_SIZE) {
(Length >= TT_DESCRIPTOR_SECTION_SIZE))
{
ChunkLength = Length - Length % TT_DESCRIPTOR_SECTION_SIZE;
DEBUG ((DEBUG_PAGE,
DEBUG ((
DEBUG_PAGE,
"SetMemoryAttributes(): MMU section 0x%lx length 0x%lx to %lx\n",
BaseAddress, ChunkLength, Attributes));
BaseAddress,
ChunkLength,
Attributes
));
Status = UpdateSectionEntries (BaseAddress, ChunkLength, Attributes);
FlushTlbs = TRUE;
} else {
//
// Process page by page until the next section boundary, but only if
// we have more than a section's worth of area to deal with after that.
@ -378,12 +381,20 @@ ArmSetMemoryAttributes (
ChunkLength = Length;
}
DEBUG ((DEBUG_PAGE,
DEBUG ((
DEBUG_PAGE,
"SetMemoryAttributes(): MMU page 0x%lx length 0x%lx to %lx\n",
BaseAddress, ChunkLength, Attributes));
BaseAddress,
ChunkLength,
Attributes
));
Status = UpdatePageEntries (BaseAddress, ChunkLength, Attributes,
&FlushTlbs);
Status = UpdatePageEntries (
BaseAddress,
ChunkLength,
Attributes,
&FlushTlbs
);
}
if (EFI_ERROR (Status)) {
@ -397,6 +408,7 @@ ArmSetMemoryAttributes (
if (FlushTlbs) {
ArmInvalidateTlb ();
}
return Status;
}

238
ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.c
View File

@ -25,12 +25,18 @@ typedef uint64_t aeabi_double_t;
* Helpers to convert between float32 and aeabi_float_t, and float64 and
* aeabi_double_t used by the AEABI functions below.
*/
static aeabi_float_t f32_to_f(float32_t val)
static aeabi_float_t
f32_to_f (
float32_t val
)
{
return val.v;
}
static float32_t f32_from_f(aeabi_float_t val)
static float32_t
f32_from_f (
aeabi_float_t val
)
{
float32_t res;
@ -39,12 +45,18 @@ static float32_t f32_from_f(aeabi_float_t val)
return res;
}
static aeabi_double_t f64_to_d(float64_t val)
static aeabi_double_t
f64_to_d (
float64_t val
)
{
return val.v;
}
static float64_t f64_from_d(aeabi_double_t val)
static float64_t
f64_from_d (
aeabi_double_t val
)
{
float64_t res;
@ -64,29 +76,47 @@ static float64_t f64_from_d(aeabi_double_t val)
* Table 2, Standard aeabi_double_t precision floating-point arithmetic helper
* functions
*/
aeabi_double_t __aeabi_dadd(aeabi_double_t a, aeabi_double_t b)
aeabi_double_t
__aeabi_dadd (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_to_d (f64_add (f64_from_d (a), f64_from_d (b)));
}
aeabi_double_t __aeabi_ddiv(aeabi_double_t a, aeabi_double_t b)
aeabi_double_t
__aeabi_ddiv (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_to_d (f64_div (f64_from_d (a), f64_from_d (b)));
}
aeabi_double_t __aeabi_dmul(aeabi_double_t a, aeabi_double_t b)
aeabi_double_t
__aeabi_dmul (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_to_d (f64_mul (f64_from_d (a), f64_from_d (b)));
}
aeabi_double_t __aeabi_drsub(aeabi_double_t a, aeabi_double_t b)
aeabi_double_t
__aeabi_drsub (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_to_d (f64_sub (f64_from_d (b), f64_from_d (a)));
}
aeabi_double_t __aeabi_dsub(aeabi_double_t a, aeabi_double_t b)
aeabi_double_t
__aeabi_dsub (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_to_d (f64_sub (f64_from_d (a), f64_from_d (b)));
}
@ -94,28 +124,47 @@ aeabi_double_t __aeabi_dsub(aeabi_double_t a, aeabi_double_t b)
/*
* Table 3, double precision floating-point comparison helper functions
*/
int __aeabi_dcmpeq(aeabi_double_t a, aeabi_double_t b)
int
__aeabi_dcmpeq (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_eq (f64_from_d (a), f64_from_d (b));
}
int __aeabi_dcmplt(aeabi_double_t a, aeabi_double_t b)
int
__aeabi_dcmplt (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_lt (f64_from_d (a), f64_from_d (b));
}
int __aeabi_dcmple(aeabi_double_t a, aeabi_double_t b)
int
__aeabi_dcmple (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_le (f64_from_d (a), f64_from_d (b));
}
int __aeabi_dcmpge(aeabi_double_t a, aeabi_double_t b)
int
__aeabi_dcmpge (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_le (f64_from_d (b), f64_from_d (a));
}
int __aeabi_dcmpgt(aeabi_double_t a, aeabi_double_t b)
int
__aeabi_dcmpgt (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_lt (f64_from_d (b), f64_from_d (a));
}
@ -124,28 +173,47 @@ int __aeabi_dcmpgt(aeabi_double_t a, aeabi_double_t b)
* Table 4, Standard single precision floating-point arithmetic helper
* functions
*/
aeabi_float_t __aeabi_fadd(aeabi_float_t a, aeabi_float_t b)
aeabi_float_t
__aeabi_fadd (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_to_f (f32_add (f32_from_f (a), f32_from_f (b)));
}
aeabi_float_t __aeabi_fdiv(aeabi_float_t a, aeabi_float_t b)
aeabi_float_t
__aeabi_fdiv (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_to_f (f32_div (f32_from_f (a), f32_from_f (b)));
}
aeabi_float_t __aeabi_fmul(aeabi_float_t a, aeabi_float_t b)
aeabi_float_t
__aeabi_fmul (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_to_f (f32_mul (f32_from_f (a), f32_from_f (b)));
}
aeabi_float_t __aeabi_frsub(aeabi_float_t a, aeabi_float_t b)
aeabi_float_t
__aeabi_frsub (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_to_f (f32_sub (f32_from_f (b), f32_from_f (a)));
}
aeabi_float_t __aeabi_fsub(aeabi_float_t a, aeabi_float_t b)
aeabi_float_t
__aeabi_fsub (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_to_f (f32_sub (f32_from_f (a), f32_from_f (b)));
}
@ -154,28 +222,47 @@ aeabi_float_t __aeabi_fsub(aeabi_float_t a, aeabi_float_t b)
* Table 5, Standard single precision floating-point comparison helper
* functions
*/
int __aeabi_fcmpeq(aeabi_float_t a, aeabi_float_t b)
int
__aeabi_fcmpeq (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_eq (f32_from_f (a), f32_from_f (b));
}
int __aeabi_fcmplt(aeabi_float_t a, aeabi_float_t b)
int
__aeabi_fcmplt (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_lt (f32_from_f (a), f32_from_f (b));
}
int __aeabi_fcmple(aeabi_float_t a, aeabi_float_t b)
int
__aeabi_fcmple (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_le (f32_from_f (a), f32_from_f (b));
}
int __aeabi_fcmpge(aeabi_float_t a, aeabi_float_t b)
int
__aeabi_fcmpge (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_le (f32_from_f (b), f32_from_f (a));
}
int __aeabi_fcmpgt(aeabi_float_t a, aeabi_float_t b)
int
__aeabi_fcmpgt (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_lt (f32_from_f (b), f32_from_f (a));
}
@ -183,43 +270,66 @@ int __aeabi_fcmpgt(aeabi_float_t a, aeabi_float_t b)
/*
* Table 6, Standard floating-point to integer conversions
*/
int __aeabi_d2iz(aeabi_double_t a)
int
__aeabi_d2iz (
aeabi_double_t a
)
{
return f64_to_i32_r_minMag (f64_from_d (a), false);
}
unsigned __aeabi_d2uiz(aeabi_double_t a)
unsigned
__aeabi_d2uiz (
aeabi_double_t a
)
{
return f64_to_ui32_r_minMag (f64_from_d (a), false);
}
long long __aeabi_d2lz(aeabi_double_t a)
long long
__aeabi_d2lz (
aeabi_double_t a
)
{
return f64_to_i64_r_minMag (f64_from_d (a), false);
}
unsigned long long __aeabi_d2ulz(aeabi_double_t a)
unsigned long long
__aeabi_d2ulz (
aeabi_double_t a
)
{
return f64_to_ui64_r_minMag (f64_from_d (a), false);
}
int __aeabi_f2iz(aeabi_float_t a)
int
__aeabi_f2iz (
aeabi_float_t a
)
{
return f32_to_i32_r_minMag (f32_from_f (a), false);
}
unsigned __aeabi_f2uiz(aeabi_float_t a)
unsigned
__aeabi_f2uiz (
aeabi_float_t a
)
{
return f32_to_ui32_r_minMag (f32_from_f (a), false);
}
long long __aeabi_f2lz(aeabi_float_t a)
long long
__aeabi_f2lz (
aeabi_float_t a
)
{
return f32_to_i64_r_minMag (f32_from_f (a), false);
}
unsigned long long __aeabi_f2ulz(aeabi_float_t a)
unsigned long long
__aeabi_f2ulz (
aeabi_float_t a
)
{
return f32_to_ui64_r_minMag (f32_from_f (a), false);
}
@ -227,13 +337,18 @@ unsigned long long __aeabi_f2ulz(aeabi_float_t a)
/*
* Table 7, Standard conversions between floating types
*/
aeabi_float_t __aeabi_d2f(aeabi_double_t a)
aeabi_float_t
__aeabi_d2f (
aeabi_double_t a
)
{
return f32_to_f (f64_to_f32 (f64_from_d (a)));
}
aeabi_double_t __aeabi_f2d(aeabi_float_t a)
aeabi_double_t
__aeabi_f2d (
aeabi_float_t a
)
{
return f64_to_d (f32_to_f64 (f32_from_f (a)));
}
@ -241,43 +356,66 @@ aeabi_double_t __aeabi_f2d(aeabi_float_t a)
/*
* Table 8, Standard integer to floating-point conversions
*/
aeabi_double_t __aeabi_i2d(int a)
aeabi_double_t
__aeabi_i2d (
int a
)
{
return f64_to_d (i32_to_f64 (a));
}
aeabi_double_t __aeabi_ui2d(unsigned a)
aeabi_double_t
__aeabi_ui2d (
unsigned a
)
{
return f64_to_d (ui32_to_f64 (a));
}
aeabi_double_t __aeabi_l2d(long long a)
aeabi_double_t
__aeabi_l2d (
long long a
)
{
return f64_to_d (i64_to_f64 (a));
}
aeabi_double_t __aeabi_ul2d(unsigned long long a)
aeabi_double_t
__aeabi_ul2d (
unsigned long long a
)
{
return f64_to_d (ui64_to_f64 (a));
}
aeabi_float_t __aeabi_i2f(int a)
aeabi_float_t
__aeabi_i2f (
int a
)
{
return f32_to_f (i32_to_f32 (a));
}
aeabi_float_t __aeabi_ui2f(unsigned a)
aeabi_float_t
__aeabi_ui2f (
unsigned a
)
{
return f32_to_f (ui32_to_f32 (a));
}
aeabi_float_t __aeabi_l2f(long long a)
aeabi_float_t
__aeabi_l2f (
long long a
)
{
return f32_to_f (i64_to_f32 (a));
}
aeabi_float_t __aeabi_ul2f(unsigned long long a)
aeabi_float_t
__aeabi_ul2f (
unsigned long long a
)
{
return f32_to_f (ui64_to_f32 (a));
}

19
ArmPkg/Library/CompilerIntrinsicsLib/memcmp_ms.c
View File

@ -13,10 +13,21 @@ typedef unsigned __int64 size_t;
typedef unsigned __int32 size_t;
#endif
int memcmp(void *, void *, size_t);
int
memcmp (
void *,
void *,
size_t
);
#pragma intrinsic(memcmp)
#pragma function(memcmp)
int memcmp(const void *s1, const void *s2, size_t n)
int
memcmp (
const void *s1,
const void *s2,
size_t n
)
{
unsigned char const *t1;
unsigned char const *t2;
@ -25,8 +36,10 @@ int memcmp(const void *s1, const void *s2, size_t n)
t2 = s2;
while (n-- != 0) {
if (*t1 != *t2)
if (*t1 != *t2) {
return (int)*t1 - (int)*t2;
}
t1++;
t2++;
}

35
ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c
View File

@ -9,7 +9,12 @@
typedef __SIZE_TYPE__ size_t;
static void __memcpy(void *dest, const void *src, size_t n)
static void
__memcpy (
void *dest,
const void *src,
size_t n
)
{
unsigned char *d;
unsigned char const *s;
@ -22,7 +27,12 @@ static void __memcpy(void *dest, const void *src, size_t n)
}
}
void *memcpy(void *dest, const void *src, size_t n)
void *
memcpy (
void *dest,
const void *src,
size_t n
)
{
__memcpy (dest, src, n);
return dest;
@ -31,12 +41,27 @@ void *memcpy(void *dest, const void *src, size_t n)
#ifdef __arm__
__attribute__ ((__alias__ ("__memcpy")))
void __aeabi_memcpy(void *dest, const void *src, size_t n);
void
__aeabi_memcpy (
void *dest,
const void *src,
size_t n
);
__attribute__ ((__alias__ ("__memcpy")))
void __aeabi_memcpy4(void *dest, const void *src, size_t n);
void
__aeabi_memcpy4 (
void *dest,
const void *src,
size_t n
);
__attribute__ ((__alias__ ("__memcpy")))
void __aeabi_memcpy8(void *dest, const void *src, size_t n);
void
__aeabi_memcpy8 (
void *dest,
const void *src,
size_t n
);
#endif

15
ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c
View File

@ -13,10 +13,21 @@ typedef unsigned __int64 size_t;
typedef unsigned __int32 size_t;
#endif
void* memcpy(void *, const void *, size_t);
void *
memcpy (
void *,
const void *,
size_t
);
#pragma intrinsic(memcpy)
#pragma function(memcpy)
void* memcpy(void *dest, const void *src, size_t n)
void *
memcpy (
void *dest,
const void *src,
size_t n
)
{
unsigned char *d;
unsigned char const *s;

15
ArmPkg/Library/CompilerIntrinsicsLib/memmove_ms.c
View File

@ -13,10 +13,21 @@ typedef unsigned __int64 size_t;
typedef unsigned __int32 size_t;
#endif
void* memmove(void *, const void *, size_t);
void *
memmove (
void *,
const void *,
size_t
);
#pragma intrinsic(memmove)
#pragma function(memmove)
void* memmove(void *dest, const void *src, size_t n)
void *
memmove (
void *dest,
const void *src,
size_t n
)
{
unsigned char *d;
unsigned char const *s;

53
ArmPkg/Library/CompilerIntrinsicsLib/memset.c
View File

@ -10,7 +10,12 @@
typedef __SIZE_TYPE__ size_t;
static __attribute__ ((__used__))
void *__memset(void *s, int c, size_t n)
void *
__memset (
void *s,
int c,
size_t n
)
{
unsigned char *d;
@ -30,30 +35,62 @@ void *__memset(void *s, int c, size_t n)
// our memset() 'weak' to let the other implementation take precedence.
//
__attribute__ ((__weak__, __alias__ ("__memset")))
void *memset(void *dest, int c, size_t n);
void *
memset (
void *dest,
int c,
size_t n
);
#ifdef __arm__
void __aeabi_memset(void *dest, size_t n, int c)
void
__aeabi_memset (
void *dest,
size_t n,
int c
)
{
__memset (dest, c, n);
}
__attribute__ ((__alias__ ("__aeabi_memset")))
void __aeabi_memset4(void *dest, size_t n, int c);
void
__aeabi_memset4 (
void *dest,
size_t n,
int c
);
__attribute__ ((__alias__ ("__aeabi_memset")))
void __aeabi_memset8(void *dest, size_t n, int c);
void
__aeabi_memset8 (
void *dest,
size_t n,
int c
);
void __aeabi_memclr(void *dest, size_t n)
void
__aeabi_memclr (
void *dest,
size_t n
)
{
__memset (dest, 0, n);
}
__attribute__ ((__alias__ ("__aeabi_memclr")))
void __aeabi_memclr4(void *dest, size_t n);
void
__aeabi_memclr4 (
void *dest,
size_t n
);
__attribute__ ((__alias__ ("__aeabi_memclr")))
void __aeabi_memclr8(void *dest, size_t n);
void
__aeabi_memclr8 (
void *dest,
size_t n
);
#endif

15
ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c
View File

@ -13,10 +13,21 @@ typedef unsigned __int64 size_t;
typedef unsigned __int32 size_t;
#endif
void* memset(void *, int, size_t);
void *
memset (
void *,
int,
size_t
);
#pragma intrinsic(memset)
#pragma function(memset)
void *memset(void *s, int c, size_t n)
void *
memset (
void *s,
int c,
size_t n
)
{
unsigned char *d;

3
ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c
View File

@ -22,7 +22,6 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \
(ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1))
// Vector Table for Sec Phase
VOID
DebugAgentVectorTable (
@ -125,7 +124,6 @@ GetFfsFile (
FileState = GetFileState (ErasePolarity, FfsFileHeader);
switch (FileState) {
case EFI_FILE_HEADER_INVALID:
FileOffset += sizeof (EFI_FFS_FILE_HEADER);
FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + sizeof (EFI_FFS_FILE_HEADER));
@ -161,6 +159,7 @@ GetFfsFile (
return EFI_NOT_FOUND;
}
}
return EFI_NOT_FOUND;
}

4
ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.c
View File

@ -17,7 +17,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/PeCoffExtraActionLib.h>
#include <Library/PrintLib.h>
/**
If the build is done on cygwin the paths are cygpaths.
/cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
@ -57,7 +56,6 @@ DeCygwinPathIfNeeded (
return Temp;
}
/**
Performs additional actions after a PE/COFF image has been loaded and relocated.
@ -97,8 +95,6 @@ PeCoffLoaderRelocateImageExtraAction (
}
}
/**
Performs additional actions just before a PE/COFF image is unloaded. Any resources
that were allocated by PeCoffLoaderRelocateImageExtraAction() must be freed.

152
ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c
View File

@ -48,40 +48,72 @@ DescribeInstructionOrDataAbort (
CHAR8 *AbortCause;
switch (Iss & 0x3f) {
case 0x0: AbortCause = "Address size fault, zeroth level of translation or translation table base register"; break;
case 0x1: AbortCause = "Address size fault, first level"; break;
case 0x2: AbortCause = "Address size fault, second level"; break;
case 0x3: AbortCause = "Address size fault, third level"; break;
case 0x4: AbortCause = "Translation fault, zeroth level"; break;
case 0x5: AbortCause = "Translation fault, first level"; break;
case 0x6: AbortCause = "Translation fault, second level"; break;
case 0x7: AbortCause = "Translation fault, third level"; break;
case 0x9: AbortCause = "Access flag fault, first level"; break;
case 0xa: AbortCause = "Access flag fault, second level"; break;
case 0xb: AbortCause = "Access flag fault, third level"; break;
case 0xd: AbortCause = "Permission fault, first level"; break;
case 0xe: AbortCause = "Permission fault, second level"; break;
case 0xf: AbortCause = "Permission fault, third level"; break;
case 0x10: AbortCause = "Synchronous external abort"; break;
case 0x18: AbortCause = "Synchronous parity error on memory access"; break;
case 0x11: AbortCause = "Asynchronous external abort"; break;
case 0x19: AbortCause = "Asynchronous parity error on memory access"; break;
case 0x14: AbortCause = "Synchronous external abort on translation table walk, zeroth level"; break;
case 0x15: AbortCause = "Synchronous external abort on translation table walk, first level"; break;
case 0x16: AbortCause = "Synchronous external abort on translation table walk, second level"; break;
case 0x17: AbortCause = "Synchronous external abort on translation table walk, third level"; break;
case 0x1c: AbortCause = "Synchronous parity error on memory access on translation table walk, zeroth level"; break;
case 0x1d: AbortCause = "Synchronous parity error on memory access on translation table walk, first level"; break;
case 0x1e: AbortCause = "Synchronous parity error on memory access on translation table walk, second level"; break;
case 0x1f: AbortCause = "Synchronous parity error on memory access on translation table walk, third level"; break;
case 0x21: AbortCause = "Alignment fault"; break;
case 0x22: AbortCause = "Debug event"; break;
case 0x30: AbortCause = "TLB conflict abort"; break;
case 0x0: AbortCause = "Address size fault, zeroth level of translation or translation table base register";
break;
case 0x1: AbortCause = "Address size fault, first level";
break;
case 0x2: AbortCause = "Address size fault, second level";
break;
case 0x3: AbortCause = "Address size fault, third level";
break;
case 0x4: AbortCause = "Translation fault, zeroth level";
break;
case 0x5: AbortCause = "Translation fault, first level";
break;
case 0x6: AbortCause = "Translation fault, second level";
break;
case 0x7: AbortCause = "Translation fault, third level";
break;
case 0x9: AbortCause = "Access flag fault, first level";
break;
case 0xa: AbortCause = "Access flag fault, second level";
break;
case 0xb: AbortCause = "Access flag fault, third level";
break;
case 0xd: AbortCause = "Permission fault, first level";
break;
case 0xe: AbortCause = "Permission fault, second level";
break;
case 0xf: AbortCause = "Permission fault, third level";
break;
case 0x10: AbortCause = "Synchronous external abort";
break;
case 0x18: AbortCause = "Synchronous parity error on memory access";
break;
case 0x11: AbortCause = "Asynchronous external abort";
break;
case 0x19: AbortCause = "Asynchronous parity error on memory access";
break;
case 0x14: AbortCause = "Synchronous external abort on translation table walk, zeroth level";
break;
case 0x15: AbortCause = "Synchronous external abort on translation table walk, first level";
break;
case 0x16: AbortCause = "Synchronous external abort on translation table walk, second level";
break;
case 0x17: AbortCause = "Synchronous external abort on translation table walk, third level";
break;
case 0x1c: AbortCause = "Synchronous parity error on memory access on translation table walk, zeroth level";
break;
case 0x1d: AbortCause = "Synchronous parity error on memory access on translation table walk, first level";
break;
case 0x1e: AbortCause = "Synchronous parity error on memory access on translation table walk, second level";
break;
case 0x1f: AbortCause = "Synchronous parity error on memory access on translation table walk, third level";
break;
case 0x21: AbortCause = "Alignment fault";
break;
case 0x22: AbortCause = "Debug event";
break;
case 0x30: AbortCause = "TLB conflict abort";
break;
case 0x33:
case 0x34: AbortCause = "IMPLEMENTATION DEFINED"; break;
case 0x34: AbortCause = "IMPLEMENTATION DEFINED";
break;
case 0x35:
case 0x36: AbortCause = "Domain fault"; break;
default: AbortCause = ""; break;
case 0x36: AbortCause = "Domain fault";
break;
default: AbortCause = "";
break;
}
DEBUG ((DEBUG_ERROR, "\n%a: %a\n", AbortType, AbortCause));
@ -101,13 +133,18 @@ DescribeExceptionSyndrome (
Iss = Esr & 0x00ffffff;
switch (Ec) {
case 0x15: Message = "SVC executed in AArch64"; break;
case 0x15: Message = "SVC executed in AArch64";
break;
case 0x20:
case 0x21: DescribeInstructionOrDataAbort ("Instruction abort", Iss); return;
case 0x22: Message = "PC alignment fault"; break;
case 0x23: Message = "SP alignment fault"; break;
case 0x21: DescribeInstructionOrDataAbort ("Instruction abort", Iss);
return;
case 0x22: Message = "PC alignment fault";
break;
case 0x23: Message = "SP alignment fault";
break;
case 0x24:
case 0x25: DescribeInstructionOrDataAbort ("Data abort", Iss); return;
case 0x25: DescribeInstructionOrDataAbort ("Data abort", Iss);
return;
default: return;
}
@ -126,12 +163,14 @@ BaseName (
Str = FullName + AsciiStrLen (FullName);
while (--Str > FullName) {
if (*Str == '/' || *Str == '\\') {
if ((*Str == '/') || (*Str == '\\')) {
return Str + 1;
}
}
return Str;
}
#endif
/**
@ -160,8 +199,10 @@ DefaultExceptionHandler (
if (gST->ConOut != NULL) {
AsciiPrint (Message);
}
CpuDeadLoop ();
}
mRecursiveException = TRUE;
CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "\n\n%a Exception at 0x%016lx\n", gExceptionTypeString[ExceptionType], SystemContext.SystemContextAArch64->ELR);
@ -180,9 +221,14 @@ DefaultExceptionHandler (
PrevPdb = Pdb = GetImageName (SystemContext.SystemContextAArch64->ELR, &ImageBase, &PeCoffSizeOfHeader);
if (Pdb != NULL) {
DEBUG ((DEBUG_ERROR, "PC 0x%012lx (0x%012lx+0x%08x) [ 0] %a\n",
SystemContext.SystemContextAArch64->ELR, ImageBase,
SystemContext.SystemContextAArch64->ELR - ImageBase, BaseName (Pdb)));
DEBUG ((
DEBUG_ERROR,
"PC 0x%012lx (0x%012lx+0x%08x) [ 0] %a\n",
SystemContext.SystemContextAArch64->ELR,
ImageBase,
SystemContext.SystemContextAArch64->ELR - ImageBase,
BaseName (Pdb)
));
} else {
DEBUG ((DEBUG_ERROR, "PC 0x%012lx\n", SystemContext.SystemContextAArch64->ELR));
}
@ -196,6 +242,7 @@ DefaultExceptionHandler (
RootFp[0] = SystemContext.SystemContextAArch64->FP;
RootFp[1] = SystemContext.SystemContextAArch64->LR;
}
for (Fp = RootFp; Fp[0] != 0; Fp = (UINT64 *)Fp[0]) {
Pdb = GetImageName (Fp[1], &ImageBase, &PeCoffSizeOfHeader);
if (Pdb != NULL) {
@ -203,12 +250,21 @@ DefaultExceptionHandler (
Idx++;
PrevPdb = Pdb;
}
DEBUG ((DEBUG_ERROR, "PC 0x%012lx (0x%012lx+0x%08x) [% 2d] %a\n",
Fp[1], ImageBase, Fp[1] - ImageBase, Idx, BaseName (Pdb)));
DEBUG ((
DEBUG_ERROR,
"PC 0x%012lx (0x%012lx+0x%08x) [% 2d] %a\n",
Fp[1],
ImageBase,
Fp[1] - ImageBase,
Idx,
BaseName (Pdb)
));
} else {
DEBUG ((DEBUG_ERROR, "PC 0x%012lx\n", Fp[1]));
}
}
PrevPdb = Pdb = GetImageName (SystemContext.SystemContextAArch64->ELR, &ImageBase, &PeCoffSizeOfHeader);
if (Pdb != NULL) {
DEBUG ((DEBUG_ERROR, "\n[ 0] %a\n", Pdb));
@ -217,12 +273,13 @@ DefaultExceptionHandler (
Idx = 0;
for (Fp = RootFp; Fp[0] != 0; Fp = (UINT64 *)Fp[0]) {
Pdb = GetImageName (Fp[1], &ImageBase, &PeCoffSizeOfHeader);
if (Pdb != NULL && Pdb != PrevPdb) {
if ((Pdb != NULL) && (Pdb != PrevPdb)) {
DEBUG ((DEBUG_ERROR, "[% 2d] %a\n", ++Idx, Pdb));
PrevPdb = Pdb;
}
}
}
DEBUG_CODE_END ();
DEBUG ((DEBUG_ERROR, "\n X0 0x%016lx X1 0x%016lx X2 0x%016lx X3 0x%016lx\n", SystemContext.SystemContextAArch64->X0, SystemContext.SystemContextAArch64->X1, SystemContext.SystemContextAArch64->X2, SystemContext.SystemContextAArch64->X3));
@ -261,13 +318,16 @@ DefaultExceptionHandler (
DEBUG ((DEBUG_ERROR, "\nStack dump:\n"));
for (Offset = -256; Offset < 256; Offset += 32) {
DEBUG ((DEBUG_ERROR, "%c %013lx: %016lx %016lx %016lx %016lx\n",
DEBUG ((
DEBUG_ERROR,
"%c %013lx: %016lx %016lx %016lx %016lx\n",
Offset == 0 ? '>' : ' ',
SystemContext.SystemContextAArch64->SP + Offset,
*(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset),
*(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 8),
*(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 16),
*(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 24)));
*(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 24)
));
}
ASSERT (FALSE);

60
ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c
View File

@ -134,22 +134,38 @@ FaultStatusToString (
CHAR8 *FaultSource;
switch (Status) {
case 0x01: FaultSource = "Alignment fault"; break;
case 0x02: FaultSource = "Debug event fault"; break;
case 0x03: FaultSource = "Access Flag fault on Section"; break;
case 0x04: FaultSource = "Cache maintenance operation fault[2]"; break;
case 0x05: FaultSource = "Translation fault on Section"; break;
case 0x06: FaultSource = "Access Flag fault on Page"; break;
case 0x07: FaultSource = "Translation fault on Page"; break;
case 0x08: FaultSource = "Precise External Abort"; break;
case 0x09: FaultSource = "Domain fault on Section"; break;
case 0x0b: FaultSource = "Domain fault on Page"; break;
case 0x0c: FaultSource = "External abort on translation, first level"; break;
case 0x0d: FaultSource = "Permission fault on Section"; break;
case 0x0e: FaultSource = "External abort on translation, second level"; break;
case 0x0f: FaultSource = "Permission fault on Page"; break;
case 0x16: FaultSource = "Imprecise External Abort"; break;
default: FaultSource = "No function"; break;
case 0x01: FaultSource = "Alignment fault";
break;
case 0x02: FaultSource = "Debug event fault";
break;
case 0x03: FaultSource = "Access Flag fault on Section";
break;
case 0x04: FaultSource = "Cache maintenance operation fault[2]";
break;
case 0x05: FaultSource = "Translation fault on Section";
break;
case 0x06: FaultSource = "Access Flag fault on Page";
break;
case 0x07: FaultSource = "Translation fault on Page";
break;
case 0x08: FaultSource = "Precise External Abort";
break;
case 0x09: FaultSource = "Domain fault on Section";
break;
case 0x0b: FaultSource = "Domain fault on Page";
break;
case 0x0c: FaultSource = "External abort on translation, first level";
break;
case 0x0d: FaultSource = "Permission fault on Section";
break;
case 0x0e: FaultSource = "External abort on translation, second level";
break;
case 0x0f: FaultSource = "Permission fault on Page";
break;
case 0x16: FaultSource = "Imprecise External Abort";
break;
default: FaultSource = "No function";
break;
}
return FaultSource;
@ -191,8 +207,14 @@ DefaultExceptionHandler (
PcAdjust = 0;
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n%a Exception PC at 0x%08x CPSR 0x%08x ",
gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR);
CharCount = AsciiSPrint (
Buffer,
sizeof (Buffer),
"\n%a Exception PC at 0x%08x CPSR 0x%08x ",
gExceptionTypeString[ExceptionType],
SystemContext.SystemContextArm->PC,
SystemContext.SystemContextArm->CPSR
);
SerialPortWrite ((UINT8 *)Buffer, CharCount);
if (gST->ConOut != NULL) {
AsciiPrint (Buffer);
@ -245,8 +267,8 @@ DefaultExceptionHandler (
default:
break;
}
}
DEBUG_CODE_END ();
DEBUG ((DEBUG_ERROR, "\n R0 0x%08x R1 0x%08x R2 0x%08x R3 0x%08x\n", SystemContext.SystemContextArm->R0, SystemContext.SystemContextArm->R1, SystemContext.SystemContextArm->R2, SystemContext.SystemContextArm->R3));
DEBUG ((DEBUG_ERROR, " R4 0x%08x R5 0x%08x R6 0x%08x R7 0x%08x\n", SystemContext.SystemContextArm->R4, SystemContext.SystemContextArm->R5, SystemContext.SystemContextArm->R6, SystemContext.SystemContextArm->R7));

7
ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerUefi.c
View File

@ -53,9 +53,11 @@ GetImageName (
for (Entry = 0; Entry < DebugTableHeader->TableSize; Entry++, DebugTable++) {
if (DebugTable->NormalImage != NULL) {
if ((DebugTable->NormalImage->ImageInfoType == EFI_DEBUG_IMAGE_INFO_TYPE_NORMAL) &&
(DebugTable->NormalImage->LoadedImageProtocolInstance != NULL)) {
(DebugTable->NormalImage->LoadedImageProtocolInstance != NULL))
{
if ((Address >= (CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase) &&
(Address <= ((CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase + DebugTable->NormalImage->LoadedImageProtocolInstance->ImageSize))) {
(Address <= ((CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase + DebugTable->NormalImage->LoadedImageProtocolInstance->ImageSize)))
{
*ImageBase = (UINTN)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase;
*PeCoffSizeOfHeaders = PeCoffGetSizeOfHeaders ((VOID *)(UINTN)*ImageBase);
return PeCoffLoaderGetPdbPointer (DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase);
@ -66,4 +68,3 @@ GetImageName (
return NULL;
}

1
ArmPkg/Library/LinuxBootBootManagerLib/LinuxBootBm.c
View File

@ -96,6 +96,7 @@ PlatformRegisterFvBootOption (
Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
ASSERT_EFI_ERROR (Status);
}
EfiBootManagerFreeLoadOption (&NewOption);
EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
}

6
ArmPkg/Library/OpteeLib/Optee.c
View File

@ -41,7 +41,8 @@ IsOpteePresent (
if ((ArmSmcArgs.Arg0 == OPTEE_OS_UID0) &&
(ArmSmcArgs.Arg1 == OPTEE_OS_UID1) &&
(ArmSmcArgs.Arg2 == OPTEE_OS_UID2) &&
(ArmSmcArgs.Arg3 == OPTEE_OS_UID3)) {
(ArmSmcArgs.Arg3 == OPTEE_OS_UID3))
{
return TRUE;
} else {
return FALSE;
@ -441,7 +442,8 @@ OpteeInvokeFunction (
InvokeFunctionArg->Params,
OPTEE_MAX_CALL_PARAMS,
MessageArg->Params
) != 0) {
) != 0)
{
MessageArg->Return = OPTEE_ERROR_COMMUNICATION;
MessageArg->ReturnOrigin = OPTEE_ORIGIN_COMMUNICATION;
}

287
ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
View File

@ -91,7 +91,6 @@ STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
}
};
#pragma pack (1)
typedef struct {
USB_CLASS_DEVICE_PATH Keyboard;
@ -124,7 +123,6 @@ STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
}
};
/**
Check if the handle satisfies a particular condition.
@ -143,7 +141,6 @@ BOOLEAN
IN CONST CHAR16 *ReportText
);
/**
Process a handle.
@ -184,14 +181,24 @@ FilterAndProcess (
UINTN NoHandles;
UINTN Idx;
Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
NULL /* SearchKey */, &NoHandles, &Handles);
Status = gBS->LocateHandleBuffer (
ByProtocol,
ProtocolGuid,
NULL /* SearchKey */,
&NoHandles,
&Handles
);
if (EFI_ERROR (Status)) {
//
// This is not an error, just an informative condition.
//
DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
Status));
DEBUG ((
DEBUG_VERBOSE,
"%a: %g: %r\n",
__FUNCTION__,
ProtocolGuid,
Status
));
return;
}
@ -212,7 +219,7 @@ FilterAndProcess (
DevicePathText = Fallback;
}
if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) {
if ((Filter == NULL) || Filter (Handles[Idx], DevicePathText)) {
Process (Handles[Idx], DevicePathText);
}
@ -220,10 +227,10 @@ FilterAndProcess (
FreePool (DevicePathText);
}
}
gBS->FreePool (Handles);
}
/**
This FILTER_FUNCTION checks if a handle corresponds to a PCI display device.
**/
@ -239,8 +246,11 @@ IsPciDisplay (
EFI_PCI_IO_PROTOCOL *PciIo;
PCI_TYPE00 Pci;
Status = gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid,
(VOID**)&PciIo);
Status = gBS->HandleProtocol (
Handle,
&gEfiPciIoProtocolGuid,
(VOID **)&PciIo
);
if (EFI_ERROR (Status)) {
//
// This is not an error worth reporting.
@ -248,8 +258,13 @@ IsPciDisplay (
return FALSE;
}
Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */,
sizeof Pci / sizeof (UINT32), &Pci);
Status = PciIo->Pci.Read (
PciIo,
EfiPciIoWidthUint32,
0 /* Offset */,
sizeof Pci / sizeof (UINT32),
&Pci
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status));
return FALSE;
@ -258,7 +273,6 @@ IsPciDisplay (
return IS_PCI_DISPLAY (&Pci);
}
/**
This FILTER_FUNCTION checks if a handle corresponds to a non-discoverable
USB host controller.
@ -274,22 +288,25 @@ IsUsbHost (
NON_DISCOVERABLE_DEVICE *Device;
EFI_STATUS Status;
Status = gBS->HandleProtocol (Handle,
Status = gBS->HandleProtocol (
Handle,
&gEdkiiNonDiscoverableDeviceProtocolGuid,
(VOID **)&Device);
(VOID **)&Device
);
if (EFI_ERROR (Status)) {
return FALSE;
}
if (CompareGuid (Device->Type, &gEdkiiNonDiscoverableUhciDeviceGuid) ||
CompareGuid (Device->Type, &gEdkiiNonDiscoverableEhciDeviceGuid) ||
CompareGuid (Device->Type, &gEdkiiNonDiscoverableXhciDeviceGuid)) {
CompareGuid (Device->Type, &gEdkiiNonDiscoverableXhciDeviceGuid))
{
return TRUE;
}
return FALSE;
}
/**
This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
the matching driver to produce all first-level child handles.
@ -310,11 +327,15 @@ Connect (
NULL, // RemainingDevicePath -- produce all children
FALSE // Recursive
);
DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n",
__FUNCTION__, ReportText, Status));
DEBUG ((
EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE,
"%a: %s: %r\n",
__FUNCTION__,
ReportText,
Status
));
}
/**
This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the
handle, and adds it to ConOut and ErrOut.
@ -332,27 +353,46 @@ AddOutput (
DevicePath = DevicePathFromHandle (Handle);
if (DevicePath == NULL) {
DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n",
__FUNCTION__, ReportText, Handle));
DEBUG ((
DEBUG_ERROR,
"%a: %s: handle %p: device path not found\n",
__FUNCTION__,
ReportText,
Handle
));
return;
}
Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__,
ReportText, Status));
DEBUG ((
DEBUG_ERROR,
"%a: %s: adding to ConOut: %r\n",
__FUNCTION__,
ReportText,
Status
));
return;
}
Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__,
ReportText, Status));
DEBUG ((
DEBUG_ERROR,
"%a: %s: adding to ErrOut: %r\n",
__FUNCTION__,
ReportText,
Status
));
return;
}
DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
ReportText));
DEBUG ((
DEBUG_VERBOSE,
"%a: %s: added to ConOut and ErrOut\n",
__FUNCTION__,
ReportText
));
}
STATIC
@ -403,25 +443,33 @@ PlatformRegisterFvBootOption (
FreePool (DevicePath);
BootOptions = EfiBootManagerGetLoadOptions (
&BootOptionCount, LoadOptionTypeBoot
&BootOptionCount,
LoadOptionTypeBoot
);
OptionIndex = EfiBootManagerFindLoadOption (
&NewOption, BootOptions, BootOptionCount
&NewOption,
BootOptions,
BootOptionCount
);
if (OptionIndex == -1) {
Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
ASSERT_EFI_ERROR (Status);
Status = EfiBootManagerAddKeyOptionVariable (NULL,
(UINT16)NewOption.OptionNumber, 0, Key, NULL);
Status = EfiBootManagerAddKeyOptionVariable (
NULL,
(UINT16)NewOption.OptionNumber,
0,
Key,
NULL
);
ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
}
EfiBootManagerFreeLoadOption (&NewOption);
EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
}
STATIC
VOID
GetPlatformOptions (
@ -437,11 +485,15 @@ GetPlatformOptions (
UINTN Index;
UINTN BootCount;
Status = gBS->LocateProtocol (&gPlatformBootManagerProtocolGuid, NULL,
(VOID **)&PlatformBootManager);
Status = gBS->LocateProtocol (
&gPlatformBootManagerProtocolGuid,
NULL,
(VOID **)&PlatformBootManager
);
if (EFI_ERROR (Status)) {
return;
}
Status = PlatformBootManager->GetPlatformBootOptionsAndKeys (
&BootCount,
&BootOptions,
@ -450,6 +502,7 @@ GetPlatformOptions (
if (EFI_ERROR (Status)) {
return;
}
//
// Fetch the existent boot options. If there are none, CurrentBootCount
// will be zeroed.
@ -491,10 +544,16 @@ GetPlatformOptions (
MAX_UINTN
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: failed to register \"%s\": %r\n",
__FUNCTION__, BootOptions[Index].Description, Status));
DEBUG ((
DEBUG_ERROR,
"%a: failed to register \"%s\": %r\n",
__FUNCTION__,
BootOptions[Index].Description,
Status
));
continue;
}
BootOptionNumber = BootOptions[Index].OptionNumber;
}
@ -513,10 +572,16 @@ GetPlatformOptions (
NULL
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: failed to register hotkey for \"%s\": %r\n",
__FUNCTION__, BootOptions[Index].Description, Status));
DEBUG ((
DEBUG_ERROR,
"%a: failed to register hotkey for \"%s\": %r\n",
__FUNCTION__,
BootOptions[Index].Description,
Status
));
}
}
EfiBootManagerFreeLoadOptions (CurrentBootOptions, CurrentBootOptionCount);
EfiBootManagerFreeLoadOptions (BootOptions, BootCount);
FreePool (BootKeys);
@ -554,19 +619,27 @@ PlatformRegisterOptionsAndKeys (
Status = EfiBootManagerGetBootManagerMenu (&BootOption);
ASSERT_EFI_ERROR (Status);
Status = EfiBootManagerAddKeyOptionVariable (
NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL
NULL,
(UINT16)BootOption.OptionNumber,
0,
&F2,
NULL
);
ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
Status = EfiBootManagerAddKeyOptionVariable (
NULL, (UINT16) BootOption.OptionNumber, 0, &Esc, NULL
NULL,
(UINT16)BootOption.OptionNumber,
0,
&Esc,
NULL
);
ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
}
//
// BDS Platform Functions
//
/**
Do the platform init, can be customized by OEM/IBV
Possible things that can be done in PlatformBootManagerBeforeConsole:
@ -626,27 +699,45 @@ PlatformBootManagerBeforeConsole (
//
// Add the hardcoded short-form USB keyboard device path to ConIn.
//
EfiBootManagerUpdateConsoleVariable (ConIn,
(EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL);
EfiBootManagerUpdateConsoleVariable (
ConIn,
(EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard,
NULL
);
//
// Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
//
STATIC_ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) == 4,
"PcdDefaultTerminalType must be TTYTERM");
STATIC_ASSERT (FixedPcdGet8 (PcdUartDefaultParity) != 0,
"PcdUartDefaultParity must be set to an actual value, not 'default'");
STATIC_ASSERT (FixedPcdGet8 (PcdUartDefaultStopBits) != 0,
"PcdUartDefaultStopBits must be set to an actual value, not 'default'");
STATIC_ASSERT (
FixedPcdGet8 (PcdDefaultTerminalType) == 4,
"PcdDefaultTerminalType must be TTYTERM"
);
STATIC_ASSERT (
FixedPcdGet8 (PcdUartDefaultParity) != 0,
"PcdUartDefaultParity must be set to an actual value, not 'default'"
);
STATIC_ASSERT (
FixedPcdGet8 (PcdUartDefaultStopBits) != 0,
"PcdUartDefaultStopBits must be set to an actual value, not 'default'"
);
CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid);
EfiBootManagerUpdateConsoleVariable (ConIn,
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
EfiBootManagerUpdateConsoleVariable (ConOut,
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
EfiBootManagerUpdateConsoleVariable (ErrOut,
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
EfiBootManagerUpdateConsoleVariable (
ConIn,
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole,
NULL
);
EfiBootManagerUpdateConsoleVariable (
ConOut,
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole,
NULL
);
EfiBootManagerUpdateConsoleVariable (
ErrOut,
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole,
NULL
);
//
// Register platform-specific boot options and keyboard shortcuts.
@ -668,8 +759,11 @@ HandleCapsules (
DEBUG ((DEBUG_INFO, "%a: processing capsules ...\n", __FUNCTION__));
Status = gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL,
(VOID **)&EsrtManagement);
Status = gBS->LocateProtocol (
&gEsrtManagementProtocolGuid,
NULL,
(VOID **)&EsrtManagement
);
if (!EFI_ERROR (Status)) {
EsrtManagement->SyncEsrtFmp ();
}
@ -679,14 +773,22 @@ HandleCapsules (
//
HobPointer.Raw = GetHobList ();
NeedReset = FALSE;
while ((HobPointer.Raw = GetNextHob (EFI_HOB_TYPE_UEFI_CAPSULE,
HobPointer.Raw)) != NULL) {
while ((HobPointer.Raw = GetNextHob (
EFI_HOB_TYPE_UEFI_CAPSULE,
HobPointer.Raw
)) != NULL)
{
CapsuleHeader = (VOID *)(UINTN)HobPointer.Capsule->BaseAddress;
Status = ProcessCapsuleImage (CapsuleHeader);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: failed to process capsule %p - %r\n",
__FUNCTION__, CapsuleHeader, Status));
DEBUG ((
DEBUG_ERROR,
"%a: failed to process capsule %p - %r\n",
__FUNCTION__,
CapsuleHeader,
Status
));
return;
}
@ -695,15 +797,17 @@ HandleCapsules (
}
if (NeedReset) {
DEBUG ((DEBUG_WARN, "%a: capsule update successful, resetting ...\n",
__FUNCTION__));
DEBUG ((
DEBUG_WARN,
"%a: capsule update successful, resetting ...\n",
__FUNCTION__
));
gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
CpuDeadLoop ();
}
}
#define VERSION_STRING_PREFIX L"Tianocore/EDK2 firmware version "
/**
@ -776,8 +880,12 @@ BootDiscoveryPolicyHandler (
(VOID **)&BMPolicy
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "%a - Failed to locate gEfiBootManagerPolicyProtocolGuid."
"Driver connect will be skipped.\n", __FUNCTION__));
DEBUG ((
DEBUG_INFO,
"%a - Failed to locate gEfiBootManagerPolicyProtocolGuid."
"Driver connect will be skipped.\n",
__FUNCTION__
));
return Status;
}
@ -845,21 +953,33 @@ PlatformBootManagerAfterConsole (
Status = BootLogoEnableLogo ();
if (EFI_ERROR (Status)) {
if (FirmwareVerLength > 0) {
Print (VERSION_STRING_PREFIX L"%s\n",
PcdGetPtr (PcdFirmwareVersionString));
Print (
VERSION_STRING_PREFIX L"%s\n",
PcdGetPtr (PcdFirmwareVersionString)
);
}
Print (L"Press ESCAPE for boot options ");
} else if (FirmwareVerLength > 0) {
Status = gBS->HandleProtocol (gST->ConsoleOutHandle,
&gEfiGraphicsOutputProtocolGuid, (VOID **)&GraphicsOutput);
Status = gBS->HandleProtocol (
gST->ConsoleOutHandle,
&gEfiGraphicsOutputProtocolGuid,
(VOID **)&GraphicsOutput
);
if (!EFI_ERROR (Status)) {
PosX = (GraphicsOutput->Mode->Info->HorizontalResolution -
(StrLen (VERSION_STRING_PREFIX) + FirmwareVerLength) *
EFI_GLYPH_WIDTH) / 2;
PosY = 0;
PrintXY (PosX, PosY, NULL, NULL, VERSION_STRING_PREFIX L"%s",
PcdGetPtr (PcdFirmwareVersionString));
PrintXY (
PosX,
PosY,
NULL,
NULL,
VERSION_STRING_PREFIX L"%s",
PcdGetPtr (PcdFirmwareVersionString)
);
}
}
@ -943,8 +1063,10 @@ PlatformBootManagerUnableToBoot (
//
// Record the total number of boot configured boot options
//
BootOptions = EfiBootManagerGetLoadOptions (&OldBootOptionCount,
LoadOptionTypeBoot);
BootOptions = EfiBootManagerGetLoadOptions (
&OldBootOptionCount,
LoadOptionTypeBoot
);
EfiBootManagerFreeLoadOptions (BootOptions, OldBootOptionCount);
//
@ -956,8 +1078,10 @@ PlatformBootManagerUnableToBoot (
//
// Record the updated number of boot configured boot options
//
BootOptions = EfiBootManagerGetLoadOptions (&NewBootOptionCount,
LoadOptionTypeBoot);
BootOptions = EfiBootManagerGetLoadOptions (
&NewBootOptionCount,
LoadOptionTypeBoot
);
EfiBootManagerFreeLoadOptions (BootOptions, NewBootOptionCount);
//
@ -969,8 +1093,11 @@ PlatformBootManagerUnableToBoot (
//
if (!PcdGetBool (PcdEmuVariableNvModeEnable)) {
if (NewBootOptionCount != OldBootOptionCount) {
DEBUG ((DEBUG_WARN, "%a: rebooting after refreshing all boot options\n",
__FUNCTION__));
DEBUG ((
DEBUG_WARN,
"%a: rebooting after refreshing all boot options\n",
__FUNCTION__
));
gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
}
}

5
ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c
View File

@ -39,6 +39,7 @@ WriteStringToFile (
// This gets you all the symbols except for SEC. To get SEC symbols you need to copy the
// debug print in the SEC into the debugger manually
SemihostWriteString (Buffer);
/*
I'm currently having issues with this code crashing the debugger. Seems like it should work.
@ -51,7 +52,6 @@ WriteStringToFile (
*/
}
/**
If the build is done on cygwin the paths are cygpaths.
/cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
@ -95,7 +95,6 @@ DeCygwinPathIfNeeded (
return Name;
}
/**
Performs additional actions after a PE/COFF image has been loaded and relocated.
@ -123,8 +122,6 @@ PeCoffLoaderRelocateImageExtraAction (
WriteStringToFile (Buffer, AsciiStrSize (Buffer));
}
/**
Performs additional actions just before a PE/COFF image is unloaded. Any resources
that were allocated by PeCoffLoaderRelocateImageExtraAction() must be freed.

10
ArmPkg/Library/SemiHostingDebugLib/DebugLib.c
View File

@ -7,7 +7,6 @@
**/
#include <Uefi.h>
#include <Library/DebugLib.h>
#include <Library/PrintLib.h>
@ -56,7 +55,6 @@ DebugPrint (
VA_END (Marker);
}
/**
Prints a debug message to the debug output device if the specified
error level is enabled base on Null-terminated format string and a
@ -108,7 +106,6 @@ DebugPrintMarker (
SemihostWriteString (AsciiBuffer);
}
/**
Prints a debug message to the debug output device if the specified
error level is enabled.
@ -135,7 +132,6 @@ DebugVPrint (
DebugPrintMarker (ErrorLevel, Format, VaListMarker, NULL);
}
/**
Prints a debug message to the debug output device if the specified
error level is enabled.
@ -164,7 +160,6 @@ DebugBPrint (
DebugPrintMarker (ErrorLevel, Format, mVaListNull, BaseListMarker);
}
/**
Prints an assert message containing a filename, line number, and description.
@ -215,7 +210,6 @@ DebugAssert (
}
}
/**
Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
@ -251,7 +245,6 @@ DebugClearMemory (
return SetMem (Buffer, Length, PcdGet8 (PcdDebugClearMemoryValue));
}
/**
Returns TRUE if ASSERT() macros are enabled.
@ -272,7 +265,6 @@ DebugAssertEnabled (
return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
}
/**
Returns TRUE if DEBUG()macros are enabled.
@ -293,7 +285,6 @@ DebugPrintEnabled (
return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
}
/**
Returns TRUE if DEBUG_CODE()macros are enabled.
@ -314,7 +305,6 @@ DebugCodeEnabled (
return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
}
/**
Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.

17
ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c
View File

@ -13,7 +13,6 @@
#include <Library/SemihostLib.h>
#include <Library/SerialPortLib.h>
/*
Programmed hardware of Serial port.
@ -63,12 +62,10 @@ SerialPortWrite (
SourceIndex = 0;
DestinationIndex = 0;
while (SourceIndex < NumberOfBytes)
{
while (SourceIndex < NumberOfBytes) {
CurrentCharacter = Buffer[SourceIndex++];
switch (CurrentCharacter)
{
switch (CurrentCharacter) {
case '\r':
continue;
@ -81,8 +78,7 @@ SerialPortWrite (
break;
}
if (DestinationIndex > PRINT_BUFFER_THRESHOLD)
{
if (DestinationIndex > PRINT_BUFFER_THRESHOLD) {
PrintBuffer[DestinationIndex] = '\0';
SemihostWriteString ((CHAR8 *)PrintBuffer);
@ -90,8 +86,7 @@ SerialPortWrite (
}
}
if (DestinationIndex > 0)
{
if (DestinationIndex > 0) {
PrintBuffer[DestinationIndex] = '\0';
SemihostWriteString ((CHAR8 *)PrintBuffer);
}
@ -99,7 +94,6 @@ SerialPortWrite (
return NumberOfBytes;
}
/**
Read data from serial device and save the datas in buffer.
@ -121,8 +115,6 @@ SerialPortRead (
return 1;
}
/**
Check to see if any data is available to be read from the debug device.
@ -139,4 +131,3 @@ SerialPortPoll (
// Since SemiHosting read character is blocking always say we have a char ready?
return SemihostConnectionSupported ();
}

5
ArmPkg/Library/SemihostLib/SemihostLib.c
View File

@ -124,11 +124,12 @@ SemihostFileWrite (
*Length = SEMIHOST_SYS_WRITE (&WriteBlock);
if (*Length != 0)
if (*Length != 0) {
return RETURN_ABORTED;
else
} else {
return RETURN_SUCCESS;
}
}
RETURN_STATUS
SemihostFileClose (

10
ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c
View File

@ -256,6 +256,7 @@ ArmSetMemoryRegionNoExec (
MemoryAttributes | CodePermission
);
}
return Status;
}
@ -278,6 +279,7 @@ ArmClearMemoryRegionNoExec (
MemoryAttributes & ~CodePermission
);
}
return Status;
}
@ -300,6 +302,7 @@ ArmSetMemoryRegionReadOnly (
MemoryAttributes | DataPermission
);
}
return Status;
}
@ -315,13 +318,16 @@ ArmClearMemoryRegionReadOnly (
Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
if (!EFI_ERROR (Status)) {
PermissionRequest = SET_MEM_ATTR_MAKE_PERM_REQUEST (SET_MEM_ATTR_DATA_PERM_RW,
MemoryAttributes);
PermissionRequest = SET_MEM_ATTR_MAKE_PERM_REQUEST (
SET_MEM_ATTR_DATA_PERM_RW,
MemoryAttributes
);
return RequestMemoryPermissionChange (
BaseAddress,
Length,
PermissionRequest
);
}
return Status;
}

1
ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
View File

@ -15,7 +15,6 @@
#include <Library/HiiLib.h>
#include <Library/OemMiscLib.h>
/** Gets the CPU frequency of the specified processor.
@param ProcessorIndex Index of the processor to get the frequency for.

101
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
View File

@ -148,22 +148,27 @@ GetCacheSocketStr (
{
UINTN CacheSocketStrLen;
if (CacheLevel == CpuCacheL1 && !DataCache && !UnifiedCache) {
if ((CacheLevel == CpuCacheL1) && !DataCache && !UnifiedCache) {
CacheSocketStrLen = UnicodeSPrint (
CacheSocketStr,
SMBIOS_STRING_MAX_LENGTH - 1,
L"L%x Instruction Cache",
CacheLevel);
} else if (CacheLevel == CpuCacheL1 && DataCache) {
CacheSocketStrLen = UnicodeSPrint (CacheSocketStr,
CacheLevel
);
} else if ((CacheLevel == CpuCacheL1) && DataCache) {
CacheSocketStrLen = UnicodeSPrint (
CacheSocketStr,
SMBIOS_STRING_MAX_LENGTH - 1,
L"L%x Data Cache",
CacheLevel);
CacheLevel
);
} else {
CacheSocketStrLen = UnicodeSPrint (CacheSocketStr,
CacheSocketStrLen = UnicodeSPrint (
CacheSocketStr,
SMBIOS_STRING_MAX_LENGTH - 1,
L"L%x Cache",
CacheLevel);
CacheLevel
);
}
return CacheSocketStrLen;
@ -201,12 +206,14 @@ ConfigureCacheArchitectureInformation (
ASSERT (FALSE);
}
CacheSize64 = SmbiosProcessorGetCacheSize (CacheLevel,
CacheSize64 = SmbiosProcessorGetCacheSize (
CacheLevel,
DataCache,
UnifiedCache
);
Associativity = SmbiosProcessorGetCacheAssociativity (CacheLevel,
Associativity = SmbiosProcessorGetCacheAssociativity (
CacheLevel,
DataCache,
UnifiedCache
);
@ -278,7 +285,6 @@ ConfigureCacheArchitectureInformation (
(CacheLevel - 1);
}
/** Allocates and initializes an SMBIOS_TABLE_TYPE7 structure.
@param[in] CacheLevel The cache level (L1-L7).
@ -308,10 +314,12 @@ AllocateAndInitCacheInformation (
return NULL;
}
CacheSocketStrLen = GetCacheSocketStr (CacheLevel,
CacheSocketStrLen = GetCacheSocketStr (
CacheLevel,
DataCache,
UnifiedCache,
CacheSocketStr);
CacheSocketStr
);
TableSize = sizeof (SMBIOS_TABLE_TYPE7) + CacheSocketStrLen + 1 + 1;
Type7Record = AllocateZeroPool (TableSize);
@ -385,11 +393,12 @@ AddSmbiosCacheTypeTable (
// process the instruction cache.
for (DataCacheType = 0; DataCacheType <= 1; DataCacheType++) {
// If there's no separate data/instruction cache, skip the second iteration
if (DataCacheType == 1 && !SeparateCaches) {
if ((DataCacheType == 1) && !SeparateCaches) {
continue;
}
Type7Record = AllocateAndInitCacheInformation (CacheLevel,
Type7Record = AllocateAndInitCacheInformation (
CacheLevel,
DataCacheType,
!SeparateCaches
);
@ -397,22 +406,33 @@ AddSmbiosCacheTypeTable (
continue;
}
ConfigureCacheArchitectureInformation(CacheLevel,
ConfigureCacheArchitectureInformation (
CacheLevel,
DataCacheType,
!SeparateCaches,
Type7Record
);
// Allow the platform to fill in other information such as speed, SRAM type etc.
if (!OemGetCacheInformation (ProcessorIndex, CacheLevel,
DataCacheType, !SeparateCaches, Type7Record)) {
if (!OemGetCacheInformation (
ProcessorIndex,
CacheLevel,
DataCacheType,
!SeparateCaches,
Type7Record
))
{
continue;
}
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
// Finally, install the table
Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle,
(EFI_SMBIOS_TABLE_HEADER *)Type7Record);
Status = mSmbios->Add (
mSmbios,
NULL,
&SmbiosHandle,
(EFI_SMBIOS_TABLE_HEADER *)Type7Record
);
if (EFI_ERROR (Status)) {
continue;
}
@ -504,8 +524,12 @@ AllocateType4AndSetProcessorInformationStrings (
return EFI_OUT_OF_RESOURCES;
}
ProcessorStrLen = UnicodeSPrint (ProcessorStr, StringBufferSize,
L"CPU%02d", ProcessorIndex + 1);
ProcessorStrLen = UnicodeSPrint (
ProcessorStr,
StringBufferSize,
L"CPU%02d",
ProcessorIndex + 1
);
// Processor Manufacture
ProcessorManuStr = HiiGetPackageString (&gEfiCallerIdGuid, ProcessorManu, NULL);
@ -643,15 +667,21 @@ AddSmbiosProcessorTypeTable (
return Status;
}
OemGetProcessorInformation (ProcessorIndex,
OemGetProcessorInformation (
ProcessorIndex,
&ProcessorStatus,
(PROCESSOR_CHARACTERISTIC_FLAGS *)
&Type4Record->ProcessorCharacteristics,
&MiscProcessorData);
&MiscProcessorData
);
if (ProcessorPopulated) {
AddSmbiosCacheTypeTable (ProcessorIndex, &L1CacheHandle,
&L2CacheHandle, &L3CacheHandle);
AddSmbiosCacheTypeTable (
ProcessorIndex,
&L1CacheHandle,
&L2CacheHandle,
&L3CacheHandle
);
}
LegacyVoltage = (UINT8 *)&Type4Record->Voltage;
@ -684,13 +714,23 @@ AddSmbiosProcessorTypeTable (
Type4Record->ProcessorFamily2 = SmbiosGetProcessorFamily2 ();
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle,
(EFI_SMBIOS_TABLE_HEADER *)Type4Record);
Status = mSmbios->Add (
mSmbios,
NULL,
&SmbiosHandle,
(EFI_SMBIOS_TABLE_HEADER *)Type4Record
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type04 Table Log Failed! %r \n",
__FUNCTION__, DEBUG_LINE_NUMBER, Status));
DEBUG ((
DEBUG_ERROR,
"[%a]:[%dL] Smbios Type04 Table Log Failed! %r \n",
__FUNCTION__,
DEBUG_LINE_NUMBER,
Status
));
}
FreePool (Type4Record);
return Status;
@ -727,7 +767,8 @@ ProcessorSubClassEntryPoint(
//
// Add our default strings to the HII database. They will be modified later.
//
mHiiHandle = HiiAddPackages (&gEfiCallerIdGuid,
mHiiHandle = HiiAddPackages (
&gEfiCallerIdGuid,
NULL,
ProcessorSubClassStrings,
NULL,

20
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessor.h
View File

@ -69,34 +69,44 @@ SmbiosProcessorGetCacheAssociativity (
@return Processor ID.
**/
UINT64
SmbiosGetProcessorId (VOID);
SmbiosGetProcessorId (
VOID
);
/** Returns the external clock frequency.
@return The external CPU clock frequency.
**/
UINTN
SmbiosGetExternalClockFrequency (VOID);
SmbiosGetExternalClockFrequency (
VOID
);
/** Returns the SMBIOS ProcessorFamily field value.
@return The value for the ProcessorFamily field.
**/
UINT8
SmbiosGetProcessorFamily (VOID);
SmbiosGetProcessorFamily (
VOID
);
/** Returns the ProcessorFamily2 field value.
@return The value for the ProcessorFamily2 field.
**/
UINT16
SmbiosGetProcessorFamily2 (VOID);
SmbiosGetProcessorFamily2 (
VOID
);
/** Returns the SMBIOS Processor Characteristics.
@return Processor Characteristics bitfield.
**/
PROCESSOR_CHARACTERISTIC_FLAGS
SmbiosGetProcessorCharacteristics (VOID);
SmbiosGetProcessorCharacteristics (
VOID
);
#endif // SMBIOS_PROCESSOR_H_

1
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorAArch64.c
View File

@ -90,4 +90,3 @@ SmbiosProcessorGetCacheAssociativity (
return Associativity;
}

1
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c
View File

@ -94,4 +94,3 @@ SmbiosProcessorGetCacheAssociativity (
return Associativity;
}

2
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c
View File

@ -98,7 +98,7 @@ HasSmcArm64SocId (
ArmCallSmc (&Args);
SmcCallStatus = (INT32)Args.Arg0;
if (SmcCallStatus < 0 || (SmcCallStatus >> 16) >= 1) {
if ((SmcCallStatus < 0) || ((SmcCallStatus >> 16) >= 1)) {
Args.Arg0 = SMCCC_ARCH_FEATURES;
Args.Arg1 = SMCCC_ARCH_SOC_ID;
ArmCallSmc (&Args);

4
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h
View File

@ -25,7 +25,6 @@ typedef EFI_STATUS (EFIAPI SMBIOS_MISC_DATA_FUNCTION) (
IN EFI_SMBIOS_PROTOCOL *Smbios
);
//
// Data table entry definition.
//
@ -37,7 +36,6 @@ typedef struct {
SMBIOS_MISC_DATA_FUNCTION *Function;
} SMBIOS_MISC_DATA_TABLE;
//
// SMBIOS table extern definitions
//
@ -45,7 +43,6 @@ typedef struct {
extern NAME1 NAME2 ## Data; \
extern SMBIOS_MISC_DATA_FUNCTION NAME3 ## Function;
//
// SMBIOS data table entries
//
@ -81,7 +78,6 @@ typedef struct _SMBIOS_TYPE13_BIOS_LANGUAGE_INFORMATION_STRING{
EFI_STRING_ID InstallableLanguageAbbreviateString;
} SMBIOS_TYPE13_BIOS_LANGUAGE_INFORMATION_STRING;
/**
Adds an SMBIOS record.

74
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c
View File

@ -13,48 +13,70 @@
#include "SmbiosMisc.h"
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE0,
SMBIOS_MISC_TABLE_EXTERNS (
SMBIOS_TABLE_TYPE0,
MiscBiosVendor,
MiscBiosVendor)
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE1,
MiscBiosVendor
)
SMBIOS_MISC_TABLE_EXTERNS (
SMBIOS_TABLE_TYPE1,
MiscSystemManufacturer,
MiscSystemManufacturer)
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE3,
MiscSystemManufacturer
)
SMBIOS_MISC_TABLE_EXTERNS (
SMBIOS_TABLE_TYPE3,
MiscChassisManufacturer,
MiscChassisManufacturer)
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE2,
MiscChassisManufacturer
)
SMBIOS_MISC_TABLE_EXTERNS (
SMBIOS_TABLE_TYPE2,
MiscBaseBoardManufacturer,
MiscBaseBoardManufacturer)
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE13,
MiscBaseBoardManufacturer
)
SMBIOS_MISC_TABLE_EXTERNS (
SMBIOS_TABLE_TYPE13,
MiscNumberOfInstallableLanguages,
MiscNumberOfInstallableLanguages)
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE32,
MiscNumberOfInstallableLanguages
)
SMBIOS_MISC_TABLE_EXTERNS (
SMBIOS_TABLE_TYPE32,
MiscBootInformation,
MiscBootInformation)
MiscBootInformation
)
SMBIOS_MISC_DATA_TABLE mSmbiosMiscDataTable[] = {
// Type0
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBiosVendor,
MiscBiosVendor),
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (
MiscBiosVendor,
MiscBiosVendor
),
// Type1
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscSystemManufacturer,
MiscSystemManufacturer),
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (
MiscSystemManufacturer,
MiscSystemManufacturer
),
// Type3
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscChassisManufacturer,
MiscChassisManufacturer),
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (
MiscChassisManufacturer,
MiscChassisManufacturer
),
// Type2
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBaseBoardManufacturer,
MiscBaseBoardManufacturer),
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (
MiscBaseBoardManufacturer,
MiscBaseBoardManufacturer
),
// Type13
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscNumberOfInstallableLanguages,
MiscNumberOfInstallableLanguages),
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (
MiscNumberOfInstallableLanguages,
MiscNumberOfInstallableLanguages
),
// Type32
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBootInformation,
MiscBootInformation),
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (
MiscBootInformation,
MiscBootInformation
),
};
//
// Number of Data Table entries.
//

32
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c
View File

@ -21,7 +21,6 @@
#include "SmbiosMisc.h"
STATIC EFI_HANDLE mSmbiosMiscImageHandle;
STATIC EFI_SMBIOS_PROTOCOL *mSmbiosMiscSmbios = NULL;
@ -49,14 +48,18 @@ SmbiosMiscEntryPoint(
mSmbiosMiscImageHandle = ImageHandle;
EfiStatus = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL,
(VOID**)&mSmbiosMiscSmbios);
EfiStatus = gBS->LocateProtocol (
&gEfiSmbiosProtocolGuid,
NULL,
(VOID **)&mSmbiosMiscSmbios
);
if (EFI_ERROR (EfiStatus)) {
DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol. %r\n", EfiStatus));
return EfiStatus;
}
mSmbiosMiscHiiHandle = HiiAddPackages (&gEfiCallerIdGuid,
mSmbiosMiscHiiHandle = HiiAddPackages (
&gEfiCallerIdGuid,
mSmbiosMiscImageHandle,
SmbiosMiscDxeStrings,
NULL
@ -70,13 +73,19 @@ SmbiosMiscEntryPoint(
// If the entry have a function pointer, just log the data.
//
if (mSmbiosMiscDataTable[Index].Function != NULL) {
EfiStatus = (*mSmbiosMiscDataTable[Index].Function)(mSmbiosMiscDataTable[Index].RecordData,
EfiStatus = (*mSmbiosMiscDataTable[Index].Function)(
mSmbiosMiscDataTable[Index].RecordData,
mSmbiosMiscSmbios
);
if (EFI_ERROR (EfiStatus)) {
DEBUG ((DEBUG_ERROR, "Misc smbios store error. Index=%d,"
"ReturnStatus=%r\n", Index, EfiStatus));
DEBUG ((
DEBUG_ERROR,
"Misc smbios store error. Index=%d,"
"ReturnStatus=%r\n",
Index,
EfiStatus
));
return EfiStatus;
}
}
@ -85,7 +94,6 @@ SmbiosMiscEntryPoint(
return EfiStatus;
}
/**
Adds an SMBIOS record.
@ -132,7 +140,6 @@ SmbiosMiscAddRecord (
return Status;
}
/** Fetches the number of handles of the specified SMBIOS type.
*
* @param SmbiosType The type of SMBIOS record to look for.
@ -155,7 +162,8 @@ GetHandleCount (
// Iterate through entries to get the number
do {
Status = mSmbiosMiscSmbios->GetNext (mSmbiosMiscSmbios,
Status = mSmbiosMiscSmbios->GetNext (
mSmbiosMiscSmbios,
&SmbiosHandle,
&SmbiosType,
&Record,
@ -206,7 +214,8 @@ SmbiosMiscGetLinkTypeHandle(
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
for (Index = 0; Index < (*HandleCount); Index++) {
Status = mSmbiosMiscSmbios->GetNext (mSmbiosMiscSmbios,
Status = mSmbiosMiscSmbios->GetNext (
mSmbiosMiscSmbios,
&SmbiosHandle,
&SmbiosType,
&Record,
@ -220,4 +229,3 @@ SmbiosMiscGetLinkTypeHandle(
}
}
}

2
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c
View File

@ -11,10 +11,8 @@
**/
#include "SmbiosMisc.h"
//
// Static (possibly build generated) Bios Vendor data.
//

23
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c
View File

@ -18,7 +18,6 @@
#include "SmbiosMisc.h"
typedef struct {
CONST CHAR8 *MonthStr;
UINT32 MonthInt;
@ -111,7 +110,8 @@ GetBiosReleaseDate (
GetReleaseTime (&BuildTime);
(VOID)UnicodeSPrintAsciiFormat (ReleaseDate,
(VOID)UnicodeSPrintAsciiFormat (
ReleaseDate,
(sizeof (CHAR16)) * SMBIOS_STRING_MAX_LENGTH,
"%02d/%02d/%4d",
BuildTime.Month,
@ -140,7 +140,6 @@ GetBiosVersion (
return ReleaseString;
}
/**
This function makes boot time changes to the contents of the
MiscBiosVendor (Type 0) record.
@ -153,8 +152,7 @@ GetBiosVersion (
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION (MiscBiosVendor)
{
SMBIOS_MISC_TABLE_FUNCTION (MiscBiosVendor) {
CHAR8 *OptionalStrStart;
CHAR8 *StrStart;
UINTN VendorStrLen;
@ -226,9 +224,11 @@ SMBIOS_MISC_TABLE_FUNCTION (MiscBiosVendor)
//
// Two zeros following the last string.
//
SmbiosRecord = AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE0) + VendorStrLen + 1 +
SmbiosRecord = AllocateZeroPool (
sizeof (SMBIOS_TABLE_TYPE0) + VendorStrLen + 1 +
VerStrLen + 1 +
DateStrLen + 1 + 1);
DateStrLen + 1 + 1
);
if (SmbiosRecord == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Exit;
@ -270,8 +270,13 @@ SMBIOS_MISC_TABLE_FUNCTION (MiscBiosVendor)
//
Status = SmbiosMiscAddRecord ((UINT8 *)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type00 Table Log Failed! %r \n",
__FUNCTION__, DEBUG_LINE_NUMBER, Status));
DEBUG ((
DEBUG_ERROR,
"[%a]:[%dL] Smbios Type00 Table Log Failed! %r \n",
__FUNCTION__,
DEBUG_LINE_NUMBER,
Status
));
}
FreePool (SmbiosRecord);

1
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerData.c
View File

@ -13,7 +13,6 @@
#include "SmbiosMisc.h"
//
// Static (possibly build generated) System Manufacturer data.
//

36
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerFunction.c
View File

@ -35,8 +35,7 @@
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION(MiscSystemManufacturer)
{
SMBIOS_MISC_TABLE_FUNCTION (MiscSystemManufacturer) {
CHAR8 *OptionalStrStart;
CHAR8 *StrStart;
UINTN ManuStrLen;
@ -83,18 +82,26 @@ SMBIOS_MISC_TABLE_FUNCTION(MiscSystemManufacturer)
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, pVersion, NULL);
}
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_SYSTEM_SERIAL_NUMBER),
SerialNumType01);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
SerialNumType01
);
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_SYSTEM_MANUFACTURER),
SystemManufacturerType01);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
SystemManufacturerType01
);
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_SYSTEM_SKU_NUMBER),
SkuNumberType01);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
SkuNumberType01
);
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_SYSTEM_FAMILY),
FamilyType01);
FamilyType01
);
TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_MANUFACTURER);
Manufacturer = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
@ -161,8 +168,13 @@ SMBIOS_MISC_TABLE_FUNCTION(MiscSystemManufacturer)
//
Status = SmbiosMiscAddRecord ((UINT8 *)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type01 Table Log Failed! %r \n",
__FUNCTION__, DEBUG_LINE_NUMBER, Status));
DEBUG ((
DEBUG_ERROR,
"[%a]:[%dL] Smbios Type01 Table Log Failed! %r \n",
__FUNCTION__,
DEBUG_LINE_NUMBER,
Status
));
}
FreePool (SmbiosRecord);

38
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerFunction.c
View File

@ -23,7 +23,6 @@
#include "SmbiosMisc.h"
/**
This function makes boot time changes to the contents of the
MiscBaseBoardManufacturer (Type 2) record.
@ -36,8 +35,7 @@
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION(MiscBaseBoardManufacturer)
{
SMBIOS_MISC_TABLE_FUNCTION (MiscBaseBoardManufacturer) {
CHAR8 *OptionalStrStart;
CHAR8 *StrStart;
UINTN RecordLength;
@ -93,27 +91,33 @@ SMBIOS_MISC_TABLE_FUNCTION(MiscBaseBoardManufacturer)
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Version, NULL);
}
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_ASSET_TAG),
AssertTagType02
);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_NUMBER),
SerialNumberType02
);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER),
BoardManufacturerType02
);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_NUMBER),
SerialNumberType02
);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_SKU_NUMBER),
SerialNumberType02
);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_CHASSIS_LOCATION),
ChassisLocationType02
);
@ -165,8 +169,11 @@ SMBIOS_MISC_TABLE_FUNCTION(MiscBaseBoardManufacturer)
// Update Contained objects Handle
//
SmbiosRecord->NumberOfContainedObjectHandles = 0;
SmbiosMiscGetLinkTypeHandle (EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, &HandleArray,
&HandleCount);
SmbiosMiscGetLinkTypeHandle (
EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE,
&HandleArray,
&HandleCount
);
// It's assumed there's at most a single chassis
ASSERT (HandleCount < 2);
if (HandleCount > 0) {
@ -195,8 +202,13 @@ SMBIOS_MISC_TABLE_FUNCTION(MiscBaseBoardManufacturer)
Status = SmbiosMiscAddRecord ((UINT8 *)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type02 Table Log Failed! %r \n",
__FUNCTION__, DEBUG_LINE_NUMBER, Status));
DEBUG ((
DEBUG_ERROR,
"[%a]:[%dL] Smbios Type02 Table Log Failed! %r \n",
__FUNCTION__,
DEBUG_LINE_NUMBER,
Status
));
}
FreePool (SmbiosRecord);

1
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerData.c
View File

@ -13,7 +13,6 @@
#include "SmbiosMisc.h"
//
// Static (possibly build generated) Chassis Manufacturer data.
//

12
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFunction.c
View File

@ -35,8 +35,7 @@
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION(MiscChassisManufacturer)
{
SMBIOS_MISC_TABLE_FUNCTION (MiscChassisManufacturer) {
CHAR8 *OptionalStrStart;
CHAR8 *StrStart;
UINT8 *SkuNumberField;
@ -177,8 +176,13 @@ SMBIOS_MISC_TABLE_FUNCTION(MiscChassisManufacturer)
//
Status = SmbiosMiscAddRecord ((UINT8 *)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type03 Table Log Failed! %r \n",
__FUNCTION__, DEBUG_LINE_NUMBER, Status));
DEBUG ((
DEBUG_ERROR,
"[%a]:[%dL] Smbios Type03 Table Log Failed! %r \n",
__FUNCTION__,
DEBUG_LINE_NUMBER,
Status
));
}
FreePool (SmbiosRecord);

18
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c
View File

@ -39,7 +39,7 @@ GetNextLanguage (
UINTN Index;
CHAR8 *StringPtr;
if (LangCode == NULL || *LangCode == NULL || Lang == NULL) {
if ((LangCode == NULL) || (*LangCode == NULL) || (Lang == NULL)) {
return;
}
@ -55,6 +55,7 @@ GetNextLanguage (
if (StringPtr[Index] == ';') {
Index++;
}
*LangCode = StringPtr + Index;
}
@ -90,13 +91,14 @@ GetSupportedLanguageNumber (
GetNextLanguage (&LanguageString, Lang);
LangNumber++;
}
FreePool (Lang);
}
FreePool (Languages);
return LangNumber;
}
/**
This function makes boot time changes to the contents of the
MiscNumberOfInstallableLanguages (Type 13) record.
@ -109,8 +111,7 @@ GetSupportedLanguageNumber (
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION(MiscNumberOfInstallableLanguages)
{
SMBIOS_MISC_TABLE_FUNCTION (MiscNumberOfInstallableLanguages) {
UINTN LangStrLen;
CHAR8 CurrentLang[SMBIOS_STRING_MAX_LENGTH + 1];
CHAR8 *OptionalStrStart;
@ -157,8 +158,13 @@ SMBIOS_MISC_TABLE_FUNCTION(MiscNumberOfInstallableLanguages)
//
Status = SmbiosMiscAddRecord ((UINT8 *)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type13 Table Log Failed! %r \n",
__FUNCTION__, DEBUG_LINE_NUMBER, Status));
DEBUG ((
DEBUG_ERROR,
"[%a]:[%dL] Smbios Type13 Table Log Failed! %r \n",
__FUNCTION__,
DEBUG_LINE_NUMBER,
Status
));
}
FreePool (SmbiosRecord);

12
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFunction.c
View File

@ -33,8 +33,7 @@
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION(MiscBootInformation)
{
SMBIOS_MISC_TABLE_FUNCTION (MiscBootInformation) {
EFI_STATUS Status;
SMBIOS_TABLE_TYPE32 *SmbiosRecord;
SMBIOS_TABLE_TYPE32 *InputData;
@ -67,8 +66,13 @@ SMBIOS_MISC_TABLE_FUNCTION(MiscBootInformation)
//
Status = SmbiosMiscAddRecord ((UINT8 *)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type32 Table Log Failed! %r \n",
__FUNCTION__, DEBUG_LINE_NUMBER, Status));
DEBUG ((
DEBUG_ERROR,
"[%a]:[%dL] Smbios Type32 Table Log Failed! %r \n",
__FUNCTION__,
DEBUG_LINE_NUMBER,
Status
));
}
FreePool (SmbiosRecord);