Code refinement.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10647 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
@@ -136,7 +136,7 @@ CommonExceptionHandler (
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"!!!! IA32 Exception Type - %08x !!!!\n",
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"!!!! IA32 Exception Type - %08x !!!!\n",
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InterruptType
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InterruptType
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));
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));
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if (mErrorCodeFlag & (1 << InterruptType)) {
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if ((mErrorCodeFlag & (1 << InterruptType)) != 0) {
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DEBUG ((
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DEBUG ((
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EFI_D_ERROR,
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EFI_D_ERROR,
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"ExceptionData - %08x\n",
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"ExceptionData - %08x\n",
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@@ -217,7 +217,7 @@ CommonExceptionHandler (
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"!!!! X64 Exception Type - %016lx !!!!\n",
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"!!!! X64 Exception Type - %016lx !!!!\n",
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(UINT64)InterruptType
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(UINT64)InterruptType
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));
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));
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if (mErrorCodeFlag & (1 << InterruptType)) {
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if ((mErrorCodeFlag & (1 << InterruptType)) != 0) {
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DEBUG ((
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DEBUG ((
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EFI_D_ERROR,
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EFI_D_ERROR,
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"ExceptionData - %016lx\n",
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"ExceptionData - %016lx\n",
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@@ -676,11 +676,11 @@ InitializeMtrrMask (
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}
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}
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/**
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/**
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Gets GCD Mem Space type from MTRR Type
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Gets GCD Mem Space type from MTRR Type.
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This function gets GCD Mem Space type from MTRR Type
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This function gets GCD Mem Space type from MTRR Type.
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@param MtrrAttribute MTRR memory type
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@param MtrrAttributes MTRR memory type
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@return GCD Mem Space type
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@return GCD Mem Space type
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@@ -1009,7 +1009,6 @@ RefreshGcdMemoryAttributes (
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Initialize Interrupt Descriptor Table for interrupt handling.
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Initialize Interrupt Descriptor Table for interrupt handling.
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**/
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**/
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STATIC
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VOID
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VOID
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InitInterruptDescriptorTable (
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InitInterruptDescriptorTable (
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VOID
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VOID
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@@ -1,7 +1,7 @@
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/** @file
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/** @file
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CPU DXE Module.
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CPU DXE Module.
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Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
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@@ -12,8 +12,8 @@
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|
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**/
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**/
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#ifndef _CPU_DXE_H
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#ifndef _CPU_DXE_H_
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#define _CPU_DXE_H
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#define _CPU_DXE_H_
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#include <PiDxe.h>
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#include <PiDxe.h>
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@@ -42,9 +42,21 @@
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)
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)
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//
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/**
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// Function declarations
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Flush CPU data cache. If the instruction cache is fully coherent
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//
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with all DMA operations then function can just return EFI_SUCCESS.
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|
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@param This Protocol instance structure
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@param Start Physical address to start flushing from.
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@param Length Number of bytes to flush. Round up to chipset
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granularity.
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@param FlushType Specifies the type of flush operation to perform.
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@retval EFI_SUCCESS If cache was flushed
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@retval EFI_UNSUPPORTED If flush type is not supported.
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@retval EFI_DEVICE_ERROR If requested range could not be flushed.
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**/
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EFI_STATUS
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EFI_STATUS
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EFIAPI
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EFIAPI
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CpuFlushCpuDataCache (
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CpuFlushCpuDataCache (
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@@ -54,18 +66,46 @@ CpuFlushCpuDataCache (
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IN EFI_CPU_FLUSH_TYPE FlushType
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IN EFI_CPU_FLUSH_TYPE FlushType
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);
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);
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/**
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Enables CPU interrupts.
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@param This Protocol instance structure
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@retval EFI_SUCCESS If interrupts were enabled in the CPU
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@retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
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**/
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EFI_STATUS
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EFI_STATUS
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EFIAPI
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EFIAPI
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CpuEnableInterrupt (
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CpuEnableInterrupt (
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IN EFI_CPU_ARCH_PROTOCOL *This
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IN EFI_CPU_ARCH_PROTOCOL *This
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);
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);
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/**
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Disables CPU interrupts.
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@param This Protocol instance structure
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@retval EFI_SUCCESS If interrupts were disabled in the CPU.
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@retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
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**/
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EFI_STATUS
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EFI_STATUS
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EFIAPI
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EFIAPI
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CpuDisableInterrupt (
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CpuDisableInterrupt (
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IN EFI_CPU_ARCH_PROTOCOL *This
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IN EFI_CPU_ARCH_PROTOCOL *This
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);
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);
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/**
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Return the state of interrupts.
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@param This Protocol instance structure
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@param State Pointer to the CPU's current interrupt state
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@retval EFI_SUCCESS If interrupts were disabled in the CPU.
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@retval EFI_INVALID_PARAMETER State is NULL.
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**/
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EFI_STATUS
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EFI_STATUS
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EFIAPI
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EFIAPI
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CpuGetInterruptState (
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CpuGetInterruptState (
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@@ -73,6 +113,18 @@ CpuGetInterruptState (
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OUT BOOLEAN *State
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OUT BOOLEAN *State
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);
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);
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/**
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Generates an INIT to the CPU.
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@param This Protocol instance structure
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@param InitType Type of CPU INIT to perform
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@retval EFI_SUCCESS If CPU INIT occurred. This value should never be
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|
seen.
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@retval EFI_DEVICE_ERROR If CPU INIT failed.
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@retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
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|
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|
**/
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EFI_STATUS
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EFI_STATUS
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EFIAPI
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EFIAPI
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CpuInit (
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CpuInit (
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@@ -80,6 +132,26 @@ CpuInit (
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IN EFI_CPU_INIT_TYPE InitType
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IN EFI_CPU_INIT_TYPE InitType
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);
|
);
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|
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|
/**
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Registers a function to be called from the CPU interrupt handler.
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@param This Protocol instance structure
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@param InterruptType Defines which interrupt to hook. IA-32
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|
valid range is 0x00 through 0xFF
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@param InterruptHandler A pointer to a function of type
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|
EFI_CPU_INTERRUPT_HANDLER that is called
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|
when a processor interrupt occurs. A null
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|
pointer is an error condition.
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|
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@retval EFI_SUCCESS If handler installed or uninstalled.
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@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
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for InterruptType was previously installed.
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@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
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InterruptType was not previously installed.
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@retval EFI_UNSUPPORTED The interrupt specified by InterruptType
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is not supported.
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|
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|
**/
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EFI_STATUS
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EFI_STATUS
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EFIAPI
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EFIAPI
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CpuRegisterInterruptHandler (
|
CpuRegisterInterruptHandler (
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@@ -88,6 +160,29 @@ CpuRegisterInterruptHandler (
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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);
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);
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|
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|
/**
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|
Returns a timer value from one of the CPU's internal timers. There is no
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|
inherent time interval between ticks but is a function of the CPU frequency.
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|
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|
@param This - Protocol instance structure.
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@param TimerIndex - Specifies which CPU timer is requested.
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|
@param TimerValue - Pointer to the returned timer value.
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@param TimerPeriod - A pointer to the amount of time that passes
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|
in femtoseconds (10-15) for each increment
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|
of TimerValue. If TimerValue does not
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|
increment at a predictable rate, then 0 is
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|
returned. The amount of time that has
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|
passed between two calls to GetTimerValue()
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|
can be calculated with the formula
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|
(TimerValue2 - TimerValue1) * TimerPeriod.
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|
This parameter is optional and may be NULL.
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|
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|
@retval EFI_SUCCESS - If the CPU timer count was returned.
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|
@retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
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@retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
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|
@retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
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|
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|
**/
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EFI_STATUS
|
EFI_STATUS
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EFIAPI
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EFIAPI
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CpuGetTimerValue (
|
CpuGetTimerValue (
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@@ -97,6 +192,22 @@ CpuGetTimerValue (
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OUT UINT64 *TimerPeriod OPTIONAL
|
OUT UINT64 *TimerPeriod OPTIONAL
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||||||
);
|
);
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|
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|
/**
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|
Set memory cacheability attributes for given range of memeory.
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|
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||||||
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@param This Protocol instance structure
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|
@param BaseAddress Specifies the start address of the
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|
memory range
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|
@param Length Specifies the length of the memory range
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|
@param Attributes The memory cacheability for the memory range
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|
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||||||
|
@retval EFI_SUCCESS If the cacheability of that memory range is
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|
set successfully
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|
@retval EFI_UNSUPPORTED If the desired operation cannot be done
|
||||||
|
@retval EFI_INVALID_PARAMETER The input parameter is not correct,
|
||||||
|
such as Length = 0
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||||||
|
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||||||
|
**/
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EFI_STATUS
|
EFI_STATUS
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EFIAPI
|
EFIAPI
|
||||||
CpuSetMemoryAttributes (
|
CpuSetMemoryAttributes (
|
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@@ -106,29 +217,57 @@ CpuSetMemoryAttributes (
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|||||||
IN UINT64 Attributes
|
IN UINT64 Attributes
|
||||||
);
|
);
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|
|
||||||
|
/**
|
||||||
|
Label of base address of IDT vector 0.
|
||||||
|
|
||||||
|
This is just a label of base address of IDT vector 0.
|
||||||
|
|
||||||
|
**/
|
||||||
VOID
|
VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
AsmIdtVector00 (
|
AsmIdtVector00 (
|
||||||
VOID
|
VOID
|
||||||
);
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Initializes the pointer to the external interrupt vector table.
|
||||||
|
|
||||||
|
@param VectorTable Address of the external interrupt vector table.
|
||||||
|
|
||||||
|
**/
|
||||||
VOID
|
VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
InitializeExternalVectorTablePtr (
|
InitializeExternalVectorTablePtr (
|
||||||
EFI_CPU_INTERRUPT_HANDLER *VectorTable
|
EFI_CPU_INTERRUPT_HANDLER *VectorTable
|
||||||
);
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Initialize Global Descriptor Table.
|
||||||
|
|
||||||
|
**/
|
||||||
VOID
|
VOID
|
||||||
InitGlobalDescriptorTable (
|
InitGlobalDescriptorTable (
|
||||||
VOID
|
VOID
|
||||||
);
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Sets the code selector (CS).
|
||||||
|
|
||||||
|
@param Selector Value of code selector.
|
||||||
|
|
||||||
|
**/
|
||||||
VOID
|
VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
SetCodeSelector (
|
SetCodeSelector (
|
||||||
UINT16 Selector
|
UINT16 Selector
|
||||||
);
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Sets the data selector (DS).
|
||||||
|
|
||||||
|
@param Selector Value of data selector.
|
||||||
|
|
||||||
|
**/
|
||||||
VOID
|
VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
SetDataSelectors (
|
SetDataSelectors (
|
||||||
|
@@ -2,7 +2,7 @@
|
|||||||
C based implemention of IA32 interrupt handling only
|
C based implemention of IA32 interrupt handling only
|
||||||
requiring a minimal assembly interrupt entry point.
|
requiring a minimal assembly interrupt entry point.
|
||||||
|
|
||||||
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@@ -26,14 +26,13 @@
|
|||||||
// Global Descriptor Entry structures
|
// Global Descriptor Entry structures
|
||||||
//
|
//
|
||||||
|
|
||||||
typedef
|
typedef struct _GDT_ENTRY {
|
||||||
struct _GDT_ENTRY {
|
UINT16 Limit15_0;
|
||||||
UINT16 limit15_0;
|
UINT16 Base15_0;
|
||||||
UINT16 base15_0;
|
UINT8 Base23_16;
|
||||||
UINT8 base23_16;
|
UINT8 Type;
|
||||||
UINT8 type;
|
UINT8 Limit19_16_and_flags;
|
||||||
UINT8 limit19_16_and_flags;
|
UINT8 Base31_24;
|
||||||
UINT8 base31_24;
|
|
||||||
} GDT_ENTRY;
|
} GDT_ENTRY;
|
||||||
|
|
||||||
typedef
|
typedef
|
||||||
@@ -162,11 +161,12 @@ STATIC GDT_ENTRIES GdtTemplate = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Initialize Global Descriptor Table
|
Initialize Global Descriptor Table.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
InitGlobalDescriptorTable (
|
InitGlobalDescriptorTable (
|
||||||
|
VOID
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
GDT_ENTRIES *gdt;
|
GDT_ENTRIES *gdt;
|
||||||
|
@@ -12,59 +12,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
|||||||
|
|
||||||
**/
|
**/
|
||||||
|
|
||||||
#include <PiDxe.h>
|
#include "CpuIo2Dxe.h"
|
||||||
|
|
||||||
#include <Protocol/CpuIo2.h>
|
|
||||||
|
|
||||||
#include <Library/BaseLib.h>
|
|
||||||
#include <Library/DebugLib.h>
|
|
||||||
#include <Library/IoLib.h>
|
|
||||||
#include <Library/UefiBootServicesTableLib.h>
|
|
||||||
|
|
||||||
#define MAX_IO_PORT_ADDRESS 0xFFFF
|
|
||||||
|
|
||||||
//
|
|
||||||
// Function Prototypes
|
|
||||||
//
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuMemoryServiceRead (
|
|
||||||
IN EFI_CPU_IO2_PROTOCOL *This,
|
|
||||||
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
OUT VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuMemoryServiceWrite (
|
|
||||||
IN EFI_CPU_IO2_PROTOCOL *This,
|
|
||||||
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
IN VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuIoServiceRead (
|
|
||||||
IN EFI_CPU_IO2_PROTOCOL *This,
|
|
||||||
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
OUT VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuIoServiceWrite (
|
|
||||||
IN EFI_CPU_IO2_PROTOCOL *This,
|
|
||||||
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
IN VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// Handle for the CPU I/O 2 Protocol
|
// Handle for the CPU I/O 2 Protocol
|
||||||
|
225
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h
Normal file
225
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h
Normal file
@@ -0,0 +1,225 @@
|
|||||||
|
/** @file
|
||||||
|
Internal include file for the CPU I/O 2 Protocol.
|
||||||
|
|
||||||
|
Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
|
||||||
|
This program and the accompanying materials
|
||||||
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
|
http://opensource.org/licenses/bsd-license.php
|
||||||
|
|
||||||
|
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
|
||||||
|
**/
|
||||||
|
|
||||||
|
#ifndef _CPU_IO2_DXE_H_
|
||||||
|
#define _CPU_IO2_DXE_H_
|
||||||
|
|
||||||
|
#include <PiDxe.h>
|
||||||
|
|
||||||
|
#include <Protocol/CpuIo2.h>
|
||||||
|
|
||||||
|
#include <Library/BaseLib.h>
|
||||||
|
#include <Library/DebugLib.h>
|
||||||
|
#include <Library/IoLib.h>
|
||||||
|
#include <Library/UefiBootServicesTableLib.h>
|
||||||
|
|
||||||
|
#define MAX_IO_PORT_ADDRESS 0xFFFF
|
||||||
|
|
||||||
|
/**
|
||||||
|
Reads memory-mapped registers.
|
||||||
|
|
||||||
|
The I/O operations are carried out exactly as requested. The caller is responsible
|
||||||
|
for satisfying any alignment and I/O width restrictions that a PI System on a
|
||||||
|
platform might require. For example on some platforms, width requests of
|
||||||
|
EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
|
||||||
|
be handled by the driver.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
|
||||||
|
or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
|
||||||
|
each of the Count operations that is performed.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
|
||||||
|
EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
|
||||||
|
incremented for each of the Count operations that is performed. The read or
|
||||||
|
write operation is performed Count times on the same Address.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
|
||||||
|
EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
|
||||||
|
incremented for each of the Count operations that is performed. The read or
|
||||||
|
write operation is performed Count times from the first element of Buffer.
|
||||||
|
|
||||||
|
@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
|
||||||
|
@param[in] Width Signifies the width of the I/O or Memory operation.
|
||||||
|
@param[in] Address The base address of the I/O operation.
|
||||||
|
@param[in] Count The number of I/O operations to perform. The number of
|
||||||
|
bytes moved is Width size * Count, starting at Address.
|
||||||
|
@param[out] Buffer For read operations, the destination buffer to store the results.
|
||||||
|
For write operations, the source buffer from which to write data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The data was read from or written to the PI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Buffer is NULL.
|
||||||
|
@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
|
||||||
|
@retval EFI_UNSUPPORTED The address range specified by Address, Width,
|
||||||
|
and Count is not valid for this PI system.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuMemoryServiceRead (
|
||||||
|
IN EFI_CPU_IO2_PROTOCOL *This,
|
||||||
|
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
OUT VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Writes memory-mapped registers.
|
||||||
|
|
||||||
|
The I/O operations are carried out exactly as requested. The caller is responsible
|
||||||
|
for satisfying any alignment and I/O width restrictions that a PI System on a
|
||||||
|
platform might require. For example on some platforms, width requests of
|
||||||
|
EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
|
||||||
|
be handled by the driver.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
|
||||||
|
or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
|
||||||
|
each of the Count operations that is performed.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
|
||||||
|
EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
|
||||||
|
incremented for each of the Count operations that is performed. The read or
|
||||||
|
write operation is performed Count times on the same Address.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
|
||||||
|
EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
|
||||||
|
incremented for each of the Count operations that is performed. The read or
|
||||||
|
write operation is performed Count times from the first element of Buffer.
|
||||||
|
|
||||||
|
@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
|
||||||
|
@param[in] Width Signifies the width of the I/O or Memory operation.
|
||||||
|
@param[in] Address The base address of the I/O operation.
|
||||||
|
@param[in] Count The number of I/O operations to perform. The number of
|
||||||
|
bytes moved is Width size * Count, starting at Address.
|
||||||
|
@param[in] Buffer For read operations, the destination buffer to store the results.
|
||||||
|
For write operations, the source buffer from which to write data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The data was read from or written to the PI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Buffer is NULL.
|
||||||
|
@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
|
||||||
|
@retval EFI_UNSUPPORTED The address range specified by Address, Width,
|
||||||
|
and Count is not valid for this PI system.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuMemoryServiceWrite (
|
||||||
|
IN EFI_CPU_IO2_PROTOCOL *This,
|
||||||
|
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
IN VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Reads I/O registers.
|
||||||
|
|
||||||
|
The I/O operations are carried out exactly as requested. The caller is responsible
|
||||||
|
for satisfying any alignment and I/O width restrictions that a PI System on a
|
||||||
|
platform might require. For example on some platforms, width requests of
|
||||||
|
EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
|
||||||
|
be handled by the driver.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
|
||||||
|
or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
|
||||||
|
each of the Count operations that is performed.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
|
||||||
|
EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
|
||||||
|
incremented for each of the Count operations that is performed. The read or
|
||||||
|
write operation is performed Count times on the same Address.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
|
||||||
|
EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
|
||||||
|
incremented for each of the Count operations that is performed. The read or
|
||||||
|
write operation is performed Count times from the first element of Buffer.
|
||||||
|
|
||||||
|
@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
|
||||||
|
@param[in] Width Signifies the width of the I/O or Memory operation.
|
||||||
|
@param[in] Address The base address of the I/O operation.
|
||||||
|
@param[in] Count The number of I/O operations to perform. The number of
|
||||||
|
bytes moved is Width size * Count, starting at Address.
|
||||||
|
@param[out] Buffer For read operations, the destination buffer to store the results.
|
||||||
|
For write operations, the source buffer from which to write data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The data was read from or written to the PI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Buffer is NULL.
|
||||||
|
@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
|
||||||
|
@retval EFI_UNSUPPORTED The address range specified by Address, Width,
|
||||||
|
and Count is not valid for this PI system.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuIoServiceRead (
|
||||||
|
IN EFI_CPU_IO2_PROTOCOL *This,
|
||||||
|
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
OUT VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Write I/O registers.
|
||||||
|
|
||||||
|
The I/O operations are carried out exactly as requested. The caller is responsible
|
||||||
|
for satisfying any alignment and I/O width restrictions that a PI System on a
|
||||||
|
platform might require. For example on some platforms, width requests of
|
||||||
|
EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
|
||||||
|
be handled by the driver.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
|
||||||
|
or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
|
||||||
|
each of the Count operations that is performed.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
|
||||||
|
EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
|
||||||
|
incremented for each of the Count operations that is performed. The read or
|
||||||
|
write operation is performed Count times on the same Address.
|
||||||
|
|
||||||
|
If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
|
||||||
|
EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
|
||||||
|
incremented for each of the Count operations that is performed. The read or
|
||||||
|
write operation is performed Count times from the first element of Buffer.
|
||||||
|
|
||||||
|
@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
|
||||||
|
@param[in] Width Signifies the width of the I/O or Memory operation.
|
||||||
|
@param[in] Address The base address of the I/O operation.
|
||||||
|
@param[in] Count The number of I/O operations to perform. The number of
|
||||||
|
bytes moved is Width size * Count, starting at Address.
|
||||||
|
@param[in] Buffer For read operations, the destination buffer to store the results.
|
||||||
|
For write operations, the source buffer from which to write data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The data was read from or written to the PI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Buffer is NULL.
|
||||||
|
@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
|
||||||
|
@retval EFI_UNSUPPORTED The address range specified by Address, Width,
|
||||||
|
and Count is not valid for this PI system.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuIoServiceWrite (
|
||||||
|
IN EFI_CPU_IO2_PROTOCOL *This,
|
||||||
|
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
IN VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
#endif
|
@@ -29,7 +29,8 @@
|
|||||||
|
|
||||||
[Sources]
|
[Sources]
|
||||||
CpuIo2Dxe.c
|
CpuIo2Dxe.c
|
||||||
|
CpuIo2Dxe.h
|
||||||
|
|
||||||
[Packages]
|
[Packages]
|
||||||
MdePkg/MdePkg.dec
|
MdePkg/MdePkg.dec
|
||||||
|
|
||||||
|
@@ -12,60 +12,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
|||||||
|
|
||||||
**/
|
**/
|
||||||
|
|
||||||
#include <PiSmm.h>
|
#include "CpuIo2Smm.h"
|
||||||
|
|
||||||
#include <Protocol/SmmCpuIo2.h>
|
|
||||||
|
|
||||||
#include <Library/BaseLib.h>
|
|
||||||
#include <Library/DebugLib.h>
|
|
||||||
#include <Library/IoLib.h>
|
|
||||||
#include <Library/SmmServicesTableLib.h>
|
|
||||||
#include <Library/BaseMemoryLib.h>
|
|
||||||
|
|
||||||
#define MAX_IO_PORT_ADDRESS 0xFFFF
|
|
||||||
|
|
||||||
//
|
|
||||||
// Function Prototypes
|
|
||||||
//
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuMemoryServiceRead (
|
|
||||||
IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
|
|
||||||
IN EFI_SMM_IO_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
OUT VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuMemoryServiceWrite (
|
|
||||||
IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
|
|
||||||
IN EFI_SMM_IO_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
IN VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuIoServiceRead (
|
|
||||||
IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
|
|
||||||
IN EFI_SMM_IO_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
OUT VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuIoServiceWrite (
|
|
||||||
IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
|
|
||||||
IN EFI_SMM_IO_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
IN VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// Handle for the SMM CPU I/O Protocol
|
// Handle for the SMM CPU I/O Protocol
|
||||||
@@ -104,7 +51,7 @@ UINT8 mStride[] = {
|
|||||||
@param[in] Address The base address of the I/O operations. The caller is
|
@param[in] Address The base address of the I/O operations. The caller is
|
||||||
responsible for aligning the Address if required.
|
responsible for aligning the Address if required.
|
||||||
@param[in] Count The number of I/O operations to perform.
|
@param[in] Count The number of I/O operations to perform.
|
||||||
@param[out] Buffer For read operations, the destination buffer to store
|
@param[in] Buffer For read operations, the destination buffer to store
|
||||||
the results. For write operations, the source buffer
|
the results. For write operations, the source buffer
|
||||||
from which to write data.
|
from which to write data.
|
||||||
|
|
||||||
@@ -443,7 +390,7 @@ SmmCpuIo2Initialize (
|
|||||||
IN EFI_HANDLE ImageHandle,
|
IN EFI_HANDLE ImageHandle,
|
||||||
IN EFI_SYSTEM_TABLE *SystemTable
|
IN EFI_SYSTEM_TABLE *SystemTable
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
EFI_STATUS Status;
|
EFI_STATUS Status;
|
||||||
|
|
||||||
//
|
//
|
||||||
|
162
UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.h
Normal file
162
UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.h
Normal file
@@ -0,0 +1,162 @@
|
|||||||
|
/** @file
|
||||||
|
Internal include file for the SMM CPU I/O Protocol.
|
||||||
|
|
||||||
|
Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
|
||||||
|
This program and the accompanying materials
|
||||||
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
|
http://opensource.org/licenses/bsd-license.php
|
||||||
|
|
||||||
|
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
|
||||||
|
**/
|
||||||
|
|
||||||
|
#ifndef _CPU_IO2_SMM_H_
|
||||||
|
#define _CPU_IO2_SMM_H_
|
||||||
|
|
||||||
|
#include <PiSmm.h>
|
||||||
|
|
||||||
|
#include <Protocol/SmmCpuIo2.h>
|
||||||
|
|
||||||
|
#include <Library/BaseLib.h>
|
||||||
|
#include <Library/DebugLib.h>
|
||||||
|
#include <Library/IoLib.h>
|
||||||
|
#include <Library/SmmServicesTableLib.h>
|
||||||
|
#include <Library/BaseMemoryLib.h>
|
||||||
|
|
||||||
|
#define MAX_IO_PORT_ADDRESS 0xFFFF
|
||||||
|
|
||||||
|
/**
|
||||||
|
Reads memory-mapped registers.
|
||||||
|
|
||||||
|
The I/O operations are carried out exactly as requested. The caller is
|
||||||
|
responsible for any alignment and I/O width issues that the bus, device,
|
||||||
|
platform, or type of I/O might require.
|
||||||
|
|
||||||
|
@param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
|
||||||
|
@param[in] Width Signifies the width of the I/O operations.
|
||||||
|
@param[in] Address The base address of the I/O operations. The caller is
|
||||||
|
responsible for aligning the Address if required.
|
||||||
|
@param[in] Count The number of I/O operations to perform.
|
||||||
|
@param[out] Buffer For read operations, the destination buffer to store
|
||||||
|
the results. For write operations, the source buffer
|
||||||
|
from which to write data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The data was read from or written to the device.
|
||||||
|
@retval EFI_UNSUPPORTED The Address is not valid for this system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
|
||||||
|
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
|
||||||
|
lack of resources
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuMemoryServiceRead (
|
||||||
|
IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
|
||||||
|
IN EFI_SMM_IO_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
OUT VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Writes memory-mapped registers.
|
||||||
|
|
||||||
|
The I/O operations are carried out exactly as requested. The caller is
|
||||||
|
responsible for any alignment and I/O width issues that the bus, device,
|
||||||
|
platform, or type of I/O might require.
|
||||||
|
|
||||||
|
@param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
|
||||||
|
@param[in] Width Signifies the width of the I/O operations.
|
||||||
|
@param[in] Address The base address of the I/O operations. The caller is
|
||||||
|
responsible for aligning the Address if required.
|
||||||
|
@param[in] Count The number of I/O operations to perform.
|
||||||
|
@param[in] Buffer For read operations, the destination buffer to store
|
||||||
|
the results. For write operations, the source buffer
|
||||||
|
from which to write data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The data was read from or written to the device.
|
||||||
|
@retval EFI_UNSUPPORTED The Address is not valid for this system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
|
||||||
|
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
|
||||||
|
lack of resources
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuMemoryServiceWrite (
|
||||||
|
IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
|
||||||
|
IN EFI_SMM_IO_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
IN VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Reads I/O registers.
|
||||||
|
|
||||||
|
The I/O operations are carried out exactly as requested. The caller is
|
||||||
|
responsible for any alignment and I/O width issues that the bus, device,
|
||||||
|
platform, or type of I/O might require.
|
||||||
|
|
||||||
|
@param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
|
||||||
|
@param[in] Width Signifies the width of the I/O operations.
|
||||||
|
@param[in] Address The base address of the I/O operations. The caller is
|
||||||
|
responsible for aligning the Address if required.
|
||||||
|
@param[in] Count The number of I/O operations to perform.
|
||||||
|
@param[out] Buffer For read operations, the destination buffer to store
|
||||||
|
the results. For write operations, the source buffer
|
||||||
|
from which to write data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The data was read from or written to the device.
|
||||||
|
@retval EFI_UNSUPPORTED The Address is not valid for this system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
|
||||||
|
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
|
||||||
|
lack of resources
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuIoServiceRead (
|
||||||
|
IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
|
||||||
|
IN EFI_SMM_IO_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
OUT VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Write I/O registers.
|
||||||
|
|
||||||
|
The I/O operations are carried out exactly as requested. The caller is
|
||||||
|
responsible for any alignment and I/O width issues that the bus, device,
|
||||||
|
platform, or type of I/O might require.
|
||||||
|
|
||||||
|
@param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
|
||||||
|
@param[in] Width Signifies the width of the I/O operations.
|
||||||
|
@param[in] Address The base address of the I/O operations. The caller is
|
||||||
|
responsible for aligning the Address if required.
|
||||||
|
@param[in] Count The number of I/O operations to perform.
|
||||||
|
@param[in] Buffer For read operations, the destination buffer to store
|
||||||
|
the results. For write operations, the source buffer
|
||||||
|
from which to write data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The data was read from or written to the device.
|
||||||
|
@retval EFI_UNSUPPORTED The Address is not valid for this system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
|
||||||
|
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
|
||||||
|
lack of resources
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuIoServiceWrite (
|
||||||
|
IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
|
||||||
|
IN EFI_SMM_IO_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
IN VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
#endif
|
@@ -28,6 +28,7 @@
|
|||||||
|
|
||||||
[Sources]
|
[Sources]
|
||||||
CpuIo2Smm.c
|
CpuIo2Smm.c
|
||||||
|
CpuIo2Smm.h
|
||||||
|
|
||||||
[Packages]
|
[Packages]
|
||||||
MdePkg/MdePkg.dec
|
MdePkg/MdePkg.dec
|
||||||
|
@@ -12,200 +12,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
|||||||
|
|
||||||
**/
|
**/
|
||||||
|
|
||||||
#include <PiDxe.h>
|
#include "CpuIoPei.h"
|
||||||
|
|
||||||
#include <Ppi/CpuIo.h>
|
|
||||||
|
|
||||||
#include <Library/BaseLib.h>
|
|
||||||
#include <Library/DebugLib.h>
|
|
||||||
#include <Library/IoLib.h>
|
|
||||||
#include <Library/PeiServicesLib.h>
|
|
||||||
|
|
||||||
#define MAX_IO_PORT_ADDRESS 0xFFFF
|
|
||||||
|
|
||||||
//
|
|
||||||
// Function Prototypes
|
|
||||||
//
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuMemoryServiceRead (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
OUT VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuMemoryServiceWrite (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
IN VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuIoServiceRead (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
OUT VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
CpuIoServiceWrite (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINTN Count,
|
|
||||||
IN VOID *Buffer
|
|
||||||
);
|
|
||||||
|
|
||||||
UINT8
|
|
||||||
EFIAPI
|
|
||||||
CpuIoRead8 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address
|
|
||||||
);
|
|
||||||
|
|
||||||
UINT16
|
|
||||||
EFIAPI
|
|
||||||
CpuIoRead16 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address
|
|
||||||
);
|
|
||||||
|
|
||||||
UINT32
|
|
||||||
EFIAPI
|
|
||||||
CpuIoRead32 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address
|
|
||||||
);
|
|
||||||
|
|
||||||
UINT64
|
|
||||||
EFIAPI
|
|
||||||
CpuIoRead64 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address
|
|
||||||
);
|
|
||||||
|
|
||||||
VOID
|
|
||||||
EFIAPI
|
|
||||||
CpuIoWrite8 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINT8 Data
|
|
||||||
);
|
|
||||||
|
|
||||||
VOID
|
|
||||||
EFIAPI
|
|
||||||
CpuIoWrite16 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINT16 Data
|
|
||||||
);
|
|
||||||
|
|
||||||
VOID
|
|
||||||
EFIAPI
|
|
||||||
CpuIoWrite32 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINT32 Data
|
|
||||||
);
|
|
||||||
|
|
||||||
VOID
|
|
||||||
EFIAPI
|
|
||||||
CpuIoWrite64 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINT64 Data
|
|
||||||
);
|
|
||||||
|
|
||||||
UINT8
|
|
||||||
EFIAPI
|
|
||||||
CpuMemRead8 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address
|
|
||||||
);
|
|
||||||
|
|
||||||
UINT16
|
|
||||||
EFIAPI
|
|
||||||
CpuMemRead16 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address
|
|
||||||
);
|
|
||||||
|
|
||||||
UINT32
|
|
||||||
EFIAPI
|
|
||||||
CpuMemRead32 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address
|
|
||||||
);
|
|
||||||
|
|
||||||
UINT64
|
|
||||||
EFIAPI
|
|
||||||
CpuMemRead64 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address
|
|
||||||
);
|
|
||||||
|
|
||||||
VOID
|
|
||||||
EFIAPI
|
|
||||||
CpuMemWrite8 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINT8 Data
|
|
||||||
);
|
|
||||||
|
|
||||||
VOID
|
|
||||||
EFIAPI
|
|
||||||
CpuMemWrite16 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINT16 Data
|
|
||||||
);
|
|
||||||
|
|
||||||
VOID
|
|
||||||
EFIAPI
|
|
||||||
CpuMemWrite32 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINT32 Data
|
|
||||||
);
|
|
||||||
|
|
||||||
VOID
|
|
||||||
EFIAPI
|
|
||||||
CpuMemWrite64 (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
|
||||||
IN UINT64 Address,
|
|
||||||
IN UINT64 Data
|
|
||||||
);
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// Instance of CPU I/O PPI
|
// Instance of CPU I/O PPI
|
||||||
//
|
//
|
||||||
|
448
UefiCpuPkg/CpuIoPei/CpuIoPei.h
Normal file
448
UefiCpuPkg/CpuIoPei/CpuIoPei.h
Normal file
@@ -0,0 +1,448 @@
|
|||||||
|
/** @file
|
||||||
|
Internal include file for the CPU I/O PPI.
|
||||||
|
|
||||||
|
Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
|
||||||
|
This program and the accompanying materials
|
||||||
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
|
http://opensource.org/licenses/bsd-license.php
|
||||||
|
|
||||||
|
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
|
||||||
|
**/
|
||||||
|
|
||||||
|
#ifndef _CPU_IO2_PEI_H_
|
||||||
|
#define _CPU_IO2_PEI_H_
|
||||||
|
|
||||||
|
#include <PiDxe.h>
|
||||||
|
|
||||||
|
#include <Ppi/CpuIo.h>
|
||||||
|
|
||||||
|
#include <Library/BaseLib.h>
|
||||||
|
#include <Library/DebugLib.h>
|
||||||
|
#include <Library/IoLib.h>
|
||||||
|
#include <Library/PeiServicesLib.h>
|
||||||
|
|
||||||
|
#define MAX_IO_PORT_ADDRESS 0xFFFF
|
||||||
|
|
||||||
|
/**
|
||||||
|
Reads memory-mapped registers.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table
|
||||||
|
published by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Width The width of the access. Enumerated in bytes.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Count The number of accesses to perform.
|
||||||
|
@param[out] Buffer A pointer to the buffer of data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The function completed successfully.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Buffer is NULL.
|
||||||
|
@retval EFI_UNSUPPORTED The address range specified by Address, Width,
|
||||||
|
and Count is not valid for this EFI system.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuMemoryServiceRead (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
OUT VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Writes memory-mapped registers.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table
|
||||||
|
published by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Width The width of the access. Enumerated in bytes.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Count The number of accesses to perform.
|
||||||
|
@param[in] Buffer A pointer to the buffer of data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The function completed successfully.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Buffer is NULL.
|
||||||
|
@retval EFI_UNSUPPORTED The address range specified by Address, Width,
|
||||||
|
and Count is not valid for this EFI system.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuMemoryServiceWrite (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
IN VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Reads I/O registers.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table
|
||||||
|
published by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Width The width of the access. Enumerated in bytes.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Count The number of accesses to perform.
|
||||||
|
@param[out] Buffer A pointer to the buffer of data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The function completed successfully.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Buffer is NULL.
|
||||||
|
@retval EFI_UNSUPPORTED The address range specified by Address, Width,
|
||||||
|
and Count is not valid for this EFI system.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuIoServiceRead (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
OUT VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Write I/O registers.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table
|
||||||
|
published by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Width The width of the access. Enumerated in bytes.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Count The number of accesses to perform.
|
||||||
|
@param[in] Buffer A pointer to the buffer of data.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The function completed successfully.
|
||||||
|
@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
|
||||||
|
@retval EFI_INVALID_PARAMETER Buffer is NULL.
|
||||||
|
@retval EFI_UNSUPPORTED The address range specified by Address, Width,
|
||||||
|
and Count is not valid for this EFI system.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
CpuIoServiceWrite (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINTN Count,
|
||||||
|
IN VOID *Buffer
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
8-bit I/O read operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
|
||||||
|
@return An 8-bit value returned from the I/O space.
|
||||||
|
**/
|
||||||
|
UINT8
|
||||||
|
EFIAPI
|
||||||
|
CpuIoRead8 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
16-bit I/O read operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
|
||||||
|
@return A 16-bit value returned from the I/O space.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINT16
|
||||||
|
EFIAPI
|
||||||
|
CpuIoRead16 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
32-bit I/O read operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
|
||||||
|
@return A 32-bit value returned from the I/O space.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINT32
|
||||||
|
EFIAPI
|
||||||
|
CpuIoRead32 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
64-bit I/O read operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
|
||||||
|
@return A 64-bit value returned from the I/O space.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINT64
|
||||||
|
EFIAPI
|
||||||
|
CpuIoRead64 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
8-bit I/O write operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Data The data to write.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
CpuIoWrite8 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINT8 Data
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
16-bit I/O write operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Data The data to write.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
CpuIoWrite16 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINT16 Data
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
32-bit I/O write operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Data The data to write.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
CpuIoWrite32 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINT32 Data
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
64-bit I/O write operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Data The data to write.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
CpuIoWrite64 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINT64 Data
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
8-bit memory read operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
|
||||||
|
@return An 8-bit value returned from the memory space.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINT8
|
||||||
|
EFIAPI
|
||||||
|
CpuMemRead8 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
16-bit memory read operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
|
||||||
|
@return A 16-bit value returned from the memory space.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINT16
|
||||||
|
EFIAPI
|
||||||
|
CpuMemRead16 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
32-bit memory read operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
|
||||||
|
@return A 32-bit value returned from the memory space.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINT32
|
||||||
|
EFIAPI
|
||||||
|
CpuMemRead32 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
64-bit memory read operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
|
||||||
|
@return A 64-bit value returned from the memory space.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINT64
|
||||||
|
EFIAPI
|
||||||
|
CpuMemRead64 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
8-bit memory write operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Data The data to write.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
CpuMemWrite8 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINT8 Data
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
16-bit memory write operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Data The data to write.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
CpuMemWrite16 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINT16 Data
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
32-bit memory write operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Data The data to write.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
CpuMemWrite32 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINT32 Data
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
64-bit memory write operations.
|
||||||
|
|
||||||
|
@param[in] PeiServices An indirect pointer to the PEI Services Table published
|
||||||
|
by the PEI Foundation.
|
||||||
|
@param[in] This Pointer to local data for the interface.
|
||||||
|
@param[in] Address The physical address of the access.
|
||||||
|
@param[in] Data The data to write.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
CpuMemWrite64 (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN CONST EFI_PEI_CPU_IO_PPI *This,
|
||||||
|
IN UINT64 Address,
|
||||||
|
IN UINT64 Data
|
||||||
|
);
|
||||||
|
|
||||||
|
#endif
|
@@ -29,7 +29,8 @@
|
|||||||
|
|
||||||
[Sources]
|
[Sources]
|
||||||
CpuIoPei.c
|
CpuIoPei.c
|
||||||
|
CpuIoPei.h
|
||||||
|
|
||||||
[Packages]
|
[Packages]
|
||||||
MdePkg/MdePkg.dec
|
MdePkg/MdePkg.dec
|
||||||
|
|
||||||
|
@@ -315,6 +315,7 @@ MtrrGetMemoryAttributeInVariableMtrr (
|
|||||||
VOID
|
VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
MtrrDebugPrintAllMtrrs (
|
MtrrDebugPrintAllMtrrs (
|
||||||
|
VOID
|
||||||
);
|
);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@@ -23,7 +23,6 @@
|
|||||||
//
|
//
|
||||||
// This table defines the offset, base and length of the fixed MTRRs
|
// This table defines the offset, base and length of the fixed MTRRs
|
||||||
//
|
//
|
||||||
STATIC
|
|
||||||
FIXED_MTRR MtrrLibFixedMtrrTable[] = {
|
FIXED_MTRR MtrrLibFixedMtrrTable[] = {
|
||||||
{
|
{
|
||||||
MTRR_LIB_IA32_MTRR_FIX64K_00000,
|
MTRR_LIB_IA32_MTRR_FIX64K_00000,
|
||||||
@@ -552,7 +551,7 @@ Power2MaxMemory (
|
|||||||
{
|
{
|
||||||
UINT64 Result;
|
UINT64 Result;
|
||||||
|
|
||||||
if (RShiftU64 (MemoryLength, 32)) {
|
if (RShiftU64 (MemoryLength, 32) != 0) {
|
||||||
Result = LShiftU64 (
|
Result = LShiftU64 (
|
||||||
(UINT64) GetPowerOfTwo32 (
|
(UINT64) GetPowerOfTwo32 (
|
||||||
(UINT32) RShiftU64 (MemoryLength, 32)
|
(UINT32) RShiftU64 (MemoryLength, 32)
|
||||||
@@ -624,7 +623,6 @@ GetDirection (
|
|||||||
@param VariableMtrr The array to shadow variable MTRRs content
|
@param VariableMtrr The array to shadow variable MTRRs content
|
||||||
|
|
||||||
**/
|
**/
|
||||||
STATIC
|
|
||||||
VOID
|
VOID
|
||||||
InvalidateMtrr (
|
InvalidateMtrr (
|
||||||
IN VARIABLE_MTRR *VariableMtrr
|
IN VARIABLE_MTRR *VariableMtrr
|
||||||
@@ -638,7 +636,7 @@ InvalidateMtrr (
|
|||||||
Index = 0;
|
Index = 0;
|
||||||
VariableMtrrCount = GetVariableMtrrCount ();
|
VariableMtrrCount = GetVariableMtrrCount ();
|
||||||
while (Index < VariableMtrrCount) {
|
while (Index < VariableMtrrCount) {
|
||||||
if (VariableMtrr[Index].Valid == FALSE && VariableMtrr[Index].Used == TRUE ) {
|
if (!VariableMtrr[Index].Valid && VariableMtrr[Index].Used) {
|
||||||
AsmWriteMsr64 (VariableMtrr[Index].Msr, 0);
|
AsmWriteMsr64 (VariableMtrr[Index].Msr, 0);
|
||||||
AsmWriteMsr64 (VariableMtrr[Index].Msr + 1, 0);
|
AsmWriteMsr64 (VariableMtrr[Index].Msr + 1, 0);
|
||||||
VariableMtrr[Index].Used = FALSE;
|
VariableMtrr[Index].Used = FALSE;
|
||||||
@@ -661,7 +659,6 @@ InvalidateMtrr (
|
|||||||
@param MtrrValidAddressMask The valid address mask for MTRR
|
@param MtrrValidAddressMask The valid address mask for MTRR
|
||||||
|
|
||||||
**/
|
**/
|
||||||
STATIC
|
|
||||||
VOID
|
VOID
|
||||||
ProgramVariableMtrr (
|
ProgramVariableMtrr (
|
||||||
IN UINTN MtrrNumber,
|
IN UINTN MtrrNumber,
|
||||||
@@ -703,7 +700,6 @@ ProgramVariableMtrr (
|
|||||||
@return The enum item in MTRR_MEMORY_CACHE_TYPE
|
@return The enum item in MTRR_MEMORY_CACHE_TYPE
|
||||||
|
|
||||||
**/
|
**/
|
||||||
STATIC
|
|
||||||
MTRR_MEMORY_CACHE_TYPE
|
MTRR_MEMORY_CACHE_TYPE
|
||||||
GetMemoryCacheTypeFromMtrrType (
|
GetMemoryCacheTypeFromMtrrType (
|
||||||
IN UINT64 MtrrType
|
IN UINT64 MtrrType
|
||||||
@@ -738,7 +734,6 @@ GetMemoryCacheTypeFromMtrrType (
|
|||||||
@param MtrrValidAddressMask The valid address mask for the MTRR
|
@param MtrrValidAddressMask The valid address mask for the MTRR
|
||||||
|
|
||||||
**/
|
**/
|
||||||
STATIC
|
|
||||||
VOID
|
VOID
|
||||||
MtrrLibInitializeMtrrMask (
|
MtrrLibInitializeMtrrMask (
|
||||||
OUT UINT64 *MtrrValidBitsMask,
|
OUT UINT64 *MtrrValidBitsMask,
|
||||||
@@ -1452,7 +1447,9 @@ MtrrSetAllMtrrs (
|
|||||||
This function prints all MTRRs for debugging.
|
This function prints all MTRRs for debugging.
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
|
EFIAPI
|
||||||
MtrrDebugPrintAllMtrrs (
|
MtrrDebugPrintAllMtrrs (
|
||||||
|
VOID
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
DEBUG_CODE (
|
DEBUG_CODE (
|
||||||
|
Reference in New Issue
Block a user