ArmPlatformPkg/ArmiVExpressPkg: Introduce 'ArmVExpress.dsc.inc' to avoid duplication of library and PCD defintions around ARM Versatile Express Boards
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12428 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -68,6 +68,7 @@
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// PL111 Colour LCD Controller - core tile
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#define PL111_CLCD_CORE_TILE_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x20000)
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#define PL111_CLCD_SITE ARM_VE_DAUGHTERBOARD_1_SITE
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// PL341 Dynamic Memory Controller Base
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#define ARM_VE_DMC_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE0000)
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@@ -76,13 +77,12 @@
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#define ARM_VE_SMC_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE1000)
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// System Configuration Controller register Base addresses
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//#define ARM_VE_SYS_CFG_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE2000)
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#define ARM_VE_SYS_CFG_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE2000)
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#define ARM_VE_SCC_BASE ARM_VE_SYS_CFG_CTRL_BASE
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#define ARM_VE_SYS_CFGRW0_REG (ARM_VE_BOARD_PERIPH_BASE + 0xE2000)
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#define ARM_VE_SYS_CFGRW1_REG (ARM_VE_BOARD_PERIPH_BASE + 0xE2004)
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#define ARM_VE_SYS_CFGRW2_REG (ARM_VE_BOARD_PERIPH_BASE + 0xE2008)
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#define ARM_PLATFORM_SCC_BASE ARM_VE_SYS_CFGRW0_REG
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// SP805 Watchdog on Cortex A9 core tile
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#define SP805_WDOG_CORE_TILE_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE5000)
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@@ -118,16 +118,4 @@
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#define ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK (1 << 4)
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#define ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK (1 << 5)
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/***********************************************************************************
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// EFI Memory Map in Permanent Memory (DRAM)
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************************************************************************************/
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// This region is allocated at the bottom of the DRAM. It will be used
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// for fixed address allocations such as Vector Table
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#define ARM_VE_EFI_FIX_ADDRESS_REGION_SZ SIZE_8MB
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// This region is the memory declared to PEI as permanent memory for PEI
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// and DXE. EFI stacks and heaps will be declared in this region.
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#define ARM_VE_EFI_MEMORY_REGION_SZ SIZE_256MB
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#endif
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