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ArmPkg: Create MpCoreInfo PPI and HOB to describe CPU Cores on a MPCore platform

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These info are:
- ClusterId, CoreId
- MailBox Set/Get/Clear address



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12423 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
2011-09-22 23:14:01 +00:00
parent 77de7e5372
commit 44788bae6f
23 changed files with 496 additions and 32 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
ArmPkg/ArmPkg.dec
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@@ -2,6 +2,7 @@
# ARM processor package.
#
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -41,6 +42,14 @@
[Guids.common]
gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }
## ARM MPCore table
# Include/Guid/ArmMpCoreInfo.h
gArmMpCoreInfoGuid = { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
[Ppis]
## Include/Ppi/ArmMpCoreInfo.h
gArmMpCoreInfoPpiGuid = { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} }
[Protocols.common]
gVirtualUncachedPagesProtocolGuid = { 0xAD651C7D, 0x3C22, 0x4DBF, { 0x92, 0xe8, 0x38, 0xa7, 0xcd, 0xae, 0x87, 0xb2 } }

6
ArmPkg/Drivers/CpuDxe/CpuDxe.c
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@@ -257,6 +257,12 @@ CpuDxeInitialize (
//
SyncCacheConfig (&mCpu);
// If the platform is a MPCore system then install the Configuration Table describing the
// secondary core states
if (ArmIsMPCore()) {
PublishArmProcessorTable();
}
//
// Setup a callback for idle events
//

14
ArmPkg/Drivers/CpuDxe/CpuDxe.h
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@@ -124,6 +124,20 @@ ConvertSectionToPages (
IN EFI_PHYSICAL_ADDRESS BaseAddress
);
/**
* Publish ARM Processor Data table in UEFI SYSTEM Table.
* @param HobStart Pointer to the beginning of the HOB List from PEI.
*
* Description : This function iterates through HOB list and finds ARM processor Table Entry HOB.
* If the ARM processor Table Entry HOB is found, the HOB data is copied to run-time memory
* and a pointer is assigned to it in ARM processor table. Then the ARM processor table is
* installed in EFI configuration table.
**/
VOID
EFIAPI
PublishArmProcessorTable(
VOID
);
extern VIRTUAL_UNCACHED_PAGES_PROTOCOL gVirtualUncachedPages;

7
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
View File

@@ -27,6 +27,7 @@
[Sources.ARM]
CpuDxe.c
CpuDxe.h
CpuMpCore.c
Exception.c
#
@@ -40,7 +41,7 @@
#
ExceptionSupport.ARMv6.asm | RVCT
ExceptionSupport.ARMv6.S | GCC
Mmu.c
Mmu.c
[Packages]
@@ -50,13 +51,16 @@
MdeModulePkg/MdeModulePkg.dec
[LibraryClasses]
ArmLib
BaseMemoryLib
CacheMaintenanceLib
CpuLib
DebugLib
DefaultExceptionHandlerLib
DxeServicesTableLib
HobLib
PeCoffGetEntryPointLib
UefiDriverEntryPoint
UefiLib
[Protocols]
@@ -66,6 +70,7 @@
[Guids]
gEfiDebugImageInfoTableGuid
gArmMpCoreInfoGuid
gIdleLoopEventGuid
[Pcd.common]

103
ArmPkg/Drivers/CpuDxe/CpuMpCore.c Normal file
View File

@@ -0,0 +1,103 @@
/** @file
*
* Copyright (c) 2011, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <Library/UefiBootServicesTableLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/HobLib.h>
#include <Library/DebugLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Guid/ArmMpCoreInfo.h>
ARM_PROCESSOR_TABLE mArmProcessorTableTemplate = {
{
EFI_ARM_PROCESSOR_TABLE_SIGNATURE,
0,
EFI_ARM_PROCESSOR_TABLE_REVISION,
EFI_ARM_PROCESSOR_TABLE_OEM_ID,
EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID,
EFI_ARM_PROCESSOR_TABLE_OEM_REVISION,
EFI_ARM_PROCESSOR_TABLE_CREATOR_ID,
EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION,
0,
0
}, //ARM Processor table header
0, // Number of entries in ARM processor Table
NULL // ARM Processor Table
};
/** Publish ARM Processor Data table in UEFI SYSTEM Table.
* @param: HobStart Pointer to the beginning of the HOB List from PEI.
*
* Description : This function iterates through HOB list and finds ARM processor Table Entry HOB.
* If the ARM processor Table Entry HOB is found, the HOB data is copied to run-time memory
* and a pointer is assigned to it in ARM processor table. Then the ARM processor table is
* installed in EFI configuration table.
**/
VOID
EFIAPI
PublishArmProcessorTable (
VOID
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = GetHobList ();
// Iterate through the HOBs and find if there is ARM PROCESSOR ENTRY HOB
for (; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {
// Check for Correct HOB type
if ((GET_HOB_TYPE (Hob)) == EFI_HOB_TYPE_GUID_EXTENSION) {
// Check for correct GUID type
if (CompareGuid(&(Hob.Guid->Name), &gArmMpCoreInfoGuid)) {
ARM_PROCESSOR_TABLE *ArmProcessorTable;
EFI_STATUS Status;
// Allocate Runtime memory for ARM processor table
ArmProcessorTable = (ARM_PROCESSOR_TABLE*)AllocateRuntimePool(sizeof(ARM_PROCESSOR_TABLE));
// Check if the memory allocation is succesful or not
ASSERT(NULL != ArmProcessorTable);
// Set ARM processor table to default values
CopyMem(ArmProcessorTable,&mArmProcessorTableTemplate,sizeof(ARM_PROCESSOR_TABLE));
// Fill in Length fields of ARM processor table
ArmProcessorTable->Header.Length = sizeof(ARM_PROCESSOR_TABLE);
ArmProcessorTable->Header.DataLen = GET_GUID_HOB_DATA_SIZE(Hob);
// Fill in Identifier(ARM processor table GUID)
ArmProcessorTable->Header.Identifier = gArmMpCoreInfoGuid;
// Set Number of ARM core entries in the Table
ArmProcessorTable->NumberOfEntries = GET_GUID_HOB_DATA_SIZE(Hob)/sizeof(ARM_CORE_INFO);
// Allocate runtime memory for ARM processor Table entries
ArmProcessorTable->ArmCpus = (ARM_CORE_INFO*)AllocateRuntimePool (
ArmProcessorTable->NumberOfEntries * sizeof(ARM_CORE_INFO));
// Check if the memory allocation is succesful or not
ASSERT(NULL != ArmProcessorTable->ArmCpus);
// Copy ARM Processor Table data from HOB list to newly allocated memory
CopyMem(ArmProcessorTable->ArmCpus,GET_GUID_HOB_DATA(Hob), ArmProcessorTable->Header.DataLen);
// Install the ARM Processor table into EFI system configuration table
Status = gBS->InstallConfigurationTable (&gArmMpCoreInfoGuid, ArmProcessorTable);
ASSERT_EFI_ERROR (Status);
}
}
}
}

46
ArmPkg/Drivers/CpuPei/CpuPei.c
View File

@@ -2,6 +2,8 @@
Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
Copyright (c) 2011, ARM Limited. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -29,12 +31,14 @@ Abstract:
//
// The protocols, PPI and GUID defintions for this module
//
#include <Ppi/ArmMpCoreInfo.h>
//
// The Library classes this module consumes
//
#include <Library/DebugLib.h>
#include <Library/PeimEntryPoint.h>
#include <Library/PeiServicesLib.h>
#include <Library/PcdLib.h>
#include <Library/HobLib.h>
#include <Library/ArmLib.h>
@@ -54,7 +58,7 @@ FindMainMemory (
{
EFI_PEI_HOB_POINTERS NextHob;
// look at the resource descriptor hobs, choose the first system memory one
// Look at the resource descriptor hobs, choose the first system memory one
NextHob.Raw = GetHobList ();
while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {
if(NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY)
@@ -75,7 +79,7 @@ ConfigureMmu (
VOID
)
{
EFI_STATUS Status;
EFI_STATUS Status;
UINTN Idx;
UINT32 CacheAttributes;
UINT32 SystemMemoryBase;
@@ -99,7 +103,7 @@ ConfigureMmu (
SystemMemoryLastAddress = SystemMemoryBase + (SystemMemoryLength-1);
// if system memory does not begin at 0
// If system memory does not begin at 0
if(SystemMemoryBase > 0) {
MemoryTable[Idx].PhysicalBase = 0;
MemoryTable[Idx].VirtualBase = 0;
@@ -114,7 +118,7 @@ ConfigureMmu (
MemoryTable[Idx].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
Idx++;
// if system memory does not go to the last address (0xFFFFFFFF)
// If system memory does not go to the last address (0xFFFFFFFF)
if( SystemMemoryLastAddress < MAX_ADDRESS ) {
MemoryTable[Idx].PhysicalBase = SystemMemoryLastAddress + 1;
MemoryTable[Idx].VirtualBase = MemoryTable[Idx].PhysicalBase;
@@ -138,13 +142,6 @@ ConfigureMmu (
BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
}
EFI_STATUS
EFIAPI
InitializeCpuPeim (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
/*++
Routine Description:
@@ -161,14 +158,37 @@ Returns:
Status - EFI_SUCCESS if the boot mode could be set
--*/
EFI_STATUS
EFIAPI
InitializeCpuPeim (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
EFI_STATUS Status;
ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
UINTN ArmCoreCount;
ARM_CORE_INFO *ArmCoreInfoTable;
// Enable program flow prediction, if supported.
ArmEnableBranchPrediction ();
// publish the CPU memory and io spaces sizes
// Publish the CPU memory and io spaces sizes
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
ConfigureMmu();
//ConfigureMmu();
// Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);
if (!EFI_ERROR(Status)) {
// Build the MP Core Info Table
ArmCoreCount = 0;
Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {
// Build MPCore Info HOB
BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
}
}
return EFI_SUCCESS;
}

4
ArmPkg/Drivers/CpuPei/CpuPei.inf
View File

@@ -44,6 +44,10 @@
ArmLib
[Ppis]
gArmMpCoreInfoPpiGuid
[Guids]
gArmMpCoreInfoGuid
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize

66
ArmPkg/Include/Guid/ArmMpCoreInfo.h Normal file
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@@ -0,0 +1,66 @@
/** @file
*
* Copyright (c) 2011, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#ifndef __ARM_MP_CORE_INFO_GUID_H_
#define __ARM_MP_CORE_INFO_GUID_H_
#define MAX_CPUS_PER_MPCORE_SYSTEM 0x04
#define SCU_CONFIG_REG_OFFSET 0x04
#define MPIDR_U_BIT_MASK 0x40000000
typedef struct {
UINT32 ClusterId;
UINT32 CoreId;
// MP Core Mailbox
EFI_PHYSICAL_ADDRESS MailboxSetAddress;
EFI_PHYSICAL_ADDRESS MailboxGetAddress;
EFI_PHYSICAL_ADDRESS MailboxClearAddress;
UINT64 MailboxClearValue;
} ARM_CORE_INFO;
typedef struct{
UINT64 Signature;
UINT32 Length;
UINT32 Revision;
UINT64 OemId;
UINT64 OemTableId;
UINTN OemRevision;
UINTN CreatorId;
UINTN CreatorRevision;
EFI_GUID Identifier;
UINTN DataLen;
} ARM_PROCESSOR_TABLE_HEADER;
typedef struct {
ARM_PROCESSOR_TABLE_HEADER Header;
UINTN NumberOfEntries;
ARM_CORE_INFO *ArmCpus;
} ARM_PROCESSOR_TABLE;
#define ARM_MP_CORE_INFO_GUID \
{ 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
#define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')
#define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000 //1.0
#define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')
#define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')
#define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001
#define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID 0xA5A5A5A5
#define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001
extern EFI_GUID gArmMpCoreInfoGuid;
#endif /* MPCOREINFO_H_ */

58
ArmPkg/Include/Ppi/ArmMpCoreInfo.h Normal file
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@@ -0,0 +1,58 @@
/** @file
*
* Copyright (c) 2011, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#ifndef __ARM_MP_CORE_INFO_PPI_H__
#define __ARM_MP_CORE_INFO_PPI_H_
#include <Guid/ArmMpCoreInfo.h>
#define ARM_MP_CORE_INFO_PPI_GUID \
{ 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} }
/**
This service of the EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
permanent memory.
@param PeiServices Pointer to the PEI Services Table.
@param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
Temporary RAM contents.
@param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
Temporary RAM contents.
@param CopySize Amount of memory to migrate from temporary to permanent memory.
@retval EFI_SUCCESS The data was successfully returned.
@retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
TemporaryMemoryBase > PermanentMemoryBase.
**/
typedef
EFI_STATUS
(EFIAPI * ARM_MP_CORE_INFO_GET) (
OUT UINTN *ArmCoreCount,
OUT ARM_CORE_INFO **ArmCoreTable
);
///
/// This service abstracts the ability to migrate contents of the platform early memory store.
/// Note: The name EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI is different from the current PI 1.2 spec.
/// This PPI was optional.
///
typedef struct {
ARM_MP_CORE_INFO_GET GetMpCoreInfo;
} ARM_MP_CORE_INFO_PPI;
extern EFI_GUID gArmMpCoreInfoPpiGuid;
extern EFI_GUID gArmMpCoreInfoGuid;
#endif