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ArmPkg: Create MpCoreInfo PPI and HOB to describe CPU Cores on a MPCore platform

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These info are:
- ClusterId, CoreId
- MailBox Set/Get/Clear address



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12423 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
2011-09-22 23:14:01 +00:00
parent 77de7e5372
commit 44788bae6f
23 changed files with 496 additions and 32 deletions
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46
ArmPkg/Drivers/CpuPei/CpuPei.c
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@@ -2,6 +2,8 @@
Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
Copyright (c) 2011, ARM Limited. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -29,12 +31,14 @@ Abstract:
//
// The protocols, PPI and GUID defintions for this module
//
#include <Ppi/ArmMpCoreInfo.h>
//
// The Library classes this module consumes
//
#include <Library/DebugLib.h>
#include <Library/PeimEntryPoint.h>
#include <Library/PeiServicesLib.h>
#include <Library/PcdLib.h>
#include <Library/HobLib.h>
#include <Library/ArmLib.h>
@@ -54,7 +58,7 @@ FindMainMemory (
{
EFI_PEI_HOB_POINTERS NextHob;
// look at the resource descriptor hobs, choose the first system memory one
// Look at the resource descriptor hobs, choose the first system memory one
NextHob.Raw = GetHobList ();
while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {
if(NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY)
@@ -75,7 +79,7 @@ ConfigureMmu (
VOID
)
{
EFI_STATUS Status;
EFI_STATUS Status;
UINTN Idx;
UINT32 CacheAttributes;
UINT32 SystemMemoryBase;
@@ -99,7 +103,7 @@ ConfigureMmu (
SystemMemoryLastAddress = SystemMemoryBase + (SystemMemoryLength-1);
// if system memory does not begin at 0
// If system memory does not begin at 0
if(SystemMemoryBase > 0) {
MemoryTable[Idx].PhysicalBase = 0;
MemoryTable[Idx].VirtualBase = 0;
@@ -114,7 +118,7 @@ ConfigureMmu (
MemoryTable[Idx].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
Idx++;
// if system memory does not go to the last address (0xFFFFFFFF)
// If system memory does not go to the last address (0xFFFFFFFF)
if( SystemMemoryLastAddress < MAX_ADDRESS ) {
MemoryTable[Idx].PhysicalBase = SystemMemoryLastAddress + 1;
MemoryTable[Idx].VirtualBase = MemoryTable[Idx].PhysicalBase;
@@ -138,13 +142,6 @@ ConfigureMmu (
BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
}
EFI_STATUS
EFIAPI
InitializeCpuPeim (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
/*++
Routine Description:
@@ -161,14 +158,37 @@ Returns:
Status - EFI_SUCCESS if the boot mode could be set
--*/
EFI_STATUS
EFIAPI
InitializeCpuPeim (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
EFI_STATUS Status;
ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
UINTN ArmCoreCount;
ARM_CORE_INFO *ArmCoreInfoTable;
// Enable program flow prediction, if supported.
ArmEnableBranchPrediction ();
// publish the CPU memory and io spaces sizes
// Publish the CPU memory and io spaces sizes
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
ConfigureMmu();
//ConfigureMmu();
// Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);
if (!EFI_ERROR(Status)) {
// Build the MP Core Info Table
ArmCoreCount = 0;
Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {
// Build MPCore Info HOB
BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
}
}
return EFI_SUCCESS;
}