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ArmPlatformPkg/TZASC: Allow specifying subregions to be disabled

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ARM TZASC-380 IP provides a mechanism to split memory regions being
protected via it into eight equal-sized sub-regions. A bit-setting
allows the corresponding subregion to be disabled.

Several NXP/FSL SoCs support the TZASC-380 IP block and allow
the DDR connected via the TZASC to be partitioned into regions
having different security settings and also allow subregions
to be disabled.

This patch enables this support and can be used for SoCs which
support such a partition of DDR regions.

Details of the 'subregion_disable' register can be viewed here:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0431c/CHDIGDCI.html

Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@nxp.com>
[bhupesh.linux@gmail.com : Added gmail ID as NXP one is no longer valid]
Signed-off-by: Bhupesh Sharma <bhupesh.linux@gmail.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Bhupesh Sharma
2017-01-20 17:10:45 +05:30
committed by Leif Lindholm
parent c1b0828b3b
commit 465663e9f1
3 changed files with 35 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
ArmPlatformPkg/Drivers/ArmTrustZone/ArmTrustZone.c
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@@ -87,20 +87,27 @@ TZASCSetRegion (
IN UINTN LowAddress,
IN UINTN HighAddress,
IN UINTN Size,
IN UINTN Security
IN UINTN Security,
IN UINTN SubregionDisableMask
)
{
UINT32* Region;
UINT32 RegionAttributes;
if (RegionId > TZASCGetNumRegions(TzascBase)) {
return EFI_INVALID_PARAMETER;
}
RegionAttributes = TZASC_REGION_ATTR_SECURITY(Security) |
TZASC_REGION_ATTR_SUBREG_DISABLE(SubregionDisableMask) |
TZASC_REGION_ATTR_SIZE(Size) |
TZASC_REGION_ATTR_ENABLE(Enabled);
Region = (UINT32*)((UINTN)TzascBase + TZASC_REGIONS_REG + (RegionId * 0x10));
MmioWrite32((UINTN)(Region), LowAddress&0xFFFF8000);
MmioWrite32((UINTN)(Region), TZASC_REGION_SETUP_LO_ADDR(LowAddress));
MmioWrite32((UINTN)(Region+1), HighAddress);
MmioWrite32((UINTN)(Region+2), ((Security & 0xF) <<28) | ((Size & 0x3F) << 1) | (Enabled & 0x1));
MmioWrite32((UINTN)(Region+2), RegionAttributes);
return EFI_SUCCESS;
}