Inline ASM in .c file is specific to MS tool-chain. Other tool-chain (such as Intel compiler) may not support it. Add in .asm files to make these function to be built by Assembler so that they are avaliable too for other tool-chain.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5529 6f19259b-4bc3-4df7-8a09-765794883524

EdkCompatibilityPkg/Foundation/Library/EfiCommonLib/Ia32/RShiftU64.asm

@@ -0,0 +1,78 @@
+;/*++
+;
+;Copyright (c) 2006, Intel Corporation                                                         
+;All rights reserved. This program and the accompanying materials                          
+;are licensed and made available under the terms and conditions of the BSD License         
+;which accompanies this distribution.  The full text of the license may be found at        
+;http://opensource.org/licenses/bsd-license.php                                            
+;                                                                                          
+;THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+;WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+;
+;Module Name:
+;
+;  RShiftU64.c
+;
+;Abstract:
+;
+;  64-bit right shift function for IA-32
+;
+;--*/
+;
+;#include "Tiano.h"
+;
+;---------------------------------------------------------------------------
+    .686
+    .model  flat,C
+    .code
+
+;---------------------------------------------------------------------------
+;UINT64
+;RShiftU64 (
+;  IN UINT64   Operand,
+;  IN UINTN    Count
+;  )
+;/*++
+;
+;Routine Description:
+;  This routine allows a 64 bit value to be right shifted by 32 bits and returns the 
+;  shifted value.
+;  Count is valid up 63. (Only Bits 0-5 is valid for Count)
+;Arguments:
+;  Operand - Value to be shifted
+;  Count   - Number of times to shift right.
+; 
+;Returns:
+;
+;  Value shifted right identified by the Count.
+;
+;--*/
+RShiftU64 PROC
+  
+    mov    eax, [esp + 4]; dword ptr Operand[0]
+    mov    edx, [esp + 8]; dword ptr Operand[4]
+  
+    ;
+    ; CL is valid from 0 - 31. shld will move EDX:EAX by CL times but EDX is not touched
+    ; For CL of 32 - 63, it will be shifted 0 - 31 so we will move edx to eax later. 
+    ;
+    mov    ecx, [esp + 0Ch] ; Count
+    and    ecx, 63
+    shrd   eax, edx, cl
+    shr    edx, cl
+
+    cmp    ecx, 32
+    jc     short _RShiftU64_Done
+
+    ;
+    ; Since Count is 32 - 63, edx will have been shifted  by 0 - 31                                                     
+    ; If shifted by 32 or more, set upper 32 bits to zero.
+    ;
+    mov    eax, edx
+    xor    edx, edx
+
+_RShiftU64_Done:
+
+    ret
+RShiftU64 ENDP	
+	END