ShellPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the ShellPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Michael Kubacki
committed by
mergify[bot]
mergify[bot]
parent
c411b485b6
commit
47d20b54f9
@ -19,9 +19,9 @@
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#include "MadtParser.h"
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// Local Variables
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STATIC CONST UINT8* MadtInterruptControllerType;
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STATIC CONST UINT8* MadtInterruptControllerLength;
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STATIC ACPI_DESCRIPTION_HEADER_INFO AcpiHdrInfo;
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STATIC CONST UINT8 *MadtInterruptControllerType;
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STATIC CONST UINT8 *MadtInterruptControllerLength;
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STATIC ACPI_DESCRIPTION_HEADER_INFO AcpiHdrInfo;
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/**
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This function validates the System Vector Base in the GICD.
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@ -34,15 +34,15 @@ STATIC
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VOID
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EFIAPI
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ValidateGICDSystemVectorBase (
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IN UINT8* Ptr,
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IN VOID* Context
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)
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IN UINT8 *Ptr,
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IN VOID *Context
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)
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{
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if (*(UINT32*)Ptr != 0) {
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if (*(UINT32 *)Ptr != 0) {
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IncrementErrorCount ();
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Print (
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L"\nERROR: System Vector Base must be zero."
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);
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);
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}
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}
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@ -57,13 +57,13 @@ STATIC
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VOID
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EFIAPI
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ValidateSpeOverflowInterrupt (
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IN UINT8* Ptr,
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IN VOID* Context
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IN UINT8 *Ptr,
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IN VOID *Context
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)
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{
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UINT16 SpeOverflowInterrupt;
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UINT16 SpeOverflowInterrupt;
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SpeOverflowInterrupt = *(UINT16*)Ptr;
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SpeOverflowInterrupt = *(UINT16 *)Ptr;
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// SPE not supported by this processor
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if (SpeOverflowInterrupt == 0) {
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@ -73,183 +73,183 @@ ValidateSpeOverflowInterrupt (
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if ((SpeOverflowInterrupt < ARM_PPI_ID_MIN) ||
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((SpeOverflowInterrupt > ARM_PPI_ID_MAX) &&
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(SpeOverflowInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
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(SpeOverflowInterrupt > ARM_PPI_ID_EXTENDED_MAX)) {
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(SpeOverflowInterrupt > ARM_PPI_ID_EXTENDED_MAX))
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{
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IncrementErrorCount ();
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Print (
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L"\nERROR: SPE Overflow Interrupt ID of %d is not in the allowed PPI ID "
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L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
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L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
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SpeOverflowInterrupt,
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ARM_PPI_ID_MIN,
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ARM_PPI_ID_MAX,
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ARM_PPI_ID_EXTENDED_MIN,
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ARM_PPI_ID_EXTENDED_MAX
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);
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);
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} else if (SpeOverflowInterrupt != ARM_PPI_ID_PMBIRQ) {
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IncrementWarningCount();
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IncrementWarningCount ();
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Print (
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L"\nWARNING: SPE Overflow Interrupt ID of %d is not compliant with SBSA "
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L"Level 3 PPI ID assignment: %d.",
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L"Level 3 PPI ID assignment: %d.",
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SpeOverflowInterrupt,
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ARM_PPI_ID_PMBIRQ
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);
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);
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}
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}
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/**
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An ACPI_PARSER array describing the GICC Interrupt Controller Structure.
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**/
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STATIC CONST ACPI_PARSER GicCParser[] = {
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{L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
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{L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
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STATIC CONST ACPI_PARSER GicCParser[] = {
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{ L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
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{ L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
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{L"CPU Interface Number", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
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{L"ACPI Processor UID", 4, 8, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Flags", 4, 12, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Parking Protocol Version", 4, 16, L"0x%x", NULL, NULL, NULL, NULL},
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{ L"CPU Interface Number", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"ACPI Processor UID", 4, 8, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Flags", 4, 12, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Parking Protocol Version", 4, 16, L"0x%x", NULL, NULL, NULL, NULL },
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{L"Performance Interrupt GSIV", 4, 20, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Parked Address", 8, 24, L"0x%lx", NULL, NULL, NULL, NULL},
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{L"Physical Base Address", 8, 32, L"0x%lx", NULL, NULL, NULL, NULL},
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{L"GICV", 8, 40, L"0x%lx", NULL, NULL, NULL, NULL},
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{L"GICH", 8, 48, L"0x%lx", NULL, NULL, NULL, NULL},
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{L"VGIC Maintenance interrupt", 4, 56, L"0x%x", NULL, NULL, NULL, NULL},
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{L"GICR Base Address", 8, 60, L"0x%lx", NULL, NULL, NULL, NULL},
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{L"MPIDR", 8, 68, L"0x%lx", NULL, NULL, NULL, NULL},
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{L"Processor Power Efficiency Class", 1, 76, L"0x%x", NULL, NULL, NULL,
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NULL},
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{L"Reserved", 1, 77, L"0x%x", NULL, NULL, NULL, NULL},
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{L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL,
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ValidateSpeOverflowInterrupt, NULL}
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{ L"Performance Interrupt GSIV", 4, 20, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Parked Address", 8, 24, L"0x%lx", NULL, NULL, NULL, NULL },
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{ L"Physical Base Address", 8, 32, L"0x%lx", NULL, NULL, NULL, NULL },
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{ L"GICV", 8, 40, L"0x%lx", NULL, NULL, NULL, NULL },
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{ L"GICH", 8, 48, L"0x%lx", NULL, NULL, NULL, NULL },
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{ L"VGIC Maintenance interrupt", 4, 56, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"GICR Base Address", 8, 60, L"0x%lx", NULL, NULL, NULL, NULL },
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{ L"MPIDR", 8, 68, L"0x%lx", NULL, NULL, NULL, NULL },
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{ L"Processor Power Efficiency Class", 1, 76, L"0x%x", NULL, NULL, NULL,
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NULL },
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{ L"Reserved", 1, 77, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL,
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ValidateSpeOverflowInterrupt, NULL }
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};
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/**
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An ACPI_PARSER array describing the GICD Interrupt Controller Structure.
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**/
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STATIC CONST ACPI_PARSER GicDParser[] = {
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{L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
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{L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
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STATIC CONST ACPI_PARSER GicDParser[] = {
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{ L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
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{ L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
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{L"GIC ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL},
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{L"System Vector Base", 4, 16, L"0x%x", NULL, NULL,
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ValidateGICDSystemVectorBase, NULL},
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{L"GIC Version", 1, 20, L"%d", NULL, NULL, NULL, NULL},
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{L"Reserved", 3, 21, L"%x %x %x", Dump3Chars, NULL, NULL, NULL}
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{ L"GIC ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL },
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{ L"System Vector Base", 4, 16, L"0x%x", NULL, NULL,
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ValidateGICDSystemVectorBase, NULL },
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{ L"GIC Version", 1, 20, L"%d", NULL, NULL, NULL, NULL },
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{ L"Reserved", 3, 21, L"%x %x %x", Dump3Chars, NULL, NULL, NULL }
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};
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/**
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An ACPI_PARSER array describing the MSI Frame Interrupt Controller Structure.
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**/
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STATIC CONST ACPI_PARSER GicMSIFrameParser[] = {
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{L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
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{L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
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STATIC CONST ACPI_PARSER GicMSIFrameParser[] = {
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{ L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
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{ L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
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{L"MSI Frame ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL},
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{L"Flags", 4, 16, L"0x%x", NULL, NULL, NULL, NULL},
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{ L"MSI Frame ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL },
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{ L"Flags", 4, 16, L"0x%x", NULL, NULL, NULL, NULL },
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{L"SPI Count", 2, 20, L"%d", NULL, NULL, NULL, NULL},
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{L"SPI Base", 2, 22, L"0x%x", NULL, NULL, NULL, NULL}
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{ L"SPI Count", 2, 20, L"%d", NULL, NULL, NULL, NULL },
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{ L"SPI Base", 2, 22, L"0x%x", NULL, NULL, NULL, NULL }
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};
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/**
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An ACPI_PARSER array describing the GICR Interrupt Controller Structure.
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**/
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STATIC CONST ACPI_PARSER GicRParser[] = {
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{L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
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{L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
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STATIC CONST ACPI_PARSER GicRParser[] = {
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{ L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
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{ L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
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{L"Discovery Range Base Address", 8, 4, L"0x%lx", NULL, NULL, NULL,
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NULL},
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{L"Discovery Range Length", 4, 12, L"0x%x", NULL, NULL, NULL, NULL}
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{ L"Discovery Range Base Address", 8, 4, L"0x%lx", NULL, NULL, NULL,
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NULL },
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{ L"Discovery Range Length", 4, 12, L"0x%x", NULL, NULL, NULL, NULL }
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};
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/**
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An ACPI_PARSER array describing the GIC ITS Interrupt Controller Structure.
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**/
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STATIC CONST ACPI_PARSER GicITSParser[] = {
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{L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
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{L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
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STATIC CONST ACPI_PARSER GicITSParser[] = {
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{ L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
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{ L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
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{L"GIC ITS ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL},
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{L"Reserved", 4, 16, L"0x%x", NULL, NULL, NULL, NULL}
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{ L"GIC ITS ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL },
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{ L"Reserved", 4, 16, L"0x%x", NULL, NULL, NULL, NULL }
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};
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/**
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An ACPI_PARSER array describing the IO APIC Structure.
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**/
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STATIC CONST ACPI_PARSER IoApic[] = {
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{L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
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{L"I/O APIC ID", 1, 2, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Reserved", 1, 3, L"0x%x", NULL, NULL, NULL, NULL},
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{L"I/O APIC Address", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Global System Interrupt Base", 4, 8, L"0x%x", NULL, NULL, NULL, NULL}
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STATIC CONST ACPI_PARSER IoApic[] = {
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{ L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
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{ L"I/O APIC ID", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Reserved", 1, 3, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"I/O APIC Address", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Global System Interrupt Base", 4, 8, L"0x%x", NULL, NULL, NULL, NULL }
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};
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/**
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An ACPI_PARSER array describing the Interrupt Source Override Structure.
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**/
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STATIC CONST ACPI_PARSER InterruptSourceOverride[] = {
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{L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
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{L"Bus", 1, 2, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Source", 1, 3, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Global System Interrupt", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Flags", 2, 8, L"0x%x", NULL, NULL, NULL, NULL}
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STATIC CONST ACPI_PARSER InterruptSourceOverride[] = {
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{ L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
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{ L"Bus", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Source", 1, 3, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Global System Interrupt", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Flags", 2, 8, L"0x%x", NULL, NULL, NULL, NULL }
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};
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/**
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An ACPI_PARSER array describing the Processor Local x2APIC Structure.
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**/
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STATIC CONST ACPI_PARSER ProcessorLocalX2Apic[] = {
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{L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
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{L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
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STATIC CONST ACPI_PARSER ProcessorLocalX2Apic[] = {
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{ L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
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{ L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
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{L"X2APIC ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Flags", 4, 8, L"0x%x", NULL, NULL, NULL, NULL},
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{L"ACPI Processor UID", 4, 12, L"0x%x", NULL, NULL, NULL, NULL}
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{ L"X2APIC ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Flags", 4, 8, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"ACPI Processor UID", 4, 12, L"0x%x", NULL, NULL, NULL, NULL }
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};
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/**
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An ACPI_PARSER array describing the Local x2APIC NMI Structure.
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**/
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STATIC CONST ACPI_PARSER LocalX2ApicNmi[] = {
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{L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
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{L"Flags", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
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STATIC CONST ACPI_PARSER LocalX2ApicNmi[] = {
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{ L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
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{ L"Flags", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
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{L"ACPI Processor UID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Local x2APIC LINT#", 1, 8, L"0x%x", NULL, NULL, NULL, NULL},
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{L"Reserved", 3, 9, L"0x%x%x%x", Dump3Chars, NULL, NULL, NULL}
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{ L"ACPI Processor UID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Local x2APIC LINT#", 1, 8, L"0x%x", NULL, NULL, NULL, NULL },
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{ L"Reserved", 3, 9, L"0x%x%x%x", Dump3Chars, NULL, NULL, NULL }
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};
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/**
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An ACPI_PARSER array describing the ACPI MADT Table.
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**/
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STATIC CONST ACPI_PARSER MadtParser[] = {
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STATIC CONST ACPI_PARSER MadtParser[] = {
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PARSE_ACPI_HEADER (&AcpiHdrInfo),
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{L"Local Interrupt Controller Address", 4, 36, L"0x%x", NULL, NULL, NULL,
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NULL},
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{L"Flags", 4, 40, L"0x%x", NULL, NULL, NULL, NULL}
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{ L"Local Interrupt Controller Address",4, 36, L"0x%x", NULL, NULL, NULL,
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NULL },
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{ L"Flags", 4, 40, L"0x%x", NULL, NULL, NULL,NULL}
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};
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/**
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An ACPI_PARSER array describing the MADT Interrupt Controller Structure Header Structure.
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**/
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STATIC CONST ACPI_PARSER MadtInterruptControllerHeaderParser[] = {
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{NULL, 1, 0, NULL, NULL, (VOID**)&MadtInterruptControllerType, NULL, NULL},
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{L"Length", 1, 1, NULL, NULL, (VOID**)&MadtInterruptControllerLength, NULL,
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NULL},
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{L"Reserved", 2, 2, NULL, NULL, NULL, NULL, NULL}
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STATIC CONST ACPI_PARSER MadtInterruptControllerHeaderParser[] = {
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{ NULL, 1, 0, NULL, NULL, (VOID **)&MadtInterruptControllerType, NULL, NULL },
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{ L"Length", 1, 1, NULL, NULL, (VOID **)&MadtInterruptControllerLength, NULL,
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NULL },
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{ L"Reserved", 2, 2, NULL, NULL, NULL, NULL, NULL }
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||||
};
|
||||
|
||||
/**
|
||||
@ -275,15 +275,15 @@ STATIC CONST ACPI_PARSER MadtInterruptControllerHeaderParser[] = {
|
||||
VOID
|
||||
EFIAPI
|
||||
ParseAcpiMadt (
|
||||
IN BOOLEAN Trace,
|
||||
IN UINT8* Ptr,
|
||||
IN UINT32 AcpiTableLength,
|
||||
IN UINT8 AcpiTableRevision
|
||||
IN BOOLEAN Trace,
|
||||
IN UINT8 *Ptr,
|
||||
IN UINT32 AcpiTableLength,
|
||||
IN UINT8 AcpiTableRevision
|
||||
)
|
||||
{
|
||||
UINT32 Offset;
|
||||
UINT8* InterruptContollerPtr;
|
||||
UINT32 GICDCount;
|
||||
UINT32 Offset;
|
||||
UINT8 *InterruptContollerPtr;
|
||||
UINT32 GICDCount;
|
||||
|
||||
GICDCount = 0;
|
||||
|
||||
@ -315,11 +315,12 @@ ParseAcpiMadt (
|
||||
// Check if the values used to control the parsing logic have been
|
||||
// successfully read.
|
||||
if ((MadtInterruptControllerType == NULL) ||
|
||||
(MadtInterruptControllerLength == NULL)) {
|
||||
(MadtInterruptControllerLength == NULL))
|
||||
{
|
||||
IncrementErrorCount ();
|
||||
Print (
|
||||
L"ERROR: Insufficient remaining table buffer length to read the " \
|
||||
L"Interrupt Controller Structure header. Length = %d.\n",
|
||||
L"Interrupt Controller Structure header. Length = %d.\n",
|
||||
AcpiTableLength - Offset
|
||||
);
|
||||
return;
|
||||
@ -327,11 +328,12 @@ ParseAcpiMadt (
|
||||
|
||||
// Validate Interrupt Controller Structure length
|
||||
if ((*MadtInterruptControllerLength == 0) ||
|
||||
((Offset + (*MadtInterruptControllerLength)) > AcpiTableLength)) {
|
||||
((Offset + (*MadtInterruptControllerLength)) > AcpiTableLength))
|
||||
{
|
||||
IncrementErrorCount ();
|
||||
Print (
|
||||
L"ERROR: Invalid Interrupt Controller Structure length. " \
|
||||
L"Length = %d. Offset = %d. AcpiTableLength = %d.\n",
|
||||
L"Length = %d. Offset = %d. AcpiTableLength = %d.\n",
|
||||
*MadtInterruptControllerLength,
|
||||
Offset,
|
||||
AcpiTableLength
|
||||
@ -340,7 +342,8 @@ ParseAcpiMadt (
|
||||
}
|
||||
|
||||
switch (*MadtInterruptControllerType) {
|
||||
case EFI_ACPI_6_3_GIC: {
|
||||
case EFI_ACPI_6_3_GIC:
|
||||
{
|
||||
ParseAcpi (
|
||||
TRUE,
|
||||
2,
|
||||
@ -352,15 +355,17 @@ ParseAcpiMadt (
|
||||
break;
|
||||
}
|
||||
|
||||
case EFI_ACPI_6_3_GICD: {
|
||||
case EFI_ACPI_6_3_GICD:
|
||||
{
|
||||
if (++GICDCount > 1) {
|
||||
IncrementErrorCount ();
|
||||
Print (
|
||||
L"ERROR: Only one GICD must be present,"
|
||||
L" GICDCount = %d\n",
|
||||
L" GICDCount = %d\n",
|
||||
GICDCount
|
||||
);
|
||||
}
|
||||
|
||||
ParseAcpi (
|
||||
TRUE,
|
||||
2,
|
||||
@ -372,7 +377,8 @@ ParseAcpiMadt (
|
||||
break;
|
||||
}
|
||||
|
||||
case EFI_ACPI_6_3_GIC_MSI_FRAME: {
|
||||
case EFI_ACPI_6_3_GIC_MSI_FRAME:
|
||||
{
|
||||
ParseAcpi (
|
||||
TRUE,
|
||||
2,
|
||||
@ -384,7 +390,8 @@ ParseAcpiMadt (
|
||||
break;
|
||||
}
|
||||
|
||||
case EFI_ACPI_6_3_GICR: {
|
||||
case EFI_ACPI_6_3_GICR:
|
||||
{
|
||||
ParseAcpi (
|
||||
TRUE,
|
||||
2,
|
||||
@ -396,7 +403,8 @@ ParseAcpiMadt (
|
||||
break;
|
||||
}
|
||||
|
||||
case EFI_ACPI_6_3_GIC_ITS: {
|
||||
case EFI_ACPI_6_3_GIC_ITS:
|
||||
{
|
||||
ParseAcpi (
|
||||
TRUE,
|
||||
2,
|
||||
@ -408,7 +416,8 @@ ParseAcpiMadt (
|
||||
break;
|
||||
}
|
||||
|
||||
case EFI_ACPI_6_3_IO_APIC: {
|
||||
case EFI_ACPI_6_3_IO_APIC:
|
||||
{
|
||||
ParseAcpi (
|
||||
TRUE,
|
||||
2,
|
||||
@ -420,7 +429,8 @@ ParseAcpiMadt (
|
||||
break;
|
||||
}
|
||||
|
||||
case EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE: {
|
||||
case EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE:
|
||||
{
|
||||
ParseAcpi (
|
||||
TRUE,
|
||||
2,
|
||||
@ -432,7 +442,8 @@ ParseAcpiMadt (
|
||||
break;
|
||||
}
|
||||
|
||||
case EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC: {
|
||||
case EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC:
|
||||
{
|
||||
ParseAcpi (
|
||||
TRUE,
|
||||
2,
|
||||
@ -444,7 +455,8 @@ ParseAcpiMadt (
|
||||
break;
|
||||
}
|
||||
|
||||
case EFI_ACPI_6_3_LOCAL_X2APIC_NMI: {
|
||||
case EFI_ACPI_6_3_LOCAL_X2APIC_NMI:
|
||||
{
|
||||
ParseAcpi (
|
||||
TRUE,
|
||||
2,
|
||||
@ -456,11 +468,12 @@ ParseAcpiMadt (
|
||||
break;
|
||||
}
|
||||
|
||||
default: {
|
||||
default:
|
||||
{
|
||||
IncrementErrorCount ();
|
||||
Print (
|
||||
L"ERROR: Unknown Interrupt Controller Structure,"
|
||||
L" Type = %d, Length = %d\n",
|
||||
L" Type = %d, Length = %d\n",
|
||||
*MadtInterruptControllerType,
|
||||
*MadtInterruptControllerLength
|
||||
);
|
||||
@ -468,6 +481,6 @@ ParseAcpiMadt (
|
||||
} // switch
|
||||
|
||||
InterruptContollerPtr += *MadtInterruptControllerLength;
|
||||
Offset += *MadtInterruptControllerLength;
|
||||
Offset += *MadtInterruptControllerLength;
|
||||
} // while
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user