IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993 Add FSP-I API entry point for SMM support. Also update 64bit API entry code to assign ApiIdx to RAX to avoid confusion. Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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54
IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
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54
IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
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@@ -0,0 +1,54 @@
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## @file
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# Sec Core for FSP
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#
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# Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = FspSecCoreI
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FILE_GUID = 558782b5-782d-415e-ab9e-0ceb79dc3425
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MODULE_TYPE = SEC
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VERSION_STRING = 1.0
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#
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# The following information is for reference only and not required by the build tools.
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#
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# VALID_ARCHITECTURES = IA32 X64
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#
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[Sources]
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SecFspApiChk.c
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SecFsp.h
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[Sources.X64]
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X64/FspApiEntryI.nasm
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X64/FspApiEntryCommon.nasm
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X64/FspHelper.nasm
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[Sources.IA32]
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Ia32/FspApiEntryI.nasm
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Ia32/FspApiEntryCommon.nasm
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Ia32/FspHelper.nasm
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[Binaries.Ia32]
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RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC
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[Packages]
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MdePkg/MdePkg.dec
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IntelFsp2Pkg/IntelFsp2Pkg.dec
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[LibraryClasses]
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BaseMemoryLib
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DebugLib
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BaseLib
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PciCf8Lib
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SerialPortLib
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FspSwitchStackLib
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FspCommonLib
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FspSecPlatformLib
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44
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
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IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
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;; @file
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; Provide FSP API entry points.
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;
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; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;;
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SECTION .text
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;
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; Following functions will be provided in C
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;
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extern ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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; FspApiCommonContinue API
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;
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; This is the FSP API common entry point to resume the FSP execution
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(FspApiCommonContinue)
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ASM_PFX(FspApiCommonContinue):
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jmp $
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;----------------------------------------------------------------------------
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; FspSmmInit API
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;
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; This FSP API will notify the FSP about the different phases in the boot
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; process
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(FspSmmInitApi)
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ASM_PFX(FspSmmInitApi):
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mov eax, 7 ; FSP_API_INDEX.FspSmmInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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; Module Entrypoint API
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;----------------------------------------------------------------------------
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global ASM_PFX(_ModuleEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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jmp $
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; Add reference to APIs so that it will not be optimized by compiler
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jmp ASM_PFX(FspSmmInitApi)
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@@ -71,6 +71,19 @@ FspApiCallingCheck (
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Status = EFI_INVALID_PARAMETER;
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}
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}
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} else if (ApiIdx == FspSmmInitApiIndex) {
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//
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// FspSmmInitApiIndex check
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//
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if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {
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Status = EFI_UNSUPPORTED;
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} else {
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if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
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Status = EFI_UNSUPPORTED;
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} else if (EFI_ERROR (FspUpdSignatureCheck (FspSmmInitApiIndex, ApiParam))) {
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Status = EFI_INVALID_PARAMETER;
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}
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}
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} else {
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Status = EFI_UNSUPPORTED;
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}
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@@ -24,7 +24,7 @@ STACK_SAVED_RAX_OFFSET EQU 8 * 7 ; size of a general purpose register *
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;----------------------------------------------------------------------------
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global ASM_PFX(NotifyPhaseApi)
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ASM_PFX(NotifyPhaseApi):
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mov eax, 2 ; FSP_API_INDEX.NotifyPhaseApiIndex
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mov rax, 2 ; FSP_API_INDEX.NotifyPhaseApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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@@ -36,7 +36,7 @@ ASM_PFX(NotifyPhaseApi):
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;----------------------------------------------------------------------------
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global ASM_PFX(FspSiliconInitApi)
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ASM_PFX(FspSiliconInitApi):
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mov eax, 5 ; FSP_API_INDEX.FspSiliconInitApiIndex
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mov rax, 5 ; FSP_API_INDEX.FspSiliconInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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@@ -54,7 +54,7 @@ ASM_PFX(FspSiliconInitApi):
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global ASM_PFX(FspMultiPhaseSiInitApi)
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ASM_PFX(FspMultiPhaseSiInitApi):
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mov eax, 6 ; FSP_API_INDEX.FspMultiPhaseSiInitApiIndex
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mov rax, 6 ; FSP_API_INDEX.FspMultiPhaseSiInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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@@ -68,7 +68,7 @@ ASM_PFX(FspApiCommonContinue):
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;
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; Handle FspMultiPhaseSiInitApiIndex API
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;
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cmp eax, 6
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cmp rax, 6 ; FSP_API_INDEX.FspMultiPhaseSiInitApiIndex
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jnz NotMultiPhaseSiInitApi
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PUSHA_64
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44
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
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44
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
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@@ -0,0 +1,44 @@
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;; @file
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; Provide FSP API entry points.
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;
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; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;;
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SECTION .text
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;
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; Following functions will be provided in C
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;
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extern ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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; FspApiCommonContinue API
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;
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; This is the FSP API common entry point to resume the FSP execution
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(FspApiCommonContinue)
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ASM_PFX(FspApiCommonContinue):
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jmp $
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;----------------------------------------------------------------------------
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; FspSmmInit API
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;
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; This FSP API will notify the FSP about the different phases in the boot
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; process
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(FspSmmInitApi)
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ASM_PFX(FspSmmInitApi):
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mov rax, 7 ; FSP_API_INDEX.FspSmmInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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; Module Entrypoint API
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;----------------------------------------------------------------------------
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global ASM_PFX(_ModuleEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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jmp $
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; Add reference to APIs so that it will not be optimized by compiler
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jmp ASM_PFX(FspSmmInitApi)
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@@ -55,7 +55,7 @@ FSP_HEADER_CFGREG_OFFSET EQU 24h
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;----------------------------------------------------------------------------
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global ASM_PFX(FspMemoryInitApi)
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ASM_PFX(FspMemoryInitApi):
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mov eax, 3 ; FSP_API_INDEX.FspMemoryInitApiIndex
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mov rax, 3 ; FSP_API_INDEX.FspMemoryInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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@@ -66,7 +66,7 @@ ASM_PFX(FspMemoryInitApi):
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;----------------------------------------------------------------------------
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global ASM_PFX(TempRamExitApi)
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ASM_PFX(TempRamExitApi):
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mov eax, 4 ; FSP_API_INDEX.TempRamExitApiIndex
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mov rax, 4 ; FSP_API_INDEX.TempRamExitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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@@ -21,7 +21,7 @@ extern ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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global ASM_PFX(NotifyPhaseApi)
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ASM_PFX(NotifyPhaseApi):
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mov eax, 2 ; FSP_API_INDEX.NotifyPhaseApiIndex
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mov rax, 2 ; FSP_API_INDEX.NotifyPhaseApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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@@ -33,7 +33,7 @@ ASM_PFX(NotifyPhaseApi):
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;----------------------------------------------------------------------------
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global ASM_PFX(FspSiliconInitApi)
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ASM_PFX(FspSiliconInitApi):
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mov eax, 5 ; FSP_API_INDEX.FspSiliconInitApiIndex
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mov rax, 5 ; FSP_API_INDEX.FspSiliconInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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