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IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
Add FSP-I API entry point for SMM support.
Also update 64bit API entry code to assign ApiIdx to RAX
to avoid confusion.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
This commit is contained in:
Hongbin1 Zhang
2022-07-19 10:09:15 -07:00
committed by mergify[bot]
parent 24eac4caf3
commit 4824924377
13 changed files with 245 additions and 53 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
IntelFsp2Pkg/FspSecCore/X64/Fsp22ApiEntryS.nasm
View File

@@ -24,7 +24,7 @@ STACK_SAVED_RAX_OFFSET EQU 8 * 7 ; size of a general purpose register *
;----------------------------------------------------------------------------
global ASM_PFX(NotifyPhaseApi)
ASM_PFX(NotifyPhaseApi):
mov eax, 2 ; FSP_API_INDEX.NotifyPhaseApiIndex
mov rax, 2 ; FSP_API_INDEX.NotifyPhaseApiIndex
jmp ASM_PFX(FspApiCommon)
;----------------------------------------------------------------------------
@@ -36,7 +36,7 @@ ASM_PFX(NotifyPhaseApi):
;----------------------------------------------------------------------------
global ASM_PFX(FspSiliconInitApi)
ASM_PFX(FspSiliconInitApi):
mov eax, 5 ; FSP_API_INDEX.FspSiliconInitApiIndex
mov rax, 5 ; FSP_API_INDEX.FspSiliconInitApiIndex
jmp ASM_PFX(FspApiCommon)
;----------------------------------------------------------------------------
@@ -54,7 +54,7 @@ ASM_PFX(FspSiliconInitApi):
global ASM_PFX(FspMultiPhaseSiInitApi)
ASM_PFX(FspMultiPhaseSiInitApi):
mov eax, 6 ; FSP_API_INDEX.FspMultiPhaseSiInitApiIndex
mov rax, 6 ; FSP_API_INDEX.FspMultiPhaseSiInitApiIndex
jmp ASM_PFX(FspApiCommon)
;----------------------------------------------------------------------------
@@ -68,7 +68,7 @@ ASM_PFX(FspApiCommonContinue):
;
; Handle FspMultiPhaseSiInitApiIndex API
;
cmp eax, 6
cmp rax, 6 ; FSP_API_INDEX.FspMultiPhaseSiInitApiIndex
jnz NotMultiPhaseSiInitApi
PUSHA_64