diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
index 7e74a05df7..8b256de945 100644
--- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
+++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
@@ -50,12 +50,15 @@ PL011UartInitializePort (
 
   LineControl = 0;
 
-  // The PL011 supports a buffer of either 1 or 32 chars. Therefore we can accept
+  // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept
   // 1 char buffer as the minimum fifo size. Because everything can be rounded down,
   // there is no maximum fifo size.
   if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) {
     LineControl |= PL011_UARTLCR_H_FEN;
-    *ReceiveFifoDepth = 32;
+    if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4)
+      *ReceiveFifoDepth = 32;
+    else
+      *ReceiveFifoDepth = 16;
   } else {
     ASSERT (*ReceiveFifoDepth < 32);
     // Nothing else to do. 1 byte fifo is default.
diff --git a/ArmPlatformPkg/Include/Drivers/PL011Uart.h b/ArmPlatformPkg/Include/Drivers/PL011Uart.h
index 6675cefeb3..2fe796f9e4 100644
--- a/ArmPlatformPkg/Include/Drivers/PL011Uart.h
+++ b/ArmPlatformPkg/Include/Drivers/PL011Uart.h
@@ -35,6 +35,11 @@
 #define UARTICR                   0x044
 #define UARTDMACR                 0x048
 
+#define UARTPID0                  0xFE0
+#define UARTPID1                  0xFE4
+#define UARTPID2                  0xFE8
+#define UARTPID3                  0xFEC
+
 // Data status bits
 #define UART_DATA_ERROR_MASK      0x0F00
 
@@ -81,6 +86,9 @@
 #define PL011_UARTLCR_H_PEN       (1 << 1)  // Parity Enable
 #define PL011_UARTLCR_H_BRK       (1 << 0)  // Send break
 
+#define PL011_UARTPID2_VER(X)     (((X) >> 4) & 0xF)
+#define PL011_VER_R1P4            0x2
+
 /*
 
   Programmed hardware of Serial port.