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UefiCpuPkg/SmmCpuFeaturesLib: replace hard-coded machine code

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Replace hard-coded machine code with equivalent assembly source code.
Changes tested by checking for machine code equivalence by disassembling
the original and changed code.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chris Ruffin <chris.ruffin@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
This commit is contained in:
Chris Ruffin
2017-09-28 09:51:44 +08:00
committed by Eric Dong
parent 94744aa2ce
commit 4c34a8ea19
4 changed files with 34 additions and 29 deletions
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24
UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
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@@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ;
; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -51,6 +51,11 @@ global ASM_PFX(gStmSmbase)
global ASM_PFX(gStmXdSupported)
extern ASM_PFX(gStmSmiHandlerIdtr)
ASM_PFX(gStmSmiCr3) EQU StmSmiCr3Patch - 4
ASM_PFX(gStmSmiStack) EQU StmSmiStackPatch - 4
ASM_PFX(gStmSmbase) EQU StmSmbasePatch - 4
ASM_PFX(gStmXdSupported) EQU StmXdSupportedPatch - 1
SECTION .text
BITS 16
@@ -66,8 +71,8 @@ _StmSmiEntryPoint:
o32 lgdt [cs:bx] ; lgdt fword ptr cs:[bx]
mov ax, PROTECT_MODE_CS
mov [cs:bx-0x2],ax
DB 0x66, 0xbf ; mov edi, SMBASE
ASM_PFX(gStmSmbase): DD 0
o32 mov edi, strict dword 0
StmSmbasePatch:
lea eax, [edi + (@32bit - _StmSmiEntryPoint) + 0x8000]
mov [cs:bx-0x6],eax
mov ebx, cr0
@@ -87,15 +92,15 @@ o16 mov es, ax
o16 mov fs, ax
o16 mov gs, ax
o16 mov ss, ax
DB 0xbc ; mov esp, imm32
ASM_PFX(gStmSmiStack): DD 0
mov esp, strict dword 0
StmSmiStackPatch:
mov eax, ASM_PFX(gStmSmiHandlerIdtr)
lidt [eax]
jmp ProtFlatMode
ProtFlatMode:
DB 0xb8 ; mov eax, imm32
ASM_PFX(gStmSmiCr3): DD 0
mov eax, strict dword 0
StmSmiCr3Patch:
mov cr3, eax
;
; Need to test for CR4 specific bit support
@@ -134,8 +139,8 @@ ASM_PFX(gStmSmiCr3): DD 0
.6:
; enable NXE if supported
DB 0b0h ; mov al, imm8
ASM_PFX(gStmXdSupported): DB 1
mov al, strict byte 1
StmXdSupportedPatch:
cmp al, 0
jz @SkipXd
;
@@ -268,4 +273,3 @@ _StmSmiHandler:
ASM_PFX(gcStmSmiHandlerSize) : DW $ - _StmSmiEntryPoint
ASM_PFX(gcStmSmiHandlerOffset) : DW _StmSmiHandler - _StmSmiEntryPoint