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1. Updated SetJump() and LongJump() for IPF

Browse Source 
2. Added assertion for SetJump() for all architectures
3. Added CpuSleep() for IPF

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@464 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
bxing
2006-06-10 07:16:11 +00:00
parent 8b4e96c42b
commit 4cbd217532
17 changed files with 511 additions and 471 deletions
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33
MdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c
View File

@@ -19,6 +19,22 @@
#pragma intrinsic (__break)
#pragma intrinsic (__mfa)
typedef struct {
UINT64 Status;
UINT64 r9;
UINT64 r10;
UINT64 r11;
} PAL_PROC_RETURN;
PAL_PROC_RETURN
PalCallStatic (
IN CONST VOID *PalEntryPoint,
IN UINT64 Arg1,
IN UINT64 Arg2,
IN UINT64 Arg3,
IN UINT64 Arg4
);
/**
Generates a breakpoint on the CPU.
@@ -117,3 +133,20 @@ EnableDisableInterrupts (
EnableInterrupts ();
DisableInterrupts ();
}
/**
Places the CPU in a sleep state until an interrupt is received.
Places the CPU in a sleep state until an interrupt is received. If interrupts
are disabled prior to calling this function, then the CPU will be placed in a
sleep state indefinitely.
**/
VOID
EFIAPI
CpuSleep (
VOID
)
{
PalCallStatic (NULL, 29, 0, 0, 0);
}

15
MdePkg/Library/BaseLib/Ipf/CpuFlushTlb.s
View File

@@ -23,20 +23,21 @@
.proc CpuFlushTlb
.type CpuFlushTlb, @function
CpuFlushTlb::
alloc loc0 = ar.pfs, 0, 2, 5, 0
alloc loc0 = ar.pfs, 0, 3, 5, 0
mov out0 = 0
mov out1 = 6
mov out2 = 0
mov out3 = 0
mov out4 = 0
mov loc1 = b0
br.call.sptk b0 = PalCallStatic
rsm 1 << 14 // Disable interrupts
mov out4 = 0
brl.call.sptk b0 = PalCallStatic
mov loc2 = psr // save PSR
mov ar.pfs = loc0
extr.u r14 = r10, 32, 32 // r14 <- count1
rsm 1 << 14 // Disable interrupts
extr.u r15 = r11, 32, 32 // r15 <- stride1
extr.u r10 = r10, 0, 32 // r10 <- count2
mov loc0 = psr
add r10 = -1, r10
extr.u r11 = r11, 0, 32 // r11 <- stride2
br.cond.sptk LoopPredicate
LoopOuter:
@@ -48,10 +49,10 @@ Loop:
br.ctop.sptk Loop
add r9 = r15, r9 // r9 += stride1
LoopPredicate:
cmp.ne p6, p7 = r0, r14 // count1 == 0?
cmp.ne p6 = r0, r14 // count1 == 0?
add r14 = -1, r14
(p6) br.cond.sptk LoopOuter
mov psr.l = loc0
mov psr.l = loc2
mov b0 = loc1
br.ret.sptk.many b0
.endp

7
MdePkg/Library/BaseLib/Ipf/PalCallStatic.s
View File

@@ -22,7 +22,7 @@
.type PalCallStatic, @function
.regstk 5, 0, 0, 0
PalCallStatic::
cmp.ne p6, p7 = r0, in0
cmp.eq p6 = r0, in0
mov r31 = in4
mov r8 = ip
(p6) mov in0 = ar.k5
@@ -39,8 +39,9 @@ PalCallStatic::
br.cond.sptk b7
PalProcReturn:
mov psr.l = in3
cmp.eq p6, p7 = in0, in1 // in1 == PAL_COPY_PAL?
(p6) cmp.eq p6, p7 = r0, r8 // Status == Success?
cmp.eq p6 = in0, in1 // in1 == PAL_COPY_PAL?
(p6) cmp.eq p6 = r0, r8 // Status == Success?
(p6) add in2 = r9, in2
(p6) mov ar.k5 = in2
mov b0 = in4
br.ret.sptk.many b0

121
MdePkg/Library/BaseLib/Ipf/longjmp.s Normal file
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@@ -0,0 +1,121 @@
/// @file
/// Contains an implementation of longjmp for the Itanium-based architecture.
///
/// Copyright (c) 2006, Intel Corporation
/// All rights reserved. This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: longjmp.s
///
///
.auto
.text
.proc InternalLongJump
.type InternalLongJump, @function
.regstk 2, 0, 0, 0
InternalLongJump::
add r10 = 0x10*20 + 8*14, in0
movl r2 = ~((((1 << 14) - 1) << 16) | 3)
ld8.nt1 r14 = [r10], -8*2 // BSP, skip PFS
mov r15 = ar.bspstore // BSPSTORE
ld8.nt1 r17 = [r10], -8 // UNAT after spill
mov r16 = ar.rsc // RSC
cmp.leu p6 = r14, r15
ld8.nt1 r18 = [r10], -8 // UNAT
ld8.nt1 r25 = [r10], -8 // b5
and r2 = r16, r2
ldf.fill.nt1 f2 = [in0], 0x10
ld8.nt1 r24 = [r10], -8 // b4
mov b5 = r25
mov ar.rsc = r2
ld8.nt1 r23 = [r10], -8 // b3
mov b4 = r24
ldf.fill.nt1 f3 = [in0], 0x10
mov ar.unat = r17
(p6) br.spnt.many _skip_flushrs
flushrs
mov r15 = ar.bsp // New BSPSTORE
_skip_flushrs:
mov r31 = ar.rnat // RNAT
loadrs
ldf.fill.nt1 f4 = [in0], 0x10
ld8.nt1 r22 = [r10], -8
dep r2 = -1, r14, 3, 6
ldf.fill.nt1 f5 = [in0], 0x10
ld8.nt1 r21 = [r10], -8
cmp.ltu p6 = r2, r15
ld8.nt1 r20 = [r10], -0x10 // skip sp
(p6) ld8.nta r31 = [r2]
mov b3 = r23
ldf.fill.nt1 f16 = [in0], 0x10
ld8.fill.nt1 r7 = [r10], -8
mov b2 = r22
ldf.fill.nt1 f17 = [in0], 0x10
ld8.fill.nt1 r6 = [r10], -8
mov b1 = r21
ldf.fill.nt1 f18 = [in0], 0x10
ld8.fill.nt1 r5 = [r10], -8
mov b0 = r20
ldf.fill.nt1 f19 = [in0], 0x10
ld8.fill.nt1 r4 = [r10], 8*13
ldf.fill.nt1 f20 = [in0], 0x10
ld8.nt1 r19 = [r10], 0x10 // PFS
ldf.fill.nt1 f21 = [in0], 0x10
ld8.nt1 r26 = [r10], 8 // Predicate
mov ar.pfs = r19
ldf.fill.nt1 f22 = [in0], 0x10
ld8.nt1 r27 = [r10], 8 // LC
mov pr = r26, -1
ldf.fill.nt1 f23 = [in0], 0x10
ld8.nt1 r28 = [r10], -17*8 - 0x10
mov ar.lc = r27
ldf.fill.nt1 f24 = [in0], 0x10
ldf.fill.nt1 f25 = [in0], 0x10
mov r8 = in1
ldf.fill.nt1 f26 = [in0], 0x10
ldf.fill.nt1 f31 = [r10], -0x10
ldf.fill.nt1 f27 = [in0], 0x10
ldf.fill.nt1 f30 = [r10], -0x10
ldf.fill.nt1 f28 = [in0]
ldf.fill.nt1 f29 = [r10], 0x10*3 + 8*4
ld8.fill.nt1 sp = [r10]
mov ar.unat = r18
mov ar.bspstore = r14
mov ar.rnat = r31
invala
mov ar.rsc = r16
br.ret.sptk b0
.endp

373
MdePkg/Library/BaseLib/Ipf/setjmp.s
View File

@@ -1,317 +1,108 @@
/// @file
/// Contains an implementation of setjmp and longjmp for the
/// Itanium-based architecture.
/// Contains an implementation of longjmp for the Itanium-based architecture.
///
/// Copyright (c) 2006, Intel Corporation
/// All rights reserved. This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: setjmp.s
/// Copyright (c) 2006, Intel Corporation
/// All rights reserved. This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: longjmp.s
///
///
.file "setjmp.s"
.auto
.text
#include "asm.h"
#include "ia_64gen.h"
.global InternalAssertJumpBuffer
.type InternalAssertJumpBuffer, @function
/// int SetJump(struct jmp_buffer save)
///
/// Setup a non-local goto.
///
/// Description:
///
/// SetJump stores the current register set in the area pointed to
/// by "save". It returns zero. Subsequent calls to "LongJump" will
/// restore the registers and return non-zero to the same location.
///
/// On entry, r32 contains the pointer to the jmp_buffer
///
.proc SetJump
.type SetJump, @function
SetJump::
alloc loc0 = ar.pfs, 1, 2, 1, 0
mov loc1 = b0
mov out0 = in0
PROCEDURE_ENTRY(SetJump)
//
// Make sure buffer is aligned at 16byte boundary
//
mov r32 = r33
brl.call.sptk.many b0 = InternalAssertJumpBuffer
add r10 = -0x10,r0 ;; // mask the lower 4 bits
and r32 = r32, r10;;
add r32 = 0x10, r32;; // move to next 16 byte boundary
mov r14 = ar.unat
mov r15 = ar.bsp
add r10 = 0x10*20, in0
add r10 = J_PREDS, r32 // skip Unats & pfs save area
add r11 = J_BSP, r32
//
// save immediate context
//
mov r2 = ar.bsp // save backing store pointer
mov r3 = pr // save predicates
;;
//
// save user Unat register
//
mov r16 = ar.lc // save loop count register
mov r14 = ar.unat // save user Unat register
stf.spill.nta [in0] = f2, 0x10
st8.spill.nta [r10] = r4, 8
mov r21 = b1
st8 [r10] = r3, J_LC-J_PREDS
st8 [r11] = r2, J_R4-J_BSP
;;
st8 [r10] = r16, J_R5-J_LC
st8 [r32] = r14, J_NATS // Note: Unat at the
// beginning of the save area
mov r15 = ar.pfs
;;
//
// save preserved general registers & NaT's
//
st8.spill [r11] = r4, J_R6-J_R4
;;
st8.spill [r10] = r5, J_R7-J_R5
;;
st8.spill [r11] = r6, J_SP-J_R6
;;
st8.spill [r10] = r7, J_F3-J_R7
;;
st8.spill [r11] = sp, J_F2-J_SP
;;
//
// save spilled Unat and pfs registers
//
mov r2 = ar.unat // save Unat register after spill
;;
st8 [r32] = r2, J_PFS-J_NATS // save unat for spilled regs
;;
st8 [r32] = r15 // save pfs
//
// save floating registers
//
stf.spill [r11] = f2, J_F4-J_F2
stf.spill [r10] = f3, J_F5-J_F3
;;
stf.spill [r11] = f4, J_F16-J_F4
stf.spill [r10] = f5, J_F17-J_F5
;;
stf.spill [r11] = f16, J_F18-J_F16
stf.spill [r10] = f17, J_F19-J_F17
;;
stf.spill [r11] = f18, J_F20-J_F18
stf.spill [r10] = f19, J_F21-J_F19
;;
stf.spill [r11] = f20, J_F22-J_F20
stf.spill [r10] = f21, J_F23-J_F21
;;
stf.spill [r11] = f22, J_F24-J_F22
stf.spill [r10] = f23, J_F25-J_F23
;;
stf.spill [r11] = f24, J_F26-J_F24
stf.spill [r10] = f25, J_F27-J_F25
;;
stf.spill [r11] = f26, J_F28-J_F26
stf.spill [r10] = f27, J_F29-J_F27
;;
stf.spill [r11] = f28, J_F30-J_F28
stf.spill [r10] = f29, J_F31-J_F29
;;
stf.spill [r11] = f30, J_FPSR-J_F30
stf.spill [r10] = f31, J_B0-J_F31 // size of f31 + fpsr
//
// save FPSR register & branch registers
//
mov r2 = ar.fpsr // save fpsr register
mov r3 = b0
;;
st8 [r11] = r2, J_B1-J_FPSR
st8 [r10] = r3, J_B2-J_B0
mov r2 = b1
mov r3 = b2
;;
st8 [r11] = r2, J_B3-J_B1
st8 [r10] = r3, J_B4-J_B2
mov r2 = b3
mov r3 = b4
;;
st8 [r11] = r2, J_B5-J_B3
st8 [r10] = r3
mov r2 = b5
;;
st8 [r11] = r2
;;
//
// return
//
mov r8 = r0 // return 0 from setjmp
mov ar.unat = r14 // restore unat
br.ret.sptk b0
stf.spill.nta [in0] = f3, 0x10
st8.spill.nta [r10] = r5, 8
mov r22 = b2
PROCEDURE_EXIT(SetJump)
stf.spill.nta [in0] = f4, 0x10
st8.spill.nta [r10] = r6, 8
mov r23 = b3
stf.spill.nta [in0] = f5, 0x10
st8.spill.nta [r10] = r7, 8
mov r24 = b4
//
// void _LongJump(struct jmp_buffer *)
//
// Perform a non-local goto.
//
// Description:
//
// LongJump initializes the register set to the values saved by a
// previous 'SetJump' and jumps to the return location saved by that
// 'SetJump'. This has the effect of unwinding the stack and returning
// for a second time to the 'SetJump'.
//
stf.spill.nta [in0] = f16, 0x10
st8.spill.nta [r10] = sp, 8
mov r25 = b5
PROCEDURE_ENTRY(_LongJump)
//
// Make sure buffer is aligned at 16byte boundary
//
mov r32 = r33
stf.spill.nta [in0] = f17, 0x10
st8.nta [r10] = loc1, 8
mov r16 = pr
add r10 = -0x10,r0 ;; // mask the lower 4 bits
and r32 = r32, r10;;
add r32 = 0x10, r32;; // move to next 16 byte boundary
stf.spill.nta [in0] = f18, 0x10
st8.nta [r10] = r21, 8
mov r17 = ar.lc
//
// caching the return value as we do invala in the end
//
/// mov r8 = r33 // return value
mov r8 = 1 // For now return hard coded 1
stf.spill.nta [in0] = f19, 0x10
st8.nta [r10] = r22, 8
//
// get immediate context
//
mov r14 = ar.rsc // get user RSC conf
add r10 = J_PFS, r32 // get address of pfs
add r11 = J_NATS, r32
;;
ld8 r15 = [r10], J_BSP-J_PFS // get pfs
ld8 r2 = [r11], J_LC-J_NATS // get unat for spilled regs
;;
mov ar.unat = r2
;;
ld8 r16 = [r10], J_PREDS-J_BSP // get backing store pointer
mov ar.rsc = r0 // put RSE in enforced lazy
mov ar.pfs = r15
;;
//
// while returning from longjmp the BSPSTORE and BSP needs to be
// same and discard all the registers allocated after we did
// setjmp. Also, we need to generate the RNAT register since we
// did not flushed the RSE on setjmp.
//
mov r17 = ar.bspstore // get current BSPSTORE
;;
cmp.ltu p6,p7 = r17, r16 // is it less than BSP of
(p6) br.spnt.few .flush_rse
mov r19 = ar.rnat // get current RNAT
;;
loadrs // invalidate dirty regs
br.sptk.many .restore_rnat // restore RNAT
stf.spill.nta [in0] = f20, 0x10
st8.nta [r10] = r23, 8
.flush_rse:
flushrs
;;
mov r19 = ar.rnat // get current RNAT
mov r17 = r16 // current BSPSTORE
;;
.restore_rnat:
//
// check if RNAT is saved between saved BSP and curr BSPSTORE
//
dep r18 = 1,r16,3,6 // get RNAT address
;;
cmp.ltu p8,p9 = r18, r17 // RNAT saved on RSE
;;
(p8) ld8 r19 = [r18] // get RNAT from RSE
;;
mov ar.bspstore = r16 // set new BSPSTORE
;;
mov ar.rnat = r19 // restore RNAT
mov ar.rsc = r14 // restore RSC conf
stf.spill.nta [in0] = f21, 0x10
st8.nta [r10] = r24, 8
stf.spill.nta [in0] = f22, 0x10
st8.nta [r10] = r25, 8
ld8 r3 = [r11], J_R4-J_LC // get lc register
ld8 r2 = [r10], J_R5-J_PREDS // get predicates
;;
mov pr = r2, -1
mov ar.lc = r3
//
// restore preserved general registers & NaT's
//
ld8.fill r4 = [r11], J_R6-J_R4
;;
ld8.fill r5 = [r10], J_R7-J_R5
ld8.fill r6 = [r11], J_SP-J_R6
;;
ld8.fill r7 = [r10], J_F2-J_R7
ld8.fill sp = [r11], J_F3-J_SP
;;
//
// restore floating registers
//
ldf.fill f2 = [r10], J_F4-J_F2
ldf.fill f3 = [r11], J_F5-J_F3
;;
ldf.fill f4 = [r10], J_F16-J_F4
ldf.fill f5 = [r11], J_F17-J_F5
;;
ldf.fill f16 = [r10], J_F18-J_F16
ldf.fill f17 = [r11], J_F19-J_F17
;;
ldf.fill f18 = [r10], J_F20-J_F18
ldf.fill f19 = [r11], J_F21-J_F19
;;
ldf.fill f20 = [r10], J_F22-J_F20
ldf.fill f21 = [r11], J_F23-J_F21
;;
ldf.fill f22 = [r10], J_F24-J_F22
ldf.fill f23 = [r11], J_F25-J_F23
;;
ldf.fill f24 = [r10], J_F26-J_F24
ldf.fill f25 = [r11], J_F27-J_F25
;;
ldf.fill f26 = [r10], J_F28-J_F26
ldf.fill f27 = [r11], J_F29-J_F27
;;
ldf.fill f28 = [r10], J_F30-J_F28
ldf.fill f29 = [r11], J_F31-J_F29
;;
ldf.fill f30 = [r10], J_FPSR-J_F30
ldf.fill f31 = [r11], J_B0-J_F31 ;;
stf.spill.nta [in0] = f23, 0x10
mov r18 = ar.unat
//
// restore branch registers and fpsr
//
ld8 r16 = [r10], J_B1-J_FPSR // get fpsr
ld8 r17 = [r11], J_B2-J_B0 // get return pointer
;;
mov ar.fpsr = r16
mov b0 = r17
ld8 r2 = [r10], J_B3-J_B1
ld8 r3 = [r11], J_B4-J_B2
;;
mov b1 = r2
mov b2 = r3
ld8 r2 = [r10], J_B5-J_B3
ld8 r3 = [r11]
;;
mov b3 = r2
mov b4 = r3
ld8 r2 = [r10]
ld8 r21 = [r32] // get user unat
;;
mov b5 = r2
mov ar.unat = r21
stf.spill.nta [in0] = f24, 0x10
st8.nta [r10] = r14, 8 // UNAT
//
// invalidate ALAT
//
invala ;;
stf.spill.nta [in0] = f25, 0x10
st8.nta [r10] = r18, 8 // UNAT after spill
br.ret.sptk b0
PROCEDURE_EXIT(_LongJump)
stf.spill.nta [in0] = f26, 0x10
st8.nta [r10] = loc0, 8 // PFS
stf.spill.nta [in0] = f27, 0x10
st8.nta [r10] = r15, 8 // BSP
mov r8 = 0
stf.spill.nta [in0] = f28, 0x10
mov r19 = ar.fpsr
stf.spill.nta [in0] = f29, 0x10
st8.nta [r10] = r16, 8 // PR
mov ar.pfs = loc0
stf.spill.nta [in0] = f30, 0x10
st8.nta [r10] = r17, 8 // LC
mov b0 = loc1
stf.spill.nta [in0] = f31, 0x10
st8.nta [r10] = r19 // FPSR
mov ar.unat = r14
br.ret.sptk b0
.endp SetJump