add corresponding .S files for BaseMemoryLibXXX X64 arch. Note that we use ".intel_syntax noprefix" directive to simplify the .S implementation.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6184 6f19259b-4bc3-4df7-8a09-765794883524
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73
MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.S
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73
MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.S
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#
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# ConvertAsm.py: Automatically generated from SetMem.asm
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#
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006, Intel Corporation
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# SetMem.S
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#
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# Abstract:
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#
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# SetMem function
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#
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# Notes:
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#
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# VOID *
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# EFIAPI
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# InternalMemSetMem (
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# IN VOID *Buffer,
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# IN UINTN Count,
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# IN UINT8 Value
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# )
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#------------------------------------------------------------------------------
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.intel_syntax noprefix
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.globl ASM_PFX(InternalMemSetMem)
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ASM_PFX(InternalMemSetMem):
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push rdi
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mov rdi, rcx # rdi <- Buffer
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mov al, r8b # al <- Value
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mov r9, rdi # r9 <- Buffer as return value
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xor rcx, rcx
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sub rcx, rdi
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and rcx, 15 # rcx + rdi aligns on 16-byte boundary
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jz L0
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cmp rcx, rdx
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cmova rcx, rdx
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sub rdx, rcx
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rep stosb
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L0:
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mov rcx, rdx
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and rdx, 15
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shr rcx, 4
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jz _SetBytes_L2
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mov ah, al # ax <- Value repeats twice
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movdqa [rsp + 0x10], xmm0 # save xmm0
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movd xmm0, eax # xmm0[0..16] <- Value repeats twice
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pshuflw xmm0, xmm0, 0 # xmm0[0..63] <- Value repeats 8 times
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movlhps xmm0, xmm0 # xmm0 <- Value repeats 16 times
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L1:
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movntdq [rdi], xmm0 # rdi should be 16-byte aligned
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add rdi, 16
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loop L1
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mfence
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movdqa xmm0, [rsp + 0x10] # restore xmm0
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_SetBytes_L2:
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mov ecx, edx # high 32 bits of rcx are always zero
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rep stosb
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mov rax, r9 # rax <- Return value
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pop rdi
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ret
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