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Give the output information in right place.

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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5317 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
vanjeff
2008-06-03 02:16:12 +00:00
parent 86b2b825c4
commit 4ecdb8690f
1 changed files with 103 additions and 103 deletions
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206
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c
View File

@ -1222,122 +1222,122 @@ PciScanBus_WithoutHotPlugDeviceSupport (
Func Func
); );
if (!EFI_ERROR (Status) && if (!EFI_ERROR (Status)) {
(IS_PCI_BRIDGE (&Pci) || DEBUG((EFI_D_ERROR, "Found DEV(%02d,%02d,%02d)\n", StartBusNumber, Device, Func));
IS_CARDBUS_BRIDGE (&Pci))) {
if (IS_PCI_BRIDGE (&Pci) ||
IS_CARDBUS_BRIDGE (&Pci)) {
DEBUG((EFI_D_ERROR, "Found DEV(%02d,%02d,%02d)\n", StartBusNumber, Device, Func ));
//
// Get the bridge information
//
Status = PciSearchDevice (
Bridge,
&Pci,
StartBusNumber,
Device,
Func,
&PciDevice
);
if (EFI_ERROR (Status)) {
return Status;
}
//
// Add feature to support customized secondary bus number
//
if (*SubBusNumber == 0) {
*SubBusNumber = *PaddedBusRange;
*PaddedBusRange = 0;
}
(*SubBusNumber)++;
SecondBus = (*SubBusNumber);
Register = (UINT16) ((SecondBus << 8) | (UINT16) StartBusNumber);
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x18);
Status = PciRootBridgeIoWrite (
PciRootBridgeIo,
&Pci,
EfiPciWidthUint16,
Address,
1,
&Register
);
//
// Initialize SubBusNumber to SecondBus
//
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);
Status = PciRootBridgeIoWrite (
PciRootBridgeIo,
&Pci,
EfiPciWidthUint8,
Address,
1,
SubBusNumber
);
//
// If it is PPB, resursively search down this bridge
//
if (IS_PCI_BRIDGE (&Pci)) {
// //
// Temporarily initialize SubBusNumber to maximum bus number to ensure the // Get the bridge information
// PCI configuration transaction to go through any PPB
// //
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A); Status = PciSearchDevice (
Register = 0xFF; Bridge,
&Pci,
StartBusNumber,
Device,
Func,
&PciDevice
);
if (EFI_ERROR (Status)) {
return Status;
}
//
// Add feature to support customized secondary bus number
//
if (*SubBusNumber == 0) {
*SubBusNumber = *PaddedBusRange;
*PaddedBusRange = 0;
}
(*SubBusNumber)++;
SecondBus = (*SubBusNumber);
Register = (UINT16) ((SecondBus << 8) | (UINT16) StartBusNumber);
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x18);
Status = PciRootBridgeIoWrite (
PciRootBridgeIo,
&Pci,
EfiPciWidthUint16,
Address,
1,
&Register
);
//
// Initialize SubBusNumber to SecondBus
//
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);
Status = PciRootBridgeIoWrite ( Status = PciRootBridgeIoWrite (
PciRootBridgeIo, PciRootBridgeIo,
&Pci, &Pci,
EfiPciWidthUint8, EfiPciWidthUint8,
Address, Address,
1, 1,
&Register SubBusNumber
); );
//
PreprocessController ( // If it is PPB, resursively search down this bridge
PciDevice, //
PciDevice->BusNumber, if (IS_PCI_BRIDGE (&Pci)) {
PciDevice->DeviceNumber, //
PciDevice->FunctionNumber, // Temporarily initialize SubBusNumber to maximum bus number to ensure the
EfiPciBeforeChildBusEnumeration // PCI configuration transaction to go through any PPB
); //
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);
DEBUG((EFI_D_ERROR, "Scan PPB(%02d,%02d,%02d)\n", PciDevice->BusNumber, PciDevice->DeviceNumber,PciDevice->FunctionNumber )); Register = 0xFF;
Status = PciScanBus ( Status = PciRootBridgeIoWrite (
PciDevice, PciRootBridgeIo,
(UINT8) (SecondBus), &Pci,
SubBusNumber, EfiPciWidthUint8,
PaddedBusRange Address,
); 1,
&Register
if (EFI_ERROR (Status)) { );
return EFI_DEVICE_ERROR;
PreprocessController (
PciDevice,
PciDevice->BusNumber,
PciDevice->DeviceNumber,
PciDevice->FunctionNumber,
EfiPciBeforeChildBusEnumeration
);
DEBUG((EFI_D_ERROR, "Scan PPB(%02d,%02d,%02d)\n", PciDevice->BusNumber, PciDevice->DeviceNumber,PciDevice->FunctionNumber ));
Status = PciScanBus (
PciDevice,
(UINT8) (SecondBus),
SubBusNumber,
PaddedBusRange
);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
} }
//
// Set the current maximum bus number under the PPB
//
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);
Status = PciRootBridgeIoWrite (
PciRootBridgeIo,
&Pci,
EfiPciWidthUint8,
Address,
1,
SubBusNumber
);
} }
//
// Set the current maximum bus number under the PPB
//
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);
Status = PciRootBridgeIoWrite (
PciRootBridgeIo,
&Pci,
EfiPciWidthUint8,
Address,
1,
SubBusNumber
);
} }
if (Func == 0 && !IS_PCI_MULTI_FUNC (&Pci)) { if (Func == 0 && !IS_PCI_MULTI_FUNC (&Pci)) {
// //