PcAtChipsetPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the PcAtChipsetPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
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@@ -14,6 +14,6 @@
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0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } \
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}
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extern EFI_GUID gPcAtChipsetPkgTokenSpaceGuid;
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extern EFI_GUID gPcAtChipsetPkgTokenSpaceGuid;
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#endif
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@@ -8,6 +8,7 @@
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __IO_APIC_LIB_H__
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#define __IO_APIC_LIB_H__
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@@ -96,4 +97,5 @@ IoApicConfigureInterrupt (
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IN BOOLEAN LevelTriggered,
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IN BOOLEAN AssertionLevel
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);
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#endif
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@@ -20,15 +20,15 @@
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///
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/// HPET Timer Register Offsets
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///
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#define HPET_MAIN_COUNTER_OFFSET 0x0F0
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#define HPET_TIMER_CONFIGURATION_OFFSET 0x100
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#define HPET_TIMER_COMPARATOR_OFFSET 0x108
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#define HPET_TIMER_MSI_ROUTE_OFFSET 0x110
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#define HPET_MAIN_COUNTER_OFFSET 0x0F0
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#define HPET_TIMER_CONFIGURATION_OFFSET 0x100
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#define HPET_TIMER_COMPARATOR_OFFSET 0x108
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#define HPET_TIMER_MSI_ROUTE_OFFSET 0x110
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///
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/// Stride between sets of HPET Timer Registers
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///
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#define HPET_TIMER_STRIDE 0x20
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#define HPET_TIMER_STRIDE 0x20
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#pragma pack(1)
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@@ -37,15 +37,15 @@
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///
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typedef union {
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struct {
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UINT32 Revision:8;
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UINT32 NumberOfTimers:5;
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UINT32 CounterSize:1;
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UINT32 Reserved0:1;
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UINT32 LegacyRoute:1;
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UINT32 VendorId:16;
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UINT32 CounterClockPeriod:32;
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UINT32 Revision : 8;
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UINT32 NumberOfTimers : 5;
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UINT32 CounterSize : 1;
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UINT32 Reserved0 : 1;
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UINT32 LegacyRoute : 1;
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UINT32 VendorId : 16;
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UINT32 CounterClockPeriod : 32;
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} Bits;
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UINT64 Uint64;
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UINT64 Uint64;
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} HPET_GENERAL_CAPABILITIES_ID_REGISTER;
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///
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@@ -53,12 +53,12 @@ typedef union {
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///
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typedef union {
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struct {
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UINT32 MainCounterEnable:1;
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UINT32 LegacyRouteEnable:1;
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UINT32 Reserved0:30;
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UINT32 Reserved1:32;
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UINT32 MainCounterEnable : 1;
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UINT32 LegacyRouteEnable : 1;
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UINT32 Reserved0 : 30;
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UINT32 Reserved1 : 32;
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} Bits;
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UINT64 Uint64;
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UINT64 Uint64;
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} HPET_GENERAL_CONFIGURATION_REGISTER;
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///
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@@ -66,22 +66,22 @@ typedef union {
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///
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typedef union {
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struct {
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UINT32 Reserved0:1;
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UINT32 LevelTriggeredInterrupt:1;
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UINT32 InterruptEnable:1;
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UINT32 PeriodicInterruptEnable:1;
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UINT32 PeriodicInterruptCapability:1;
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UINT32 CounterSizeCapability:1;
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UINT32 ValueSetEnable:1;
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UINT32 Reserved1:1;
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UINT32 CounterSizeEnable:1;
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UINT32 InterruptRoute:5;
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UINT32 MsiInterruptEnable:1;
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UINT32 MsiInterruptCapability:1;
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UINT32 Reserved2:16;
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UINT32 InterruptRouteCapability;
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UINT32 Reserved0 : 1;
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UINT32 LevelTriggeredInterrupt : 1;
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UINT32 InterruptEnable : 1;
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UINT32 PeriodicInterruptEnable : 1;
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UINT32 PeriodicInterruptCapability : 1;
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UINT32 CounterSizeCapability : 1;
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UINT32 ValueSetEnable : 1;
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UINT32 Reserved1 : 1;
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UINT32 CounterSizeEnable : 1;
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UINT32 InterruptRoute : 5;
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UINT32 MsiInterruptEnable : 1;
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UINT32 MsiInterruptCapability : 1;
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UINT32 Reserved2 : 16;
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UINT32 InterruptRouteCapability;
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} Bits;
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UINT64 Uint64;
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UINT64 Uint64;
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} HPET_TIMER_CONFIGURATION_REGISTER;
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///
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@@ -89,10 +89,10 @@ typedef union {
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///
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typedef union {
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struct {
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UINT32 Value:32;
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UINT32 Address:32;
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UINT32 Value : 32;
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UINT32 Address : 32;
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} Bits;
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UINT64 Uint64;
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UINT64 Uint64;
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} HPET_TIMER_MSI_ROUTE_REGISTER;
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#pragma pack()
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@@ -37,42 +37,42 @@
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typedef union {
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struct {
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UINT32 Reserved0:24;
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UINT32 Identification:4;
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UINT32 Reserved1:4;
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UINT32 Reserved0 : 24;
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UINT32 Identification : 4;
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UINT32 Reserved1 : 4;
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} Bits;
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UINT32 Uint32;
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UINT32 Uint32;
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} IO_APIC_IDENTIFICATION_REGISTER;
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typedef union {
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struct {
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UINT32 Version:8;
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UINT32 Reserved0:8;
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UINT32 MaximumRedirectionEntry:8;
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UINT32 Reserved1:8;
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UINT32 Version : 8;
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UINT32 Reserved0 : 8;
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UINT32 MaximumRedirectionEntry : 8;
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UINT32 Reserved1 : 8;
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} Bits;
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UINT32 Uint32;
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UINT32 Uint32;
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} IO_APIC_VERSION_REGISTER;
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typedef union {
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struct {
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UINT32 Vector: 8;
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UINT32 DeliveryMode: 3;
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UINT32 DestinationMode: 1;
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UINT32 DeliveryStatus: 1;
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UINT32 Polarity: 1;
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UINT32 RemoteIRR: 1;
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UINT32 TriggerMode: 1;
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UINT32 Mask: 1;
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UINT32 Reserved0: 15;
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UINT32 Reserved1: 24;
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UINT32 DestinationID: 8;
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UINT32 Vector : 8;
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UINT32 DeliveryMode : 3;
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UINT32 DestinationMode : 1;
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UINT32 DeliveryStatus : 1;
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UINT32 Polarity : 1;
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UINT32 RemoteIRR : 1;
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UINT32 TriggerMode : 1;
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UINT32 Mask : 1;
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UINT32 Reserved0 : 15;
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UINT32 Reserved1 : 24;
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UINT32 DestinationID : 8;
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} Bits;
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struct {
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UINT32 Low;
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UINT32 High;
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UINT32 Low;
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UINT32 High;
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} Uint32;
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UINT64 Uint64;
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UINT64 Uint64;
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} IO_APIC_REDIRECTION_TABLE_ENTRY;
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#pragma pack()
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