MdePkg/Library/BaseLib: Add BaseLib instance for host based unit tests

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2800

Add a new version of BaseLib that is safe for use from host based
unit test applications.  Host based unit test applications may need
to provide implementations of some BaseLib functions that provide
simple emulation to exercise the code under test.  The structure
UNIT_TEST_HOST_BASE_LIB is filled in with services that provide
default emulation for BaseLib APIs that would normally generate
exceptions in a host based unit test application.  This structure
allows an individual unit test to replace the default emulation of
a BaseLib service with an alternate version that is required by a
specific unit test.  A global variable of type UNIT_TEST_HOST_BASE_LIB
is provided through the new UnitTestHostBaseLib library class.

Normally cmocka would be used to mock services the code under
test calls.  However, the BaseLib is used by the Unit Test
Framework itself, so using a mocked interface is not possible.
The use of a structure to provide hooks for unit test is not
expected to be a common feature.  It should only be required
for libraries that are used by both the Unit Test Framework and
the code under test where the code under test requires a
different behavior than the Unit Test Framework.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

MdePkg/Library/BaseLib/UnitTestHost.c

@@ -0,0 +1,140 @@
+/** @file
+  Common Unit Test Host functions.
+
+  Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "UnitTestHost.h"
+
+///
+/// Module global variable for simple system emulation of interrupt state
+///
+STATIC BOOLEAN          mUnitTestHostBaseLibInterruptState;
+
+/**
+  Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+UnitTestHostBaseLibEnableInterrupts (
+  VOID
+  )
+{
+  mUnitTestHostBaseLibInterruptState = TRUE;
+}
+
+/**
+  Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+UnitTestHostBaseLibDisableInterrupts (
+  VOID
+  )
+{
+  mUnitTestHostBaseLibInterruptState = FALSE;
+}
+
+/**
+  Enables CPU interrupts for the smallest window required to capture any
+  pending interrupts.
+
+**/
+VOID
+EFIAPI
+UnitTestHostBaseLibEnableDisableInterrupts (
+  VOID
+  )
+{
+  mUnitTestHostBaseLibInterruptState = FALSE;
+}
+
+/**
+  Set the current CPU interrupt state.
+
+  Sets the current CPU interrupt state to the state specified by
+  InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
+  InterruptState is FALSE, then interrupts are disabled. InterruptState is
+  returned.
+
+  @param  InterruptState  TRUE if interrupts should enabled. FALSE if
+                          interrupts should be disabled.
+
+  @return InterruptState
+
+**/
+BOOLEAN
+EFIAPI
+UnitTestHostBaseLibGetInterruptState (
+  VOID
+  )
+{
+  return mUnitTestHostBaseLibInterruptState;
+}
+
+/**
+  Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+  VOID
+  )
+{
+  gUnitTestHostBaseLib.Common->EnableInterrupts ();
+}
+
+/**
+  Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+  VOID
+  )
+{
+  gUnitTestHostBaseLib.Common->DisableInterrupts ();
+}
+
+/**
+  Enables CPU interrupts for the smallest window required to capture any
+  pending interrupts.
+
+**/
+VOID
+EFIAPI
+EnableDisableInterrupts (
+  VOID
+  )
+{
+  gUnitTestHostBaseLib.Common->EnableDisableInterrupts ();
+}
+
+/**
+  Set the current CPU interrupt state.
+
+  Sets the current CPU interrupt state to the state specified by
+  InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
+  InterruptState is FALSE, then interrupts are disabled. InterruptState is
+  returned.
+
+  @param  InterruptState  TRUE if interrupts should enabled. FALSE if
+                          interrupts should be disabled.
+
+  @return InterruptState
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+  VOID
+  )
+{
+  return gUnitTestHostBaseLib.Common->GetInterruptState ();
+}

MdePkg/Library/BaseLib/UnitTestHost.h

@@ -0,0 +1,66 @@
+/** @file
+  Unit Test Host functions.
+
+  Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __UNIT_TEST_HOST_H__
+#define __UNIT_TEST_HOST_H__
+
+#include "BaseLibInternals.h"
+#include <Library/UnitTestHostBaseLib.h>
+
+/**
+  Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+UnitTestHostBaseLibEnableInterrupts (
+  VOID
+  );
+
+/**
+  Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+UnitTestHostBaseLibDisableInterrupts (
+  VOID
+  );
+
+/**
+  Enables CPU interrupts for the smallest window required to capture any
+  pending interrupts.
+
+**/
+VOID
+EFIAPI
+UnitTestHostBaseLibEnableDisableInterrupts (
+  VOID
+  );
+
+/**
+  Set the current CPU interrupt state.
+
+  Sets the current CPU interrupt state to the state specified by
+  InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
+  InterruptState is FALSE, then interrupts are disabled. InterruptState is
+  returned.
+
+  @param  InterruptState  TRUE if interrupts should enabled. FALSE if
+                          interrupts should be disabled.
+
+  @return InterruptState
+
+**/
+BOOLEAN
+EFIAPI
+UnitTestHostBaseLibGetInterruptState (
+  VOID
+  );
+
+#endif

MdePkg/Library/BaseLib/UnitTestHostBaseLib.inf

@@ -0,0 +1,217 @@
+## @file
+#  Base Library implementation for use with host based unit tests.
+#
+#  Copyright (c) 2007 - 2020, Intel Corporation. All rights reserved.<BR>
+#  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = UnitTestHostBaseLib
+  MODULE_UNI_FILE                = UnitTestHostBaseLib.uni
+  FILE_GUID                      = 9555A0D3-09BA-46C4-A51A-45198E3C765E
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.1
+  LIBRARY_CLASS                  = BaseLib|HOST_APPLICATION
+  LIBRARY_CLASS                  = UnitTestHostBaseLib|HOST_APPLICATION
+
+#
+#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64 RISCV64
+#
+
+[Sources]
+  CheckSum.c
+  SwitchStack.c
+  SwapBytes64.c
+  SwapBytes32.c
+  SwapBytes16.c
+  LongJump.c
+  SetJump.c
+  RShiftU64.c
+  RRotU64.c
+  RRotU32.c
+  MultU64x64.c
+  MultU64x32.c
+  MultS64x64.c
+  ModU64x32.c
+  LShiftU64.c
+  LRotU64.c
+  LRotU32.c
+  LowBitSet64.c
+  LowBitSet32.c
+  HighBitSet64.c
+  HighBitSet32.c
+  GetPowerOfTwo64.c
+  GetPowerOfTwo32.c
+  DivU64x64Remainder.c
+  DivU64x32Remainder.c
+  DivU64x32.c
+  DivS64x64Remainder.c
+  ARShiftU64.c
+  BitField.c
+  CpuDeadLoop.c
+  Cpu.c
+  LinkedList.c
+  SafeString.c
+  String.c
+  FilePaths.c
+  BaseLibInternals.h
+  UnitTestHost.c
+  UnitTestHost.h
+
+[Sources.Ia32]
+  Ia32/SwapBytes64.c | MSFT
+  Ia32/RRotU64.c | MSFT
+  Ia32/RShiftU64.c | MSFT
+  Ia32/ReadTsc.c | MSFT
+  Ia32/ReadEflags.c | MSFT
+  Ia32/ModU64x32.c | MSFT
+  Ia32/MultU64x64.c | MSFT
+  Ia32/MultU64x32.c | MSFT
+  Ia32/LShiftU64.c | MSFT
+  Ia32/LRotU64.c | MSFT
+  Ia32/FxRestore.c | MSFT
+  Ia32/FxSave.c | MSFT
+  Ia32/DivU64x32Remainder.c | MSFT
+  Ia32/DivU64x32.c | MSFT
+  Ia32/CpuPause.c | MSFT
+  Ia32/CpuBreakpoint.c | MSFT
+  Ia32/ARShiftU64.c | MSFT
+  Ia32/GccInline.c | GCC
+  Ia32/LongJump.nasm
+  Ia32/SetJump.nasm
+  Ia32/SwapBytes64.nasm| GCC
+  Ia32/DivU64x64Remainder.nasm
+  Ia32/DivU64x32Remainder.nasm| GCC
+  Ia32/ModU64x32.nasm| GCC
+  Ia32/DivU64x32.nasm| GCC
+  Ia32/MultU64x64.nasm| GCC
+  Ia32/MultU64x32.nasm| GCC
+  Ia32/RRotU64.nasm| GCC
+  Ia32/LRotU64.nasm| GCC
+  Ia32/ARShiftU64.nasm| GCC
+  Ia32/RShiftU64.nasm| GCC
+  Ia32/LShiftU64.nasm| GCC
+  Ia32/RdRand.nasm
+  Ia32/DivS64x64Remainder.c
+  Ia32/InternalSwitchStack.c | MSFT
+  Ia32/InternalSwitchStack.nasm | GCC
+  Ia32/Non-existing.c
+  Unaligned.c
+  X86FxSave.c
+  X86FxRestore.c
+  X86Msr.c
+  X86RdRand.c
+  X86SpeculationBarrier.c
+  X86UnitTestHost.c
+
+[Sources.X64]
+  X64/LongJump.nasm
+  X64/SetJump.nasm
+  X64/SwitchStack.nasm
+  X64/CpuBreakpoint.c | MSFT
+  X64/CpuPause.nasm| MSFT
+  X64/ReadTsc.nasm| MSFT
+  X64/FxRestore.nasm| MSFT
+  X64/FxSave.nasm| MSFT
+  X64/ReadEflags.nasm| MSFT
+  X64/Non-existing.c
+  Math64.c
+  Unaligned.c
+  X86FxSave.c
+  X86FxRestore.c
+  X86Msr.c
+  X86RdRand.c
+  X86SpeculationBarrier.c
+  X64/GccInline.c | GCC
+  X64/RdRand.nasm
+  ChkStkGcc.c  | GCC
+  X86UnitTestHost.c
+
+[Sources.EBC]
+  Ebc/CpuBreakpoint.c
+  Ebc/SetJumpLongJump.c
+  Ebc/SwitchStack.c
+  Ebc/SpeculationBarrier.c
+  Unaligned.c
+  Math64.c
+
+[Sources.ARM]
+  Arm/InternalSwitchStack.c
+  Arm/Unaligned.c
+  Math64.c                   | RVCT
+  Math64.c                   | MSFT
+
+  Arm/SwitchStack.asm        | RVCT
+  Arm/SetJumpLongJump.asm    | RVCT
+  Arm/CpuPause.asm           | RVCT
+  Arm/CpuBreakpoint.asm      | RVCT
+  Arm/MemoryFence.asm        | RVCT
+  Arm/SpeculationBarrier.S   | RVCT
+
+  Arm/SwitchStack.asm        | MSFT
+  Arm/SetJumpLongJump.asm    | MSFT
+  Arm/CpuPause.asm           | MSFT
+  Arm/CpuBreakpoint.asm      | MSFT
+  Arm/MemoryFence.asm        | MSFT
+  Arm/SpeculationBarrier.asm | MSFT
+
+  Arm/Math64.S                  | GCC
+  Arm/SwitchStack.S             | GCC
+  Arm/SetJumpLongJump.S         | GCC
+  Arm/CpuBreakpoint.S           | GCC
+  Arm/MemoryFence.S             | GCC
+  Arm/SpeculationBarrier.S      | GCC
+
+[Sources.AARCH64]
+  Arm/InternalSwitchStack.c
+  Arm/Unaligned.c
+  Math64.c
+
+  AArch64/MemoryFence.S             | GCC
+  AArch64/SwitchStack.S             | GCC
+  AArch64/SetJumpLongJump.S         | GCC
+  AArch64/CpuBreakpoint.S           | GCC
+  AArch64/SpeculationBarrier.S      | GCC
+
+  AArch64/MemoryFence.asm           | MSFT
+  AArch64/SwitchStack.asm           | MSFT
+  AArch64/SetJumpLongJump.asm       | MSFT
+  AArch64/CpuBreakpoint.asm         | MSFT
+  AArch64/SpeculationBarrier.asm    | MSFT
+
+[Sources.RISCV64]
+  Math64.c
+  Unaligned.c
+  RiscV64/InternalSwitchStack.c
+  RiscV64/CpuBreakpoint.c
+  RiscV64/CpuPause.c
+  RiscV64/RiscVSetJumpLongJump.S    | GCC
+  RiscV64/RiscVCpuBreakpoint.S      | GCC
+  RiscV64/RiscVCpuPause.S           | GCC
+  RiscV64/RiscVInterrupt.S          | GCC
+  RiscV64/FlushCache.S              | GCC
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  PcdLib
+  DebugLib
+  BaseMemoryLib
+
+[Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength      ## SOMETIMES_CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength     ## SOMETIMES_CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength   ## SOMETIMES_CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdControlFlowEnforcementPropertyMask   ## SOMETIMES_CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdSpeculationBarrierType       ## SOMETIMES_CONSUMES
+
+[FeaturePcd]
+  gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList  ## CONSUMES

MdePkg/Library/BaseLib/UnitTestHostBaseLib.uni

@@ -0,0 +1,11 @@
+// /** @file
+// Base Library implementation for use with host based unit tests.
+//
+// Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+#string STR_MODULE_ABSTRACT             #language en-US "Base Library implementation for use with host based unit tests."
+
+#string STR_MODULE_DESCRIPTION          #language en-US "Base Library implementation for use with host based unit tests."