ShellPkg: Fix pci command output of Max and Current Link Speed, and ASPM Support values to match PCIe Base Spec rev 3.0

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chris Phillips <chrisp@hp.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>





git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14892 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Chris Phillips
2013-11-22 21:17:25 +00:00
committed by jcarsey
parent 416a423f08
commit 541ddf4436
2 changed files with 27 additions and 14 deletions

View File

@ -1,6 +1,7 @@
/** @file
Header file for Pci shell Debug1 function.
Copyright (c) 2013 Hewlett-Packard Development Company, L.P.
Copyright (c) 2005 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@ -157,7 +158,7 @@ typedef enum {
//
// Link Capabilities Register
//
#define PCIE_CAP_SUP_LINK_SPEEDS(PcieLinkCap) \
#define PCIE_CAP_MAX_LINK_SPEED(PcieLinkCap) \
((PcieLinkCap) & 0x0f)
#define PCIE_CAP_MAX_LINK_WIDTH(PcieLinkCap) \
(((PcieLinkCap) >> 4) & 0x3f)