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IntelFsp2Pkg: Fsp T new ARCH UPD Support

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Changes to support spec changes

1. Remove usage of Pcd.
2. Change code to validate the Temporary Ram size input.
3. Consume the input saved in YMM Register

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chiu Chasel <chasel.chiu@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ni Ray <ray.ni@intel.com>

Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Reviewed-by: Chiu Chasel <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
This commit is contained in:
Duggapu Chinni B
2024-04-05 09:30:48 +05:30
committed by mergify[bot]
parent 932db9df0c
commit 543add1d41
14 changed files with 212 additions and 28 deletions
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11
IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
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@@ -128,6 +128,17 @@
SXMMN xmm5, 1, eax
%endmacro
;
; XMM5 slot 2 for TemporaryRamSize
;
%macro LOAD_TEMPORARY_RAM_SIZE 1
LXMMN xmm5, %1, 2
%endmacro
%macro SAVE_TEMPORARY_RAM_SIZE 1
SXMMN xmm5, 2, %1
%endmacro
%macro ENABLE_SSE 0
;
; Initialize floating point units