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ArmPkg: Renamed library 'PL390GicLib' into 'ArmGicLib'

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This library is the interface for the ARM Generic Interrupt Controller
Architecture Specification.
ARM Platform can use any GIC controller (not necessary PL390 GIC).




git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12411 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
2011-09-22 22:59:52 +00:00
parent 75e4db2d3b
commit 55a0d64b88
21 changed files with 292 additions and 327 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc
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@@ -136,7 +136,7 @@
# L2 Cache Driver
L2X0CacheLib|ArmPlatformPkg/Library/L2X0CacheLibNull/L2X0CacheLibNull.inf
# ARM PL390 General Interrupt Driver in Secure and Non-secure
PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
!if $(EDK2_SKIP_PEICORE) == 1
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
@@ -441,13 +441,14 @@
!if $(EDK2_SKIP_PEICORE) == 1
ArmPlatformPkg/PrePi/PeiUniCore.inf {
<LibraryClasses>
ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf
}
!else
ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf {
<LibraryClasses>
PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
}
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {

8
ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc
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@@ -115,7 +115,8 @@
# ARM PL011 UART Driver
PL011UartLib|ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
# ARM PL390 General Interrupt Driver in Secure and Non-secure
PL390GicNonSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
@@ -138,8 +139,6 @@
# L2 Cache Driver
L2X0CacheLib|ArmPlatformPkg/Library/L2X0CacheLibNull/L2X0CacheLibNull.inf
# ARM PL390 General Interrupt Driver in Secure
PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
!if $(EDK2_SKIP_PEICORE) == 1
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
@@ -451,13 +450,14 @@
!if $(EDK2_SKIP_PEICORE) == 1
ArmPlatformPkg/PrePi/PeiMPCore.inf {
<LibraryClasses>
ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLib.inf
ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf
}
!else
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf {
<LibraryClasses>
PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
}
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {

7
ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc
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@@ -147,8 +147,8 @@
#DebugAgentLib|EmbeddedPkg/Library/GdbDebugAgent/GdbDebugAgent.inf
# ARM PL390 General Interrupt Driver in Secure and Non-secure
PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
PL390GicNonSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
!if $(EDK2_SKIP_PEICORE) == 1
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
@@ -496,13 +496,14 @@
!if $(EDK2_SKIP_PEICORE) == 1
ArmPlatformPkg/PrePi/PeiMPCore.inf {
<LibraryClasses>
ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLib.inf
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
}
!else
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf {
<LibraryClasses>
PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
}
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {

6
ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
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@@ -14,12 +14,12 @@
#include <PiPei.h>
#include <Library/ArmGicLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <Library/PrintLib.h>
#include <Library/SerialPortLib.h>
#include <Chipset/ArmV7.h>
#include <Drivers/PL390Gic.h>
#define ARM_PRIMARY_CORE 0
@@ -38,7 +38,7 @@ NonSecureWaitForFirmware (
ArmCallWFI();
// Acknowledge the interrupt and send End of Interrupt signal.
PL390GicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), ARM_PRIMARY_CORE);
ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), ARM_PRIMARY_CORE);
// Jump to secondary core entry point.
secondary_start ();
@@ -87,7 +87,7 @@ ArmPlatformSecExtraAction (
} else if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
if (CoreId == ARM_PRIMARY_CORE) {
// Signal the secondary cores they can jump to PEI phase
PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
// To enter into Non Secure state, we need to make a return from exception
*JumpAddress = PcdGet32(PcdNormalFvBaseAddress);

2
ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
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@@ -36,7 +36,7 @@
[LibraryClasses]
DebugLib
PcdLib
PL390GicSecLib
ArmGicSecLib
PrintLib
SerialPortLib

12
ArmPlatformPkg/PrePeiCore/MainMPCore.c
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@@ -12,9 +12,9 @@
*
**/
#include <Library/ArmGicLib.h>
#include <Library/ArmMPCoreMailBoxLib.h>
#include <Chipset/ArmV7.h>
#include <Drivers/PL390Gic.h>
#include "PrePeiCore.h"
@@ -45,7 +45,7 @@ SecondaryMain (
while (secondary_entry_addr = ArmGetMPCoreMailbox(), secondary_entry_addr == 0) {
ArmCallWFI();
// Acknowledge the interrupt and send End of Interrupt signal.
PL390GicAcknowledgeSgiFrom(PcdGet32(PcdGicInterruptInterfaceBase),0/*CoreId*/);
ArmGicAcknowledgeSgiFrom(PcdGet32(PcdGicInterruptInterfaceBase),0/*CoreId*/);
}
secondary_start = (VOID (*)())secondary_entry_addr;
@@ -65,13 +65,13 @@ PrimaryMain (
{
EFI_SEC_PEI_HAND_OFF SecCoreData;
//Enable the GIC Distributor
PL390GicEnableDistributor(PcdGet32(PcdGicDistributorBase));
// Enable the GIC Distributor
ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));
// If ArmVe has not been built as Standalone then we need to wake up the secondary cores
if (FeaturePcdGet(PcdSendSgiToBringUpSecondaryCores)) {
if (FeaturePcdGet (PcdSendSgiToBringUpSecondaryCores)) {
// Sending SGI to all the Secondary CPU interfaces
PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
}
//

2
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
View File

@@ -44,7 +44,7 @@
DebugLib
DebugAgentLib
IoLib
PL390GicNonSecLib
ArmGicLib
PrintLib
SerialPortLib

10
ArmPlatformPkg/PrePi/MainMPCore.c
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@@ -14,9 +14,9 @@
#include "PrePi.h"
#include <Library/ArmGicLib.h>
#include <Library/ArmMPCoreMailBoxLib.h>
#include <Chipset/ArmV7.h>
#include <Drivers/PL390Gic.h>
VOID
PrimaryMain (
@@ -24,13 +24,13 @@ PrimaryMain (
IN UINT64 StartTimeStamp
)
{
//Enable the GIC Distributor
PL390GicEnableDistributor(PcdGet32(PcdGicDistributorBase));
// Enable the GIC Distributor
ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));
// In some cases, the secondary cores are waiting for an SGI from the next stage boot loader toresume their initialization
if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {
// Sending SGI to all the Secondary CPU interfaces
PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
}
PrePiMain (UefiMemoryBase, StartTimeStamp);
@@ -54,7 +54,7 @@ SecondaryMain (
while (secondary_entry_addr = ArmGetMPCoreMailbox(), secondary_entry_addr == 0) {
ArmCallWFI();
// Acknowledge the interrupt and send End of Interrupt signal.
PL390GicAcknowledgeSgiFrom(PcdGet32(PcdGicInterruptInterfaceBase),0/*CoreId*/);
ArmGicAcknowledgeSgiFrom(PcdGet32(PcdGicInterruptInterfaceBase),0/*CoreId*/);
}
secondary_start = (VOID (*)())secondary_entry_addr;

2
ArmPlatformPkg/PrePi/PeiMPCore.inf
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@@ -40,7 +40,7 @@
DebugAgentLib
ArmLib
ArmMPCoreMailBoxLib
PL390GicNonSecLib
ArmGicLib
IoLib
TimerLib
SerialPortLib

18
ArmPlatformPkg/Sec/Sec.c
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@@ -24,7 +24,7 @@
#include <Library/ArmPlatformLib.h>
#include <Chipset/ArmV7.h>
#include <Drivers/PL390Gic.h>
#include <Library/ArmGicLib.h>
#define ARM_PRIMARY_CORE 0
@@ -160,27 +160,27 @@ CEntryPoint (
// 3: As all the cores are in secure state, use secure SGI's
//
PL390GicEnableDistributor (PcdGet32(PcdGicDistributorBase));
PL390GicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase));
ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
// Send SGI to all Secondary core to wake them up from WFI state.
PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
} else {
// The secondary cores need to wait until the Trustzone chipsets configuration is done
// before switching to Non Secure World
// Enabled GIC CPU Interface
PL390GicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
// Waiting for the SGI from the primary core
ArmCallWFI();
// Acknowledge the interrupt and send End of Interrupt signal.
PL390GicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), ARM_PRIMARY_CORE);
ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), PRIMARY_CORE_ID);
}
// Transfer the interrupt to Non-secure World
PL390GicSetupNonSecure (PcdGet32(PcdGicDistributorBase),PcdGet32(PcdGicInterruptInterfaceBase));
ArmGicSetupNonSecure (PcdGet32(PcdGicDistributorBase),PcdGet32(PcdGicInterruptInterfaceBase));
// Write to CP15 Non-secure Access Control Register :
// - Enable CP10 and CP11 accesses in NS World
@@ -199,9 +199,9 @@ CEntryPoint (
// Trustzone is not enabled, just enable the Distributor and CPU interface
if (CoreId == ARM_PRIMARY_CORE) {
PL390GicEnableDistributor (PcdGet32(PcdGicDistributorBase));
ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase));
}
PL390GicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
// With Trustzone support the transition from Sec to Normal world is done by return_from_exception().
// If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program

2
ArmPlatformPkg/Sec/Sec.inf
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@@ -42,7 +42,7 @@
DebugLib
DebugAgentLib
IoLib
PL390GicSecLib
ArmGicSecLib
PrintLib
SerialPortLib