ArmVirtPkg: introduce new ArmQemuRelocatablePlatformLib
This introduces ArmQemuRelocatablePlatformLib, which started out as a straight copy of ArmXenRelocatablePlatformLib, but has been modified so that ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf can be used with QEMU as well as with Xen. It retains the self relocation and FDT parsing for the system memory, but uses the QEMU MMU layout. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com>
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Ard Biesheuvel
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#
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# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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#include <AsmMacroIoLibV8.h>
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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.text
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.align 2
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GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
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GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
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GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
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GCC_ASM_EXPORT(ArmGetPhysAddrTop)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
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.LArm64LinuxMagic:
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.byte 0x41, 0x52, 0x4d, 0x64
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// VOID
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// ArmPlatformPeiBootAction (
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// VOID *DeviceTreeBaseAddress, // passed by loader in x0
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// VOID *ImageBase // passed by FDF trampoline in x1
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// );
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ASM_PFX(ArmPlatformPeiBootAction):
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//
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// If we are booting from RAM using the Linux kernel boot protocol, x0 will
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// point to the DTB image in memory. Otherwise, use the default value defined
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// by the platform.
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//
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cbnz x0, 0f
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ldr x0, PcdGet64 (PcdDeviceTreeInitialBaseAddress)
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0:mov x29, x30 // preserve LR
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mov x28, x0 // preserve DTB pointer
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mov x27, x1 // preserve base of image pointer
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//
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// The base of the runtime image has been preserved in x1. Check whether
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// the expected magic number can be found in the header.
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//
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ldr w8, .LArm64LinuxMagic
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ldr w9, [x1, #0x38]
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cmp w8, w9
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bne .Lout
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//
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//
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// OK, so far so good. We have confirmed that we likely have a DTB and are
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// booting via the arm64 Linux boot protocol. Update the base-of-image PCD
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// to the actual relocated value, and add the shift of PcdFdBaseAddress to
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// PcdFvBaseAddress as well
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//
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adr x8, PcdGet64 (PcdFdBaseAddress)
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adr x9, PcdGet64 (PcdFvBaseAddress)
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ldr x6, [x8]
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ldr x7, [x9]
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sub x7, x7, x6
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add x7, x7, x1
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str x1, [x8]
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str x7, [x9]
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//
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// Discover the memory size and offset from the DTB, and record in the
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// respective PCDs. This will also return false if a corrupt DTB is
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// encountered. Since we are calling a C function, use the window at the
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// beginning of the FD image as a temp stack.
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//
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adr x1, PcdGet64 (PcdSystemMemorySize)
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adr x2, PcdGet64 (PcdSystemMemoryBase)
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mov sp, x7
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bl FindMemnode
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cbz x0, .Lout
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//
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// Copy the DTB to the slack space right after the 64 byte arm64/Linux style
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// image header at the base of this image (defined in the FDF), and record the
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// pointer in PcdDeviceTreeInitialBaseAddress.
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//
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adr x8, PcdGet64 (PcdDeviceTreeInitialBaseAddress)
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add x27, x27, #0x40
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str x27, [x8]
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mov x0, x27
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mov x1, x28
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bl CopyFdt
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.Lout:
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ret x29
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//UINTN
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//ArmPlatformGetPrimaryCoreMpId (
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// VOID
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// );
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ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
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ldrh w0, [x0]
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ret
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//UINTN
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//ArmPlatformIsPrimaryCore (
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// IN UINTN MpId
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// );
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ASM_PFX(ArmPlatformIsPrimaryCore):
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mov x0, #1
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ret
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//UINTN
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//ArmPlatformGetCorePosition (
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// IN UINTN MpId
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// );
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// With this function: CorePos = (ClusterId * 4) + CoreId
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ASM_PFX(ArmPlatformGetCorePosition):
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and x1, x0, #ARM_CORE_MASK
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and x0, x0, #ARM_CLUSTER_MASK
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add x0, x1, x0, LSR #6
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ret
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//EFI_PHYSICAL_ADDRESS
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//GetPhysAddrTop (
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// VOID
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// );
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ASM_PFX(ArmGetPhysAddrTop):
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mrs x0, id_aa64mmfr0_el1
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adr x1, .LPARanges
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and x0, x0, #7
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ldrb w1, [x1, x0]
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mov x0, #1
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lsl x0, x0, x1
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ret
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//
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// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
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// physical address space support on this CPU:
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// 0 == 32 bits, 1 == 36 bits, etc etc
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// 6 and 7 are reserved
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//
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.LPARanges:
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.byte 32, 36, 40, 42, 44, 48, -1, -1
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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