OvmfPkg: Create initial version of PlatformInitLib

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863

There are 3 variants of PlatformPei in OvmfPkg:
 - OvmfPkg/PlatformPei
 - OvmfPkg/XenPlatformPei
 - OvmfPkg/Bhyve/PlatformPei/PlatformPei.inf
These PlatformPeis can share many common codes, such as
Cmos / Hob / Memory / Platform related functions. This commit
(and its following several patches) are to create a PlatformInitLib
which wraps the common code called in above PlatformPeis.

In this initial version of PlatformInitLib, below Cmos related functions
are introduced:
 - PlatformCmosRead8
 - PlatformCmosWrite8
 - PlatformDebugDumpCmos

They correspond to the functions in OvmfPkg/PlatformPei:
 - CmosRead8
 - CmosWrite8
 - DebugDumpCmos

Considering this PlatformInitLib will be used in SEC phase, global
variables and dynamic PCDs are avoided. We use PlatformInfoHob
to exchange information between functions.

EFI_HOB_PLATFORM_INFO is the data struct which contains the platform
information, such as HostBridgeDevId, BootMode, S3Supported,
SmmSmramRequire, etc.

After PlatformInitLib is created, OvmfPkg/PlatformPei is refactored
with this library.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
This commit is contained in:
Min Xu
2022-02-12 14:06:46 +08:00
committed by mergify[bot]
parent 6a608255bb
commit 57bcfc3b06
14 changed files with 183 additions and 82 deletions

View File

@@ -1,55 +0,0 @@
/** @file
PC/AT CMOS access routines
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "Cmos.h"
#include "Library/IoLib.h"
/**
Reads 8-bits of CMOS data.
Reads the 8-bits of CMOS data at the location specified by Index.
The 8-bit read value is returned.
@param Index The CMOS location to read.
@return The value read.
**/
UINT8
EFIAPI
CmosRead8 (
IN UINTN Index
)
{
IoWrite8 (0x70, (UINT8)Index);
return IoRead8 (0x71);
}
/**
Writes 8-bits of CMOS data.
Writes 8-bits of CMOS data to the location specified by Index
with the value specified by Value and returns Value.
@param Index The CMOS location to write.
@param Value The value to write to CMOS.
@return The value written to CMOS.
**/
UINT8
EFIAPI
CmosWrite8 (
IN UINTN Index,
IN UINT8 Value
)
{
IoWrite8 (0x70, (UINT8)Index);
IoWrite8 (0x71, Value);
return Value;
}

View File

@@ -1,48 +0,0 @@
/** @file
PC/AT CMOS access routines
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __CMOS_H__
#define __CMOS_H__
/**
Reads 8-bits of CMOS data.
Reads the 8-bits of CMOS data at the location specified by Index.
The 8-bit read value is returned.
@param Index The CMOS location to read.
@return The value read.
**/
UINT8
EFIAPI
CmosRead8 (
IN UINTN Index
);
/**
Writes 8-bits of CMOS data.
Writes 8-bits of CMOS data to the location specified by Index
with the value specified by Value and returns Value.
@param Index The CMOS location to write.
@param Value The value to write to CMOS.
@return The value written to CMOS.
**/
UINT8
EFIAPI
CmosWrite8 (
IN UINTN Index,
IN UINT8 Value
);
#endif

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@@ -37,9 +37,9 @@ Module Name:
#include <Library/MtrrLib.h>
#include <Library/QemuFwCfgLib.h>
#include <Library/QemuFwCfgSimpleParserLib.h>
#include <Library/PlatformInitLib.h>
#include "Platform.h"
#include "Cmos.h"
UINT8 mPhysMemAddressWidth;
@@ -412,8 +412,8 @@ GetSystemMemorySizeBelow4gb (
// into the calculation to get the total memory size.
//
Cmos0x34 = (UINT8)CmosRead8 (0x34);
Cmos0x35 = (UINT8)CmosRead8 (0x35);
Cmos0x34 = (UINT8)PlatformCmosRead8 (0x34);
Cmos0x35 = (UINT8)PlatformCmosRead8 (0x35);
return (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
}
@@ -436,7 +436,7 @@ GetSystemMemorySizeAbove4gb (
Size = 0;
for (CmosIndex = 0x5d; CmosIndex >= 0x5b; CmosIndex--) {
Size = (UINT32)(Size << 8) + (UINT32)CmosRead8 (CmosIndex);
Size = (UINT32)(Size << 8) + (UINT32)PlatformCmosRead8 (CmosIndex);
}
return LShiftU64 (Size, 16);

View File

@@ -36,10 +36,10 @@
#include <IndustryStandard/Pci22.h>
#include <IndustryStandard/Q35MchIch9.h>
#include <IndustryStandard/QemuCpuHotplug.h>
#include <Library/PlatformInitLib.h>
#include <OvmfPlatforms.h>
#include "Platform.h"
#include "Cmos.h"
EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
{
@@ -505,11 +505,11 @@ BootModeInitialization (
{
EFI_STATUS Status;
if (CmosRead8 (0xF) == 0xFE) {
if (PlatformCmosRead8 (0xF) == 0xFE) {
mBootMode = BOOT_ON_S3_RESUME;
}
CmosWrite8 (0xF, 0x00);
PlatformCmosWrite8 (0xF, 0x00);
Status = PeiServicesSetBootMode (mBootMode);
ASSERT_EFI_ERROR (Status);
@@ -546,27 +546,6 @@ ReserveEmuVariableNvStore (
ASSERT_RETURN_ERROR (PcdStatus);
}
VOID
DebugDumpCmos (
VOID
)
{
UINT32 Loop;
DEBUG ((DEBUG_INFO, "CMOS:\n"));
for (Loop = 0; Loop < 0x80; Loop++) {
if ((Loop % 0x10) == 0) {
DEBUG ((DEBUG_INFO, "%02x:", Loop));
}
DEBUG ((DEBUG_INFO, " %02x", CmosRead8 (Loop)));
if ((Loop % 0x10) == 0xf) {
DEBUG ((DEBUG_INFO, "\n"));
}
}
}
VOID
S3Verification (
VOID
@@ -810,7 +789,7 @@ InitializePlatform (
DEBUG ((DEBUG_INFO, "Platform PEIM Loaded\n"));
DebugDumpCmos ();
PlatformDebugDumpCmos ();
if (QemuFwCfgS3Enabled ()) {
DEBUG ((DEBUG_INFO, "S3 support was detected on QEMU\n"));

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@@ -25,8 +25,6 @@
[Sources]
AmdSev.c
ClearCache.c
Cmos.c
Cmos.h
FeatureControl.c
Fv.c
MemDetect.c
@@ -64,6 +62,7 @@
MemEncryptSevLib
PcdLib
VmgExitLib
PlatformInitLib
[Pcd]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase