MdeModulePkg/SdMmcPciHcDxe: add Bayhub support

Add support for Bayhub eMMC controller found on AMD
Stoneyridge Chromebooks.

Test: build/boot various google/kahlee-based devices

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Matt DeVillier
2020-01-06 16:15:51 -06:00
committed by Tim Crawford
parent e167ed1a3d
commit 587653cd8b
6 changed files with 708 additions and 15 deletions

View File

@@ -20,6 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/UefiDriverEntryPoint.h>
#include <Library/DebugLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiRuntimeServicesTableLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/UefiLib.h>
@@ -33,6 +34,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Protocol/SdMmcOverride.h>
#include <Protocol/SdMmcPassThru.h>
#include <Guid/DebugMask.h>
#include "SdMmcPciHci.h"
extern EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentName;
@@ -46,10 +49,16 @@ extern EDKII_SD_MMC_OVERRIDE *mOverride;
#define SD_MMC_HC_PRIVATE_FROM_THIS(a) \
CR(a, SD_MMC_HC_PRIVATE_DATA, PassThru, SD_MMC_HC_PRIVATE_SIGNATURE)
#define HOST_CLK_DRIVE_STRENGTH 2
#define HOST_DAT_DRIVE_STRENGTH 2
#define HS200_ALLPASS_PHASE 0
#define HS100_ALLPASS_PHASE 6
//
// Generic time out value, 1 microsecond as unit.
//
#define SD_MMC_HC_GENERIC_TIMEOUT 1 * 1000 * 1000
#define SD_MMC_CLOCK_STABLE_TIMEOUT 3 * 1000
//
// SD/MMC async transfer timer interval, set by experience.