1. Simplify the implementation of AsmReadApplicationRegister() & AsmReadControlRegister() for IPF architecture.
2. Add AsmReadMsr() & AsmWriteMsr() for IPF architecture 3. update AsmCpuMisc.s to only support GCC tool chain to avoid symbol collision. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7034 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -4897,6 +4897,50 @@ AsmReadApplicationRegister (
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);
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/**
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Reads the current value of a Machine Specific Register (MSR).
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Reads and returns the current value of the Machine Specific Register specified by Index. No
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parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
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register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
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Index is valid, or the caller must set up fault handlers to catch the faults. This function is
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only available on IPF.
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@param Index The 8-bit Machine Specific Register index to read.
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@return The current value of the Machine Specific Register specified by Index.
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**/
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UINT64
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EFIAPI
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AsmReadMsr (
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IN UINT8 Index
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);
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/**
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Writes the current value of a Machine Specific Register (MSR).
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Writes Value to the Machine Specific Register specified by Index. Value is returned. No
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parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
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register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
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Index is valid, or the caller must set up fault handlers to catch the faults. This function is
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only available on IPF.
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@param Index The 8-bit Machine Specific Register index to write.
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@param Value The 64-bit value to write to the Machine Specific Register.
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@return The 64-bit value to write to the Machine Specific Register.
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**/
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UINT64
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EFIAPI
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AsmWriteMsr (
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IN UINT8 Index,
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IN UINT64 Value
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);
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/**
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Determines if the CPU is currently executing in virtual, physical, or mixed mode.
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