diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h index 7253997a6f..a2cd134bea 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -4813,6 +4813,56 @@ SpeculationBarrier ( VOID ); +#if defined (MDE_CPU_X64) +// +// The page size for the PVALIDATE instruction +// +typedef enum { + PvalidatePageSize4K = 0, + PvalidatePageSize2MB, +} PVALIDATE_PAGE_SIZE; + +// +// PVALIDATE Return Code. +// +#define PVALIDATE_RET_SUCCESS 0 +#define PVALIDATE_RET_FAIL_INPUT 1 +#define PVALIDATE_RET_SIZE_MISMATCH 6 + +// +// The PVALIDATE instruction did not make any changes to the RMP entry. +// +#define PVALIDATE_RET_NO_RMPUPDATE 255 + +/** + Execute a PVALIDATE instruction to validate or to rescinds validation of a guest + page's RMP entry. + + The instruction is available only when CPUID Fn8000_001F_EAX[SNP]=1. + + The function is available on X64. + + @param[in] PageSize The page size to use. + @param[in] Validate If TRUE, validate the guest virtual address + otherwise invalidate the guest virtual address. + @param[in] Address The guest virtual address. + + @retval PVALIDATE_RET_SUCCESS The PVALIDATE instruction succeeded, and + updated the RMP entry. + @retval PVALIDATE_RET_NO_RMPUPDATE The PVALIDATE instruction succeeded, but + did not update the RMP entry. + @return Failure code from the PVALIDATE + instruction. +**/ +UINT32 +EFIAPI +AsmPvalidate ( + IN PVALIDATE_PAGE_SIZE PageSize, + IN BOOLEAN Validate, + IN PHYSICAL_ADDRESS Address + ); +#endif + #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) /// diff --git a/MdePkg/Include/X64/Nasm.inc b/MdePkg/Include/X64/Nasm.inc index 527f71e9eb..528bb33856 100644 --- a/MdePkg/Include/X64/Nasm.inc +++ b/MdePkg/Include/X64/Nasm.inc @@ -33,6 +33,14 @@ DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8 %endmacro +; +; Macro for the PVALIDATE instruction, defined in AMD APM volume 3. +; NASM feature request URL: https://bugzilla.nasm.us/show_bug.cgi?id=3392753 +; +%macro PVALIDATE 0 + DB 0xF2, 0x0F, 0x01, 0xFF +%endmacro + ; NASM provides built-in macros STRUC and ENDSTRUC for structure definition. ; For example, to define a structure called mytype containing a longword, ; a word, a byte and a string of bytes, you might code diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index b76f3af380..89a52f72c0 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -317,6 +317,7 @@ X64/GccInlinePriv.c | GCC X64/EnableDisableInterrupts.nasm X64/DisablePaging64.nasm + X64/Pvalidate.nasm X64/RdRand.nasm X64/XGetBv.nasm X64/XSetBv.nasm diff --git a/MdePkg/Library/BaseLib/X64/Pvalidate.nasm b/MdePkg/Library/BaseLib/X64/Pvalidate.nasm new file mode 100644 index 0000000000..a7d1779134 --- /dev/null +++ b/MdePkg/Library/BaseLib/X64/Pvalidate.nasm @@ -0,0 +1,42 @@ +;----------------------------------------------------------------------------- +; +; Copyright (c) 2021, AMD. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent +; +;----------------------------------------------------------------------------- + +%include "Nasm.inc" + + SECTION .text + +;----------------------------------------------------------------------------- +; UINT32 +; EFIAPI +; AsmPvalidate ( +; IN UINT32 PageSize +; IN UINT32 Validate, +; IN UINT64 Address +; ) +;----------------------------------------------------------------------------- +global ASM_PFX(AsmPvalidate) +ASM_PFX(AsmPvalidate): + mov rax, r8 + + PVALIDATE + + ; Save the carry flag. + setc dl + + ; The PVALIDATE instruction returns the status in rax register. + cmp rax, 0 + jne PvalidateExit + + ; Check the carry flag to determine if RMP entry was updated. + cmp dl, 0 + je PvalidateExit + + ; Return the PVALIDATE_RET_NO_RMPUPDATE. + mov rax, 255 + +PvalidateExit: + ret