MdePkg: PciExpressLib support variable size MMCONF
Add support for arbitrary sized MMCONF by introducing a new PCD. Add a return value to point out invalid PCI addresses. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com> Cc: Patrick Rudolph <patrick.rudolph@9elements.com> Cc: Christian Walter <christian.walter@9elements.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
committed by
mergify[bot]
parent
28d7eea97e
commit
5c06585528
@@ -22,7 +22,8 @@
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/**
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Assert the validity of a PCI address. A valid PCI address should contain 1's
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only in the low 28 bits.
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only in the low 28 bits. PcdPciExpressBaseSize limits the size to the real
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number of PCI busses in this segment.
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@param A The address to validate.
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@@ -79,6 +80,24 @@ GetPciExpressBaseAddress (
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return (VOID*)(UINTN) PcdGet64 (PcdPciExpressBaseAddress);
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}
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/**
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Gets the size of PCI Express.
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This internal functions retrieves PCI Express Base Size via a PCD entry
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PcdPciExpressBaseSize.
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@return The base size of PCI Express.
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**/
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STATIC
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UINTN
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PcdPciExpressBaseSize (
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VOID
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)
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{
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return (UINTN) PcdGet64 (PcdPciExpressBaseSize);
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}
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/**
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Reads an 8-bit PCI configuration register.
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@@ -91,7 +110,8 @@ GetPciExpressBaseAddress (
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@param Address The address that encodes the PCI Bus, Device, Function and
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Register.
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@return The read value from the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The read value from the PCI configuration register.
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**/
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UINT8
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@@ -101,6 +121,9 @@ PciExpressRead8 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT8) -1;
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}
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return MmioRead8 ((UINTN) GetPciExpressBaseAddress () + Address);
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}
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@@ -117,7 +140,8 @@ PciExpressRead8 (
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Register.
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@param Value The value to write.
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@return The value written to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written to the PCI configuration register.
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**/
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UINT8
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@@ -128,6 +152,9 @@ PciExpressWrite8 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT8) -1;
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}
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return MmioWrite8 ((UINTN) GetPciExpressBaseAddress () + Address, Value);
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}
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@@ -148,7 +175,8 @@ PciExpressWrite8 (
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Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written to the PCI configuration register.
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**/
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UINT8
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@@ -159,6 +187,9 @@ PciExpressOr8 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT8) -1;
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}
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return MmioOr8 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);
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}
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@@ -179,7 +210,8 @@ PciExpressOr8 (
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Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -190,6 +222,9 @@ PciExpressAnd8 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT8) -1;
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}
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return MmioAnd8 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);
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}
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@@ -212,7 +247,8 @@ PciExpressAnd8 (
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the result of the AND operation.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -224,6 +260,9 @@ PciExpressAndThenOr8 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT8) -1;
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}
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return MmioAndThenOr8 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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AndData,
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@@ -249,7 +288,9 @@ PciExpressAndThenOr8 (
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@param EndBit The ordinal of the most significant bit in the bit field.
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Range 0..7.
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@return The value of the bit field read from the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value of the bit field read from the PCI configuration
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register.
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**/
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UINT8
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@@ -261,6 +302,9 @@ PciExpressBitFieldRead8 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT8) -1;
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}
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return MmioBitFieldRead8 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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StartBit,
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@@ -289,7 +333,8 @@ PciExpressBitFieldRead8 (
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Range 0..7.
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@param Value The new value of the bit field.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -302,6 +347,9 @@ PciExpressBitFieldWrite8 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT8) -1;
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}
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return MmioBitFieldWrite8 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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StartBit,
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@@ -334,7 +382,8 @@ PciExpressBitFieldWrite8 (
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Range 0..7.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -347,6 +396,9 @@ PciExpressBitFieldOr8 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT8) -1;
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}
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return MmioBitFieldOr8 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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StartBit,
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@@ -379,7 +431,8 @@ PciExpressBitFieldOr8 (
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Range 0..7.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -392,6 +445,9 @@ PciExpressBitFieldAnd8 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT8) -1;
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}
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return MmioBitFieldAnd8 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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StartBit,
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@@ -428,7 +484,8 @@ PciExpressBitFieldAnd8 (
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the result of the AND operation.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -442,6 +499,9 @@ PciExpressBitFieldAndThenOr8 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT8) -1;
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}
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return MmioBitFieldAndThenOr8 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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StartBit,
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@@ -464,7 +524,8 @@ PciExpressBitFieldAndThenOr8 (
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@param Address The address that encodes the PCI Bus, Device, Function and
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Register.
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@return The read value from the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The read value from the PCI configuration register.
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**/
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UINT16
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@@ -474,6 +535,9 @@ PciExpressRead16 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT16) -1;
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}
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return MmioRead16 ((UINTN) GetPciExpressBaseAddress () + Address);
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}
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@@ -491,7 +555,8 @@ PciExpressRead16 (
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Register.
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@param Value The value to write.
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@return The value written to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written to the PCI configuration register.
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**/
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UINT16
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@@ -502,6 +567,9 @@ PciExpressWrite16 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT16) -1;
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}
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return MmioWrite16 ((UINTN) GetPciExpressBaseAddress () + Address, Value);
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}
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@@ -523,7 +591,8 @@ PciExpressWrite16 (
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Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -534,6 +603,9 @@ PciExpressOr16 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT16) -1;
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}
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return MmioOr16 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);
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}
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@@ -555,7 +627,8 @@ PciExpressOr16 (
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Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -566,6 +639,9 @@ PciExpressAnd16 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT16) -1;
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}
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return MmioAnd16 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);
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}
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@@ -589,7 +665,8 @@ PciExpressAnd16 (
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the result of the AND operation.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -601,6 +678,9 @@ PciExpressAndThenOr16 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT16) -1;
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}
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return MmioAndThenOr16 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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AndData,
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@@ -627,7 +707,9 @@ PciExpressAndThenOr16 (
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@param EndBit The ordinal of the most significant bit in the bit field.
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Range 0..15.
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@return The value of the bit field read from the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value of the bit field read from the PCI configuration
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register.
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**/
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UINT16
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@@ -639,6 +721,9 @@ PciExpressBitFieldRead16 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT16) -1;
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}
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return MmioBitFieldRead16 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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StartBit,
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@@ -668,7 +753,8 @@ PciExpressBitFieldRead16 (
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Range 0..15.
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@param Value The new value of the bit field.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -681,6 +767,9 @@ PciExpressBitFieldWrite16 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT16) -1;
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}
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return MmioBitFieldWrite16 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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StartBit,
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@@ -714,7 +803,8 @@ PciExpressBitFieldWrite16 (
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Range 0..15.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -727,6 +817,9 @@ PciExpressBitFieldOr16 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT16) -1;
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}
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return MmioBitFieldOr16 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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StartBit,
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@@ -760,7 +853,8 @@ PciExpressBitFieldOr16 (
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Range 0..15.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -773,6 +867,9 @@ PciExpressBitFieldAnd16 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT16) -1;
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}
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return MmioBitFieldAnd16 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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StartBit,
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@@ -810,7 +907,8 @@ PciExpressBitFieldAnd16 (
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the result of the AND operation.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -824,6 +922,9 @@ PciExpressBitFieldAndThenOr16 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT16) -1;
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}
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return MmioBitFieldAndThenOr16 (
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(UINTN) GetPciExpressBaseAddress () + Address,
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StartBit,
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@@ -846,7 +947,8 @@ PciExpressBitFieldAndThenOr16 (
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@param Address The address that encodes the PCI Bus, Device, Function and
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Register.
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@return The read value from the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The read value from the PCI configuration register.
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**/
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UINT32
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@@ -856,6 +958,9 @@ PciExpressRead32 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT32) -1;
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}
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return MmioRead32 ((UINTN) GetPciExpressBaseAddress () + Address);
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}
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@@ -873,7 +978,8 @@ PciExpressRead32 (
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Register.
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@param Value The value to write.
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@return The value written to the PCI configuration register.
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@retval 0xFFFFFFFF Invalid PCI address.
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@retval other The value written to the PCI configuration register.
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**/
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UINT32
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@@ -884,6 +990,9 @@ PciExpressWrite32 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT32) -1;
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}
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return MmioWrite32 ((UINTN) GetPciExpressBaseAddress () + Address, Value);
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}
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@@ -905,7 +1014,8 @@ PciExpressWrite32 (
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Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFFFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT32
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@@ -916,6 +1026,9 @@ PciExpressOr32 (
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= PcdPciExpressBaseSize()) {
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return (UINT32) -1;
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}
|
||||
return MmioOr32 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);
|
||||
}
|
||||
|
||||
@@ -937,7 +1050,8 @@ PciExpressOr32 (
|
||||
Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -948,6 +1062,9 @@ PciExpressAnd32 (
|
||||
)
|
||||
{
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address);
|
||||
if (Address >= PcdPciExpressBaseSize()) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioAnd32 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);
|
||||
}
|
||||
|
||||
@@ -971,7 +1088,8 @@ PciExpressAnd32 (
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the result of the AND operation.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -983,6 +1101,9 @@ PciExpressAndThenOr32 (
|
||||
)
|
||||
{
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address);
|
||||
if (Address >= PcdPciExpressBaseSize()) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioAndThenOr32 (
|
||||
(UINTN) GetPciExpressBaseAddress () + Address,
|
||||
AndData,
|
||||
@@ -1009,7 +1130,9 @@ PciExpressAndThenOr32 (
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..31.
|
||||
|
||||
@return The value of the bit field read from the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value of the bit field read from the PCI
|
||||
configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1021,6 +1144,9 @@ PciExpressBitFieldRead32 (
|
||||
)
|
||||
{
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address);
|
||||
if (Address >= PcdPciExpressBaseSize()) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioBitFieldRead32 (
|
||||
(UINTN) GetPciExpressBaseAddress () + Address,
|
||||
StartBit,
|
||||
@@ -1050,7 +1176,8 @@ PciExpressBitFieldRead32 (
|
||||
Range 0..31.
|
||||
@param Value The new value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1063,6 +1190,9 @@ PciExpressBitFieldWrite32 (
|
||||
)
|
||||
{
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address);
|
||||
if (Address >= PcdPciExpressBaseSize()) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioBitFieldWrite32 (
|
||||
(UINTN) GetPciExpressBaseAddress () + Address,
|
||||
StartBit,
|
||||
@@ -1096,7 +1226,8 @@ PciExpressBitFieldWrite32 (
|
||||
Range 0..31.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1109,6 +1240,9 @@ PciExpressBitFieldOr32 (
|
||||
)
|
||||
{
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address);
|
||||
if (Address >= PcdPciExpressBaseSize()) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioBitFieldOr32 (
|
||||
(UINTN) GetPciExpressBaseAddress () + Address,
|
||||
StartBit,
|
||||
@@ -1142,7 +1276,8 @@ PciExpressBitFieldOr32 (
|
||||
Range 0..31.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1155,6 +1290,9 @@ PciExpressBitFieldAnd32 (
|
||||
)
|
||||
{
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address);
|
||||
if (Address >= PcdPciExpressBaseSize()) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioBitFieldAnd32 (
|
||||
(UINTN) GetPciExpressBaseAddress () + Address,
|
||||
StartBit,
|
||||
@@ -1192,7 +1330,8 @@ PciExpressBitFieldAnd32 (
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the result of the AND operation.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1206,6 +1345,9 @@ PciExpressBitFieldAndThenOr32 (
|
||||
)
|
||||
{
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address);
|
||||
if (Address >= PcdPciExpressBaseSize()) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioBitFieldAndThenOr32 (
|
||||
(UINTN) GetPciExpressBaseAddress () + Address,
|
||||
StartBit,
|
||||
@@ -1235,7 +1377,8 @@ PciExpressBitFieldAndThenOr32 (
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer receiving the data read.
|
||||
|
||||
@return Size read data from StartAddress.
|
||||
@retval (UINTN)-1 Invalid PCI address.
|
||||
@retval other Size read data from StartAddress.
|
||||
|
||||
**/
|
||||
UINTN
|
||||
@@ -1249,6 +1392,9 @@ PciExpressReadBuffer (
|
||||
UINTN ReturnValue;
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (StartAddress);
|
||||
if (StartAddress >= PcdPciExpressBaseSize()) {
|
||||
return (UINTN) -1;
|
||||
}
|
||||
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
|
||||
|
||||
if (Size == 0) {
|
||||
@@ -1335,7 +1481,8 @@ PciExpressReadBuffer (
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer containing the data to write.
|
||||
|
||||
@return Size written to StartAddress.
|
||||
@retval (UINTN)-1 Invalid PCI address.
|
||||
@retval other Size written to StartAddress.
|
||||
|
||||
**/
|
||||
UINTN
|
||||
@@ -1349,6 +1496,9 @@ PciExpressWriteBuffer (
|
||||
UINTN ReturnValue;
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (StartAddress);
|
||||
if (StartAddress >= PcdPciExpressBaseSize()) {
|
||||
return (UINTN) -1;
|
||||
}
|
||||
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
|
||||
|
||||
if (Size == 0) {
|
||||
|
Reference in New Issue
Block a user