MdePkg: PciExpressLib support variable size MMCONF
Add support for arbitrary sized MMCONF by introducing a new PCD. Add a return value to point out invalid PCI addresses. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com> Cc: Patrick Rudolph <patrick.rudolph@9elements.com> Cc: Christian Walter <christian.walter@9elements.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
committed by
mergify[bot]
parent
28d7eea97e
commit
5c06585528
@@ -25,6 +25,16 @@
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#include <Library/DxeServicesTableLib.h>
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#include <Library/UefiRuntimeLib.h>
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/**
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Assert the validity of a PCI address. A valid PCI address should contain 1's
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only in the low 28 bits.
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@param A The address to validate.
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**/
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#define ASSERT_INVALID_PCI_ADDRESS(A) \
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ASSERT (((A) & ~0xfffffff) == 0)
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///
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/// Define table for mapping PCI Express MMIO physical addresses to virtual addresses at OS runtime
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///
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@@ -39,9 +49,10 @@ typedef struct {
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EFI_EVENT mDxeRuntimePciExpressLibVirtualNotifyEvent = NULL;
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///
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/// Module global that contains the base physical address of the PCI Express MMIO range.
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/// Module global that contains the base physical address and size of the PCI Express MMIO range.
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///
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UINTN mDxeRuntimePciExpressLibPciExpressBaseAddress = 0;
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UINTN mDxeRuntimePciExpressLibPciExpressBaseSize = 0;
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///
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/// The number of PCI devices that have been registered for runtime access.
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@@ -120,6 +131,7 @@ DxeRuntimePciExpressLibConstructor (
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// Cache the physical address of the PCI Express MMIO range into a module global variable
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//
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mDxeRuntimePciExpressLibPciExpressBaseAddress = (UINTN) PcdGet64 (PcdPciExpressBaseAddress);
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mDxeRuntimePciExpressLibPciExpressBaseSize = (UINTN) PcdGet64 (PcdPciExpressBaseSize);
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//
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// Register SetVirtualAddressMap () notify function
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@@ -179,8 +191,12 @@ DxeRuntimePciExpressLibDestructor (
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This internal functions retrieves PCI Express Base Address via a PCD entry
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PcdPciExpressBaseAddress.
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@param Address The address that encodes the PCI Bus, Device, Function and Register.
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@return The base address of PCI Express.
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If Address > 0x0FFFFFFF, then ASSERT().
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@param Address The address that encodes the PCI Bus, Device, Function and Register.
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@retval (UINTN)-1 Invalid PCI address.
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@retval other The base address of PCI Express.
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**/
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UINTN
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@@ -193,7 +209,14 @@ GetPciExpressAddress (
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//
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// Make sure Address is valid
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//
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ASSERT (((Address) & ~0xfffffff) == 0);
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ASSERT_INVALID_PCI_ADDRESS (Address);
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//
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// Make sure the Address is in MMCONF address space
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//
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINTN) -1;
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}
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//
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// Convert Address to a physical address in the MMIO PCI Express range
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@@ -236,7 +259,6 @@ GetPciExpressAddress (
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//
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// No match was found. This is a critical error at OS runtime, so ASSERT() and force a breakpoint.
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//
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ASSERT (FALSE);
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CpuBreakpoint();
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//
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@@ -288,7 +310,14 @@ PciExpressRegisterForRuntimeAccess (
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//
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// Make sure Address is valid
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//
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ASSERT (((Address) & ~0xfffffff) == 0);
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ASSERT_INVALID_PCI_ADDRESS (Address);
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//
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// Make sure the Address is in MMCONF address space
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//
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return RETURN_UNSUPPORTED;
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}
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//
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// Convert Address to a physical address in the MMIO PCI Express range
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@@ -354,8 +383,8 @@ PciExpressRegisterForRuntimeAccess (
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@param Address The address that encodes the PCI Bus, Device, Function and
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Register.
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@return The read value from the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The read value from the PCI configuration register.
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**/
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UINT8
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@@ -364,6 +393,10 @@ PciExpressRead8 (
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IN UINTN Address
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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}
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return MmioRead8 (GetPciExpressAddress (Address));
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}
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@@ -380,7 +413,8 @@ PciExpressRead8 (
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Register.
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@param Value The value to write.
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@return The value written to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written to the PCI configuration register.
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**/
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UINT8
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@@ -390,6 +424,9 @@ PciExpressWrite8 (
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IN UINT8 Value
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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}
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return MmioWrite8 (GetPciExpressAddress (Address), Value);
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}
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@@ -410,7 +447,8 @@ PciExpressWrite8 (
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Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -420,6 +458,9 @@ PciExpressOr8 (
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IN UINT8 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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}
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return MmioOr8 (GetPciExpressAddress (Address), OrData);
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}
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@@ -440,7 +481,8 @@ PciExpressOr8 (
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Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -450,6 +492,9 @@ PciExpressAnd8 (
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IN UINT8 AndData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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}
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return MmioAnd8 (GetPciExpressAddress (Address), AndData);
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}
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@@ -472,7 +517,8 @@ PciExpressAnd8 (
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the result of the AND operation.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -483,6 +529,9 @@ PciExpressAndThenOr8 (
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IN UINT8 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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}
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return MmioAndThenOr8 (
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GetPciExpressAddress (Address),
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AndData,
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@@ -508,7 +557,8 @@ PciExpressAndThenOr8 (
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@param EndBit The ordinal of the most significant bit in the bit field.
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Range 0..7.
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@return The value of the bit field read from the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value of the bit field read from the PCI configuration register.
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**/
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UINT8
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@@ -519,6 +569,9 @@ PciExpressBitFieldRead8 (
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IN UINTN EndBit
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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}
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return MmioBitFieldRead8 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -547,7 +600,8 @@ PciExpressBitFieldRead8 (
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Range 0..7.
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@param Value The new value of the bit field.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -559,6 +613,9 @@ PciExpressBitFieldWrite8 (
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IN UINT8 Value
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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}
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return MmioBitFieldWrite8 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -591,7 +648,8 @@ PciExpressBitFieldWrite8 (
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Range 0..7.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -603,6 +661,9 @@ PciExpressBitFieldOr8 (
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IN UINT8 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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}
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return MmioBitFieldOr8 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -635,7 +696,8 @@ PciExpressBitFieldOr8 (
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Range 0..7.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -647,6 +709,9 @@ PciExpressBitFieldAnd8 (
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IN UINT8 AndData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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}
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return MmioBitFieldAnd8 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -683,7 +748,8 @@ PciExpressBitFieldAnd8 (
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the result of the AND operation.
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@return The value written back to the PCI configuration register.
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@retval 0xFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT8
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@@ -696,6 +762,9 @@ PciExpressBitFieldAndThenOr8 (
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IN UINT8 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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}
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return MmioBitFieldAndThenOr8 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -718,7 +787,8 @@ PciExpressBitFieldAndThenOr8 (
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@param Address The address that encodes the PCI Bus, Device, Function and
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Register.
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@return The read value from the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The read value from the PCI configuration register.
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**/
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UINT16
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@@ -727,6 +797,9 @@ PciExpressRead16 (
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IN UINTN Address
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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}
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return MmioRead16 (GetPciExpressAddress (Address));
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}
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@@ -744,7 +817,8 @@ PciExpressRead16 (
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Register.
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@param Value The value to write.
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@return The value written to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written to the PCI configuration register.
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**/
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UINT16
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@@ -754,6 +828,9 @@ PciExpressWrite16 (
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IN UINT16 Value
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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}
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return MmioWrite16 (GetPciExpressAddress (Address), Value);
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}
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@@ -775,7 +852,8 @@ PciExpressWrite16 (
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Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -785,6 +863,9 @@ PciExpressOr16 (
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IN UINT16 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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}
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return MmioOr16 (GetPciExpressAddress (Address), OrData);
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}
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@@ -806,7 +887,8 @@ PciExpressOr16 (
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Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -816,6 +898,9 @@ PciExpressAnd16 (
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IN UINT16 AndData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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}
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return MmioAnd16 (GetPciExpressAddress (Address), AndData);
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}
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@@ -839,7 +924,8 @@ PciExpressAnd16 (
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the result of the AND operation.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -850,6 +936,9 @@ PciExpressAndThenOr16 (
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IN UINT16 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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}
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return MmioAndThenOr16 (
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GetPciExpressAddress (Address),
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AndData,
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@@ -876,7 +965,8 @@ PciExpressAndThenOr16 (
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@param EndBit The ordinal of the most significant bit in the bit field.
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Range 0..15.
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@return The value of the bit field read from the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value of the bit field read from the PCI configuration register.
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**/
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UINT16
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@@ -887,6 +977,9 @@ PciExpressBitFieldRead16 (
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IN UINTN EndBit
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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}
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return MmioBitFieldRead16 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -916,7 +1009,8 @@ PciExpressBitFieldRead16 (
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Range 0..15.
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@param Value The new value of the bit field.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -928,6 +1022,9 @@ PciExpressBitFieldWrite16 (
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IN UINT16 Value
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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}
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return MmioBitFieldWrite16 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -961,7 +1058,8 @@ PciExpressBitFieldWrite16 (
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Range 0..15.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -973,6 +1071,9 @@ PciExpressBitFieldOr16 (
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IN UINT16 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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}
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return MmioBitFieldOr16 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -1006,7 +1107,8 @@ PciExpressBitFieldOr16 (
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Range 0..15.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -1018,6 +1120,9 @@ PciExpressBitFieldAnd16 (
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IN UINT16 AndData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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}
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return MmioBitFieldAnd16 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -1055,7 +1160,8 @@ PciExpressBitFieldAnd16 (
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the result of the AND operation.
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@return The value written back to the PCI configuration register.
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@retval 0xFFFF Invalid PCI address.
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@retval other The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -1068,6 +1174,9 @@ PciExpressBitFieldAndThenOr16 (
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IN UINT16 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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}
|
||||
return MmioBitFieldAndThenOr16 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1090,7 +1199,8 @@ PciExpressBitFieldAndThenOr16 (
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
|
||||
@return The read value from the PCI configuration register.
|
||||
@retval 0xFFFF Invalid PCI address.
|
||||
@retval other The read value from the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1099,6 +1209,9 @@ PciExpressRead32 (
|
||||
IN UINTN Address
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioRead32 (GetPciExpressAddress (Address));
|
||||
}
|
||||
|
||||
@@ -1116,7 +1229,8 @@ PciExpressRead32 (
|
||||
Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1126,6 +1240,9 @@ PciExpressWrite32 (
|
||||
IN UINT32 Value
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioWrite32 (GetPciExpressAddress (Address), Value);
|
||||
}
|
||||
|
||||
@@ -1147,7 +1264,8 @@ PciExpressWrite32 (
|
||||
Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1157,6 +1275,9 @@ PciExpressOr32 (
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioOr32 (GetPciExpressAddress (Address), OrData);
|
||||
}
|
||||
|
||||
@@ -1178,7 +1299,8 @@ PciExpressOr32 (
|
||||
Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1188,6 +1310,9 @@ PciExpressAnd32 (
|
||||
IN UINT32 AndData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioAnd32 (GetPciExpressAddress (Address), AndData);
|
||||
}
|
||||
|
||||
@@ -1211,7 +1336,8 @@ PciExpressAnd32 (
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the result of the AND operation.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1222,6 +1348,9 @@ PciExpressAndThenOr32 (
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioAndThenOr32 (
|
||||
GetPciExpressAddress (Address),
|
||||
AndData,
|
||||
@@ -1248,7 +1377,8 @@ PciExpressAndThenOr32 (
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..31.
|
||||
|
||||
@return The value of the bit field read from the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value of the bit field read from the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1259,6 +1389,9 @@ PciExpressBitFieldRead32 (
|
||||
IN UINTN EndBit
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioBitFieldRead32 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1288,7 +1421,8 @@ PciExpressBitFieldRead32 (
|
||||
Range 0..31.
|
||||
@param Value The new value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1300,6 +1434,9 @@ PciExpressBitFieldWrite32 (
|
||||
IN UINT32 Value
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioBitFieldWrite32 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1333,7 +1470,8 @@ PciExpressBitFieldWrite32 (
|
||||
Range 0..31.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1345,6 +1483,9 @@ PciExpressBitFieldOr32 (
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioBitFieldOr32 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1378,7 +1519,8 @@ PciExpressBitFieldOr32 (
|
||||
Range 0..31.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1390,6 +1532,9 @@ PciExpressBitFieldAnd32 (
|
||||
IN UINT32 AndData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioBitFieldAnd32 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1427,7 +1572,8 @@ PciExpressBitFieldAnd32 (
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the result of the AND operation.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
@@ -1440,6 +1586,9 @@ PciExpressBitFieldAndThenOr32 (
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
}
|
||||
return MmioBitFieldAndThenOr32 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1469,7 +1618,8 @@ PciExpressBitFieldAndThenOr32 (
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer receiving the data read.
|
||||
|
||||
@return Size read data from StartAddress.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other Size read data from StartAddress.
|
||||
|
||||
**/
|
||||
UINTN
|
||||
@@ -1485,9 +1635,16 @@ PciExpressReadBuffer (
|
||||
//
|
||||
// Make sure Address is valid
|
||||
//
|
||||
ASSERT (((StartAddress) & ~0xfffffff) == 0);
|
||||
ASSERT_INVALID_PCI_ADDRESS (StartAddress);
|
||||
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
|
||||
|
||||
//
|
||||
// Make sure the Address is in MMCONF address space
|
||||
//
|
||||
if (StartAddress >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINTN) -1;
|
||||
}
|
||||
|
||||
if (Size == 0) {
|
||||
return Size;
|
||||
}
|
||||
@@ -1572,7 +1729,8 @@ PciExpressReadBuffer (
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer containing the data to write.
|
||||
|
||||
@return Size written to StartAddress.
|
||||
@retval 0xFFFFFFFF Invalid PCI address.
|
||||
@retval other Size written to StartAddress.
|
||||
|
||||
**/
|
||||
UINTN
|
||||
@@ -1588,9 +1746,16 @@ PciExpressWriteBuffer (
|
||||
//
|
||||
// Make sure Address is valid
|
||||
//
|
||||
ASSERT (((StartAddress) & ~0xfffffff) == 0);
|
||||
ASSERT_INVALID_PCI_ADDRESS (StartAddress);
|
||||
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
|
||||
|
||||
//
|
||||
// Make sure the Address is in MMCONF address space
|
||||
//
|
||||
if (StartAddress >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINTN) -1;
|
||||
}
|
||||
|
||||
if (Size == 0) {
|
||||
return 0;
|
||||
}
|
||||
|
Reference in New Issue
Block a user