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ArmPlatformPkg/Sec: Allowed the Secondary Cores to set the Secure/Non Secure bits to their PPIs

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The GICD_IGROUPR0 is banked for each connected processor. It means the
Non-Secure bits for the PPIs (Private Peripheral Interrupts) must be
configured for every processor.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13135 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
2012-03-26 11:03:36 +00:00
parent 18029bb911
commit 5e7731443c
12 changed files with 47 additions and 33 deletions
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16
ArmPkg/Drivers/PL390Gic/PL390GicSec.c
View File

@@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011, ARM Limited. All rights reserved.
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -13,6 +13,7 @@
**/
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/ArmGicLib.h>
@@ -24,6 +25,7 @@
VOID
EFIAPI
ArmGicSetupNonSecure (
IN UINTN MpId,
IN INTN GicDistributorBase,
IN INTN GicInterruptInterfaceBase
)
@@ -47,9 +49,15 @@ ArmGicSetupNonSecure (
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
}
// Ensure all GIC interrupts are Non-Secure
for (Index = 0; Index < (PcdGet32(PcdGicNumInterrupts) / 32); Index++) {
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);
// Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt).
if (IS_PRIMARY_CORE(MpId)) {
// Ensure all GIC interrupts are Non-Secure
for (Index = 0; Index < (PcdGet32(PcdGicNumInterrupts) / 32); Index++) {
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);
}
} else {
// The secondary cores only set the Non Secure bit to their banked PPIs
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR, 0xffffffff);
}
// Ensure all interrupts can get through the priority mask

6
ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
View File

@@ -1,5 +1,5 @@
#/* @file
# Copyright (c) 2011, ARM Limited. All rights reserved.
# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -28,6 +28,7 @@
MdePkg/MdePkg.dec
[LibraryClasses]
ArmLib
DebugLib
IoLib
PcdLib
@@ -35,3 +36,6 @@
[FixedPcd.common]
gArmTokenSpaceGuid.PcdGicNumInterrupts
gArmTokenSpaceGuid.PcdGicSgiIntId
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore