Add generic HPET Timer DXE Driver and support libraries
Signed-off-by: mdkinney Reviewed-by: li-elvin git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12259 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -3,7 +3,7 @@
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This local APIC library instance supports xAPIC mode only.
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Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@@ -675,3 +675,80 @@ SendApicEoi (
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WriteLocalApicReg (XAPIC_EOI_OFFSET, 0);
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}
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/**
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Get the 32-bit address that a device should use to send a Message Signaled
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Interrupt (MSI) to the Local APIC of the currently executing processor.
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@return 32-bit address used to send an MSI to the Local APIC.
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**/
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UINT32
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EFIAPI
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GetApicMsiAddress (
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VOID
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)
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{
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LOCAL_APIC_MSI_ADDRESS MsiAddress;
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//
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// Return address for an MSI interrupt to be delivered only to the APIC ID
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// of the currently executing processor.
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//
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MsiAddress.Uint32 = 0;
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MsiAddress.Bits.BaseAddress = 0xFEE;
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MsiAddress.Bits.DestinationId = GetApicId ();
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return MsiAddress.Uint32;
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}
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/**
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Get the 64-bit data value that a device should use to send a Message Signaled
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Interrupt (MSI) to the Local APIC of the currently executing processor.
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If Vector is not in range 0x10..0xFE, then ASSERT().
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If DeliveryMode is not supported, then ASSERT().
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@param Vector The 8-bit interrupt vector associated with the MSI.
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Must be in the range 0x10..0xFE
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@param DeliveryMode A 3-bit value that specifies how the recept of the MSI
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is handled. The only supported values are:
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0: LOCAL_APIC_DELIVERY_MODE_FIXED
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1: LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY
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2: LOCAL_APIC_DELIVERY_MODE_SMI
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4: LOCAL_APIC_DELIVERY_MODE_NMI
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5: LOCAL_APIC_DELIVERY_MODE_INIT
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7: LOCAL_APIC_DELIVERY_MODE_EXTINT
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@param LevelTriggered TRUE specifies a level triggered interrupt.
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FALSE specifies an edge triggered interrupt.
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@param AssertionLevel Ignored if LevelTriggered is FALSE.
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TRUE specifies a level triggered interrupt that active
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when the interrupt line is asserted.
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FALSE specifies a level triggered interrupt that active
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when the interrupt line is deasserted.
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@return 64-bit data value used to send an MSI to the Local APIC.
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**/
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UINT64
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EFIAPI
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GetApicMsiValue (
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IN UINT8 Vector,
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IN UINTN DeliveryMode,
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IN BOOLEAN LevelTriggered,
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IN BOOLEAN AssertionLevel
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)
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{
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LOCAL_APIC_MSI_DATA MsiData;
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ASSERT (Vector >= 0x10 && Vector <= 0xFE);
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ASSERT (DeliveryMode < 8 && DeliveryMode != 6 && DeliveryMode != 3);
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MsiData.Uint64 = 0;
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MsiData.Bits.Vector = Vector;
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MsiData.Bits.DeliveryMode = (UINT32)DeliveryMode;
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if (LevelTriggered) {
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MsiData.Bits.TriggerMode = 1;
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if (AssertionLevel) {
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MsiData.Bits.Level = 1;
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}
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}
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return MsiData.Uint64;
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}
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