Added to support X64 port (with SV5 ABI). May be able to remove after we port everything, but Sec, to EFI X64 ABI.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10683 6f19259b-4bc3-4df7-8a09-765794883524
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/** @file
Math worker functions.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
with the original integer's bit 63. The shifted value is returned.
This function shifts the 64-bit value Operand to the right by Count bits. The
high Count bits are set to bit 63 of Operand. The shifted value is returned.
If Count is greater than 63, then ASSERT().
@param Operand The 64-bit operand to shift right.
@param Count The number of bits to shift right.
@return Operand >> Count
**/
UINT64
EFIAPI
ARShiftU64 (
IN UINT64 Operand,
IN UINTN Count
)
{
ASSERT (Count < 64);
return InternalMathARShiftU64 (Operand, Count);
}

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/** @file
Bit field functions of BaseLib.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Worker function that returns a bit field from Operand.
Returns the bitfield specified by the StartBit and the EndBit from Operand.
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
@param EndBit The ordinal of the most significant bit in the bit field.
@return The bit field read.
**/
UINTN
EFIAPI
InternalBaseLibBitFieldReadUint (
IN UINTN Operand,
IN UINTN StartBit,
IN UINTN EndBit
)
{
//
// ~((UINTN)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
// are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
//
return (Operand & ~((UINTN)-2 << EndBit)) >> StartBit;
}
/**
Worker function that reads a bit field from Operand, performs a bitwise OR,
and returns the result.
Performs a bitwise OR between the bit field specified by StartBit and EndBit
in Operand and the value specified by AndData. All other bits in Operand are
preserved. The new value is returned.
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
@param EndBit The ordinal of the most significant bit in the bit field.
@param OrData The value to OR with the read value from the value.
@return The new value.
**/
UINTN
EFIAPI
InternalBaseLibBitFieldOrUint (
IN UINTN Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINTN OrData
)
{
//
// ~((UINTN)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
// are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
//
return Operand | ((OrData << StartBit) & ~((UINTN) -2 << EndBit));
}
/**
Worker function that reads a bit field from Operand, performs a bitwise AND,
and returns the result.
Performs a bitwise AND between the bit field specified by StartBit and EndBit
in Operand and the value specified by AndData. All other bits in Operand are
preserved. The new value is returned.
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
@param EndBit The ordinal of the most significant bit in the bit field.
@param AndData The value to And with the read value from the value.
@return The new value.
**/
UINTN
EFIAPI
InternalBaseLibBitFieldAndUint (
IN UINTN Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINTN AndData
)
{
//
// ~((UINTN)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
// are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
//
return Operand & ~((~AndData << StartBit) & ~((UINTN)-2 << EndBit));
}
/**
Returns a bit field from an 8-bit value.
Returns the bitfield specified by the StartBit and the EndBit from Operand.
If 8-bit operations are not supported, then ASSERT().
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..7.
@return The bit field read.
**/
UINT8
EFIAPI
BitFieldRead8 (
IN UINT8 Operand,
IN UINTN StartBit,
IN UINTN EndBit
)
{
ASSERT (EndBit < 8);
ASSERT (StartBit <= EndBit);
return (UINT8)InternalBaseLibBitFieldReadUint (Operand, StartBit, EndBit);
}
/**
Writes a bit field to an 8-bit value, and returns the result.
Writes Value to the bit field specified by the StartBit and the EndBit in
Operand. All other bits in Operand are preserved. The new 8-bit value is
returned.
If 8-bit operations are not supported, then ASSERT().
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..7.
@param Value The new value of the bit field.
@return The new 8-bit value.
**/
UINT8
EFIAPI
BitFieldWrite8 (
IN UINT8 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT8 Value
)
{
ASSERT (EndBit < 8);
ASSERT (StartBit <= EndBit);
return BitFieldAndThenOr8 (Operand, StartBit, EndBit, 0, Value);
}
/**
Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
result.
Performs a bitwise OR between the bit field specified by StartBit
and EndBit in Operand and the value specified by OrData. All other bits in
Operand are preserved. The new 8-bit value is returned.
If 8-bit operations are not supported, then ASSERT().
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..7.
@param OrData The value to OR with the read value from the value.
@return The new 8-bit value.
**/
UINT8
EFIAPI
BitFieldOr8 (
IN UINT8 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT8 OrData
)
{
ASSERT (EndBit < 8);
ASSERT (StartBit <= EndBit);
return (UINT8)InternalBaseLibBitFieldOrUint (Operand, StartBit, EndBit, OrData);
}
/**
Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
the result.
Performs a bitwise AND between the bit field specified by StartBit and EndBit
in Operand and the value specified by AndData. All other bits in Operand are
preserved. The new 8-bit value is returned.
If 8-bit operations are not supported, then ASSERT().
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..7.
@param AndData The value to AND with the read value from the value.
@return The new 8-bit value.
**/
UINT8
EFIAPI
BitFieldAnd8 (
IN UINT8 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT8 AndData
)
{
ASSERT (EndBit < 8);
ASSERT (StartBit <= EndBit);
return (UINT8)InternalBaseLibBitFieldAndUint (Operand, StartBit, EndBit, AndData);
}
/**
Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
bitwise OR, and returns the result.
Performs a bitwise AND between the bit field specified by StartBit and EndBit
in Operand and the value specified by AndData, followed by a bitwise
OR with value specified by OrData. All other bits in Operand are
preserved. The new 8-bit value is returned.
If 8-bit operations are not supported, then ASSERT().
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..7.
@param AndData The value to AND with the read value from the value.
@param OrData The value to OR with the result of the AND operation.
@return The new 8-bit value.
**/
UINT8
EFIAPI
BitFieldAndThenOr8 (
IN UINT8 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT8 AndData,
IN UINT8 OrData
)
{
ASSERT (EndBit < 8);
ASSERT (StartBit <= EndBit);
return BitFieldOr8 (
BitFieldAnd8 (Operand, StartBit, EndBit, AndData),
StartBit,
EndBit,
OrData
);
}
/**
Returns a bit field from a 16-bit value.
Returns the bitfield specified by the StartBit and the EndBit from Operand.
If 16-bit operations are not supported, then ASSERT().
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..15.
@return The bit field read.
**/
UINT16
EFIAPI
BitFieldRead16 (
IN UINT16 Operand,
IN UINTN StartBit,
IN UINTN EndBit
)
{
ASSERT (EndBit < 16);
ASSERT (StartBit <= EndBit);
return (UINT16)InternalBaseLibBitFieldReadUint (Operand, StartBit, EndBit);
}
/**
Writes a bit field to a 16-bit value, and returns the result.
Writes Value to the bit field specified by the StartBit and the EndBit in
Operand. All other bits in Operand are preserved. The new 16-bit value is
returned.
If 16-bit operations are not supported, then ASSERT().
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..15.
@param Value The new value of the bit field.
@return The new 16-bit value.
**/
UINT16
EFIAPI
BitFieldWrite16 (
IN UINT16 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT16 Value
)
{
ASSERT (EndBit < 16);
ASSERT (StartBit <= EndBit);
return BitFieldAndThenOr16 (Operand, StartBit, EndBit, 0, Value);
}
/**
Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
result.
Performs a bitwise OR between the bit field specified by StartBit
and EndBit in Operand and the value specified by OrData. All other bits in
Operand are preserved. The new 16-bit value is returned.
If 16-bit operations are not supported, then ASSERT().
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..15.
@param OrData The value to OR with the read value from the value.
@return The new 16-bit value.
**/
UINT16
EFIAPI
BitFieldOr16 (
IN UINT16 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT16 OrData
)
{
ASSERT (EndBit < 16);
ASSERT (StartBit <= EndBit);
return (UINT16)InternalBaseLibBitFieldOrUint (Operand, StartBit, EndBit, OrData);
}
/**
Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
the result.
Performs a bitwise AND between the bit field specified by StartBit and EndBit
in Operand and the value specified by AndData. All other bits in Operand are
preserved. The new 16-bit value is returned.
If 16-bit operations are not supported, then ASSERT().
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..15.
@param AndData The value to AND with the read value from the value.
@return The new 16-bit value.
**/
UINT16
EFIAPI
BitFieldAnd16 (
IN UINT16 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT16 AndData
)
{
ASSERT (EndBit < 16);
ASSERT (StartBit <= EndBit);
return (UINT16)InternalBaseLibBitFieldAndUint (Operand, StartBit, EndBit, AndData);
}
/**
Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
bitwise OR, and returns the result.
Performs a bitwise AND between the bit field specified by StartBit and EndBit
in Operand and the value specified by AndData, followed by a bitwise
OR with value specified by OrData. All other bits in Operand are
preserved. The new 16-bit value is returned.
If 16-bit operations are not supported, then ASSERT().
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..15.
@param AndData The value to AND with the read value from the value.
@param OrData The value to OR with the result of the AND operation.
@return The new 16-bit value.
**/
UINT16
EFIAPI
BitFieldAndThenOr16 (
IN UINT16 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT16 AndData,
IN UINT16 OrData
)
{
ASSERT (EndBit < 16);
ASSERT (StartBit <= EndBit);
return BitFieldOr16 (
BitFieldAnd16 (Operand, StartBit, EndBit, AndData),
StartBit,
EndBit,
OrData
);
}
/**
Returns a bit field from a 32-bit value.
Returns the bitfield specified by the StartBit and the EndBit from Operand.
If 32-bit operations are not supported, then ASSERT().
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..31.
@return The bit field read.
**/
UINT32
EFIAPI
BitFieldRead32 (
IN UINT32 Operand,
IN UINTN StartBit,
IN UINTN EndBit
)
{
ASSERT (EndBit < 32);
ASSERT (StartBit <= EndBit);
return (UINT32)InternalBaseLibBitFieldReadUint (Operand, StartBit, EndBit);
}
/**
Writes a bit field to a 32-bit value, and returns the result.
Writes Value to the bit field specified by the StartBit and the EndBit in
Operand. All other bits in Operand are preserved. The new 32-bit value is
returned.
If 32-bit operations are not supported, then ASSERT().
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..31.
@param Value The new value of the bit field.
@return The new 32-bit value.
**/
UINT32
EFIAPI
BitFieldWrite32 (
IN UINT32 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT32 Value
)
{
ASSERT (EndBit < 32);
ASSERT (StartBit <= EndBit);
return BitFieldAndThenOr32 (Operand, StartBit, EndBit, 0, Value);
}
/**
Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
result.
Performs a bitwise OR between the bit field specified by StartBit
and EndBit in Operand and the value specified by OrData. All other bits in
Operand are preserved. The new 32-bit value is returned.
If 32-bit operations are not supported, then ASSERT().
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..31.
@param OrData The value to OR with the read value from the value.
@return The new 32-bit value.
**/
UINT32
EFIAPI
BitFieldOr32 (
IN UINT32 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT32 OrData
)
{
ASSERT (EndBit < 32);
ASSERT (StartBit <= EndBit);
return (UINT32)InternalBaseLibBitFieldOrUint (Operand, StartBit, EndBit, OrData);
}
/**
Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
the result.
Performs a bitwise AND between the bit field specified by StartBit and EndBit
in Operand and the value specified by AndData. All other bits in Operand are
preserved. The new 32-bit value is returned.
If 32-bit operations are not supported, then ASSERT().
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..31.
@param AndData The value to AND with the read value from the value.
@return The new 32-bit value.
**/
UINT32
EFIAPI
BitFieldAnd32 (
IN UINT32 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT32 AndData
)
{
ASSERT (EndBit < 32);
ASSERT (StartBit <= EndBit);
return (UINT32)InternalBaseLibBitFieldAndUint (Operand, StartBit, EndBit, AndData);
}
/**
Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
bitwise OR, and returns the result.
Performs a bitwise AND between the bit field specified by StartBit and EndBit
in Operand and the value specified by AndData, followed by a bitwise
OR with value specified by OrData. All other bits in Operand are
preserved. The new 32-bit value is returned.
If 32-bit operations are not supported, then ASSERT().
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..31.
@param AndData The value to AND with the read value from the value.
@param OrData The value to OR with the result of the AND operation.
@return The new 32-bit value.
**/
UINT32
EFIAPI
BitFieldAndThenOr32 (
IN UINT32 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT32 AndData,
IN UINT32 OrData
)
{
ASSERT (EndBit < 32);
ASSERT (StartBit <= EndBit);
return BitFieldOr32 (
BitFieldAnd32 (Operand, StartBit, EndBit, AndData),
StartBit,
EndBit,
OrData
);
}
/**
Returns a bit field from a 64-bit value.
Returns the bitfield specified by the StartBit and the EndBit from Operand.
If 64-bit operations are not supported, then ASSERT().
If StartBit is greater than 63, then ASSERT().
If EndBit is greater than 63, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..63.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..63.
@return The bit field read.
**/
UINT64
EFIAPI
BitFieldRead64 (
IN UINT64 Operand,
IN UINTN StartBit,
IN UINTN EndBit
)
{
ASSERT (EndBit < 64);
ASSERT (StartBit <= EndBit);
return RShiftU64 (Operand & ~LShiftU64 ((UINT64)-2, EndBit), StartBit);
}
/**
Writes a bit field to a 64-bit value, and returns the result.
Writes Value to the bit field specified by the StartBit and the EndBit in
Operand. All other bits in Operand are preserved. The new 64-bit value is
returned.
If 64-bit operations are not supported, then ASSERT().
If StartBit is greater than 63, then ASSERT().
If EndBit is greater than 63, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..63.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..63.
@param Value The new value of the bit field.
@return The new 64-bit value.
**/
UINT64
EFIAPI
BitFieldWrite64 (
IN UINT64 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT64 Value
)
{
ASSERT (EndBit < 64);
ASSERT (StartBit <= EndBit);
return BitFieldAndThenOr64 (Operand, StartBit, EndBit, 0, Value);
}
/**
Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
result.
Performs a bitwise OR between the bit field specified by StartBit
and EndBit in Operand and the value specified by OrData. All other bits in
Operand are preserved. The new 64-bit value is returned.
If 64-bit operations are not supported, then ASSERT().
If StartBit is greater than 63, then ASSERT().
If EndBit is greater than 63, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..63.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..63.
@param OrData The value to OR with the read value from the value
@return The new 64-bit value.
**/
UINT64
EFIAPI
BitFieldOr64 (
IN UINT64 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT64 OrData
)
{
UINT64 Value1;
UINT64 Value2;
ASSERT (EndBit < 64);
ASSERT (StartBit <= EndBit);
Value1 = LShiftU64 (OrData, StartBit);
Value2 = LShiftU64 ((UINT64) - 2, EndBit);
return Operand | (Value1 & ~Value2);
}
/**
Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
the result.
Performs a bitwise AND between the bit field specified by StartBit and EndBit
in Operand and the value specified by AndData. All other bits in Operand are
preserved. The new 64-bit value is returned.
If 64-bit operations are not supported, then ASSERT().
If StartBit is greater than 63, then ASSERT().
If EndBit is greater than 63, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..63.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..63.
@param AndData The value to AND with the read value from the value.
@return The new 64-bit value.
**/
UINT64
EFIAPI
BitFieldAnd64 (
IN UINT64 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT64 AndData
)
{
UINT64 Value1;
UINT64 Value2;
ASSERT (EndBit < 64);
ASSERT (StartBit <= EndBit);
Value1 = LShiftU64 (~AndData, StartBit);
Value2 = LShiftU64 ((UINT64)-2, EndBit);
return Operand & ~(Value1 & ~Value2);
}
/**
Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
bitwise OR, and returns the result.
Performs a bitwise AND between the bit field specified by StartBit and EndBit
in Operand and the value specified by AndData, followed by a bitwise
OR with value specified by OrData. All other bits in Operand are
preserved. The new 64-bit value is returned.
If 64-bit operations are not supported, then ASSERT().
If StartBit is greater than 63, then ASSERT().
If EndBit is greater than 63, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
@param Operand Operand on which to perform the bitfield operation.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..63.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..63.
@param AndData The value to AND with the read value from the value.
@param OrData The value to OR with the result of the AND operation.
@return The new 64-bit value.
**/
UINT64
EFIAPI
BitFieldAndThenOr64 (
IN UINT64 Operand,
IN UINTN StartBit,
IN UINTN EndBit,
IN UINT64 AndData,
IN UINT64 OrData
)
{
ASSERT (EndBit < 64);
ASSERT (StartBit <= EndBit);
return BitFieldOr64 (
BitFieldAnd64 (Operand, StartBit, EndBit, AndData),
StartBit,
EndBit,
OrData
);
}

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/** @file
Utility functions to generate checksum based on 2's complement
algorithm.
Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Returns the sum of all elements in a buffer in unit of UINT8.
During calculation, the carry bits are dropped.
This function calculates the sum of all elements in a buffer
in unit of UINT8. The carry bits in result of addition are dropped.
The result is returned as UINT8. If Length is Zero, then Zero is
returned.
If Buffer is NULL, then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the buffer to carry out the sum operation.
@param Length The size, in bytes, of Buffer.
@return Sum The sum of Buffer with carry bits dropped during additions.
**/
UINT8
EFIAPI
CalculateSum8 (
IN CONST UINT8 *Buffer,
IN UINTN Length
)
{
UINT8 Sum;
UINTN Count;
ASSERT (Buffer != NULL);
ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
for (Sum = 0, Count = 0; Count < Length; Count++) {
Sum = (UINT8) (Sum + *(Buffer + Count));
}
return Sum;
}
/**
Returns the two's complement checksum of all elements in a buffer
of 8-bit values.
This function first calculates the sum of the 8-bit values in the
buffer specified by Buffer and Length. The carry bits in the result
of addition are dropped. Then, the two's complement of the sum is
returned. If Length is 0, then 0 is returned.
If Buffer is NULL, then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the buffer to carry out the checksum operation.
@param Length The size, in bytes, of Buffer.
@return Checksum The 2's complement checksum of Buffer.
**/
UINT8
EFIAPI
CalculateCheckSum8 (
IN CONST UINT8 *Buffer,
IN UINTN Length
)
{
UINT8 CheckSum;
CheckSum = CalculateSum8 (Buffer, Length);
//
// Return the checksum based on 2's complement.
//
return (UINT8) (0x100 - CheckSum);
}
/**
Returns the sum of all elements in a buffer of 16-bit values. During
calculation, the carry bits are dropped.
This function calculates the sum of the 16-bit values in the buffer
specified by Buffer and Length. The carry bits in result of addition are dropped.
The 16-bit result is returned. If Length is 0, then 0 is returned.
If Buffer is NULL, then ASSERT().
If Buffer is not aligned on a 16-bit boundary, then ASSERT().
If Length is not aligned on a 16-bit boundary, then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the buffer to carry out the sum operation.
@param Length The size, in bytes, of Buffer.
@return Sum The sum of Buffer with carry bits dropped during additions.
**/
UINT16
EFIAPI
CalculateSum16 (
IN CONST UINT16 *Buffer,
IN UINTN Length
)
{
UINT16 Sum;
UINTN Count;
UINTN Total;
ASSERT (Buffer != NULL);
ASSERT (((UINTN) Buffer & 0x1) == 0);
ASSERT ((Length & 0x1) == 0);
ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
Total = Length / sizeof (*Buffer);
for (Sum = 0, Count = 0; Count < Total; Count++) {
Sum = (UINT16) (Sum + *(Buffer + Count));
}
return Sum;
}
/**
Returns the two's complement checksum of all elements in a buffer of
16-bit values.
This function first calculates the sum of the 16-bit values in the buffer
specified by Buffer and Length. The carry bits in the result of addition
are dropped. Then, the two's complement of the sum is returned. If Length
is 0, then 0 is returned.
If Buffer is NULL, then ASSERT().
If Buffer is not aligned on a 16-bit boundary, then ASSERT().
If Length is not aligned on a 16-bit boundary, then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the buffer to carry out the checksum operation.
@param Length The size, in bytes, of Buffer.
@return Checksum The 2's complement checksum of Buffer.
**/
UINT16
EFIAPI
CalculateCheckSum16 (
IN CONST UINT16 *Buffer,
IN UINTN Length
)
{
UINT16 CheckSum;
CheckSum = CalculateSum16 (Buffer, Length);
//
// Return the checksum based on 2's complement.
//
return (UINT16) (0x10000 - CheckSum);
}
/**
Returns the sum of all elements in a buffer of 32-bit values. During
calculation, the carry bits are dropped.
This function calculates the sum of the 32-bit values in the buffer
specified by Buffer and Length. The carry bits in result of addition are dropped.
The 32-bit result is returned. If Length is 0, then 0 is returned.
If Buffer is NULL, then ASSERT().
If Buffer is not aligned on a 32-bit boundary, then ASSERT().
If Length is not aligned on a 32-bit boundary, then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the buffer to carry out the sum operation.
@param Length The size, in bytes, of Buffer.
@return Sum The sum of Buffer with carry bits dropped during additions.
**/
UINT32
EFIAPI
CalculateSum32 (
IN CONST UINT32 *Buffer,
IN UINTN Length
)
{
UINT32 Sum;
UINTN Count;
UINTN Total;
ASSERT (Buffer != NULL);
ASSERT (((UINTN) Buffer & 0x3) == 0);
ASSERT ((Length & 0x3) == 0);
ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
Total = Length / sizeof (*Buffer);
for (Sum = 0, Count = 0; Count < Total; Count++) {
Sum = Sum + *(Buffer + Count);
}
return Sum;
}
/**
Returns the two's complement checksum of all elements in a buffer of
32-bit values.
This function first calculates the sum of the 32-bit values in the buffer
specified by Buffer and Length. The carry bits in the result of addition
are dropped. Then, the two's complement of the sum is returned. If Length
is 0, then 0 is returned.
If Buffer is NULL, then ASSERT().
If Buffer is not aligned on a 32-bit boundary, then ASSERT().
If Length is not aligned on a 32-bit boundary, then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the buffer to carry out the checksum operation.
@param Length The size, in bytes, of Buffer.
@return Checksum The 2's complement checksum of Buffer.
**/
UINT32
EFIAPI
CalculateCheckSum32 (
IN CONST UINT32 *Buffer,
IN UINTN Length
)
{
UINT32 CheckSum;
CheckSum = CalculateSum32 (Buffer, Length);
//
// Return the checksum based on 2's complement.
//
return (UINT32) ((UINT32)(-1) - CheckSum + 1);
}
/**
Returns the sum of all elements in a buffer of 64-bit values. During
calculation, the carry bits are dropped.
This function calculates the sum of the 64-bit values in the buffer
specified by Buffer and Length. The carry bits in result of addition are dropped.
The 64-bit result is returned. If Length is 0, then 0 is returned.
If Buffer is NULL, then ASSERT().
If Buffer is not aligned on a 64-bit boundary, then ASSERT().
If Length is not aligned on a 64-bit boundary, then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the buffer to carry out the sum operation.
@param Length The size, in bytes, of Buffer.
@return Sum The sum of Buffer with carry bits dropped during additions.
**/
UINT64
EFIAPI
CalculateSum64 (
IN CONST UINT64 *Buffer,
IN UINTN Length
)
{
UINT64 Sum;
UINTN Count;
UINTN Total;
ASSERT (Buffer != NULL);
ASSERT (((UINTN) Buffer & 0x7) == 0);
ASSERT ((Length & 0x7) == 0);
ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
Total = Length / sizeof (*Buffer);
for (Sum = 0, Count = 0; Count < Total; Count++) {
Sum = Sum + *(Buffer + Count);
}
return Sum;
}
/**
Returns the two's complement checksum of all elements in a buffer of
64-bit values.
This function first calculates the sum of the 64-bit values in the buffer
specified by Buffer and Length. The carry bits in the result of addition
are dropped. Then, the two's complement of the sum is returned. If Length
is 0, then 0 is returned.
If Buffer is NULL, then ASSERT().
If Buffer is not aligned on a 64-bit boundary, then ASSERT().
If Length is not aligned on a 64-bit boundary, then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the buffer to carry out the checksum operation.
@param Length The size, in bytes, of Buffer.
@return Checksum The 2's complement checksum of Buffer.
**/
UINT64
EFIAPI
CalculateCheckSum64 (
IN CONST UINT64 *Buffer,
IN UINTN Length
)
{
UINT64 CheckSum;
CheckSum = CalculateSum64 (Buffer, Length);
//
// Return the checksum based on 2's complement.
//
return (UINT64) ((UINT64)(-1) - CheckSum + 1);
}

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/** @file
Provides hack function for passng GCC build.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Hack function for passing GCC build.
**/
VOID
__chkstk()
{
}

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/** @file
Base Library CPU Functions for all architectures.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Disables CPU interrupts and returns the interrupt state prior to the disable
operation.
@retval TRUE CPU interrupts were enabled on entry to this call.
@retval FALSE CPU interrupts were disabled on entry to this call.
**/
BOOLEAN
EFIAPI
SaveAndDisableInterrupts (
VOID
)
{
BOOLEAN InterruptState;
InterruptState = GetInterruptState ();
DisableInterrupts ();
return InterruptState;
}
/**
Set the current CPU interrupt state.
Sets the current CPU interrupt state to the state specified by
InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
InterruptState is FALSE, then interrupts are disabled. InterruptState is
returned.
@param InterruptState TRUE if interrupts should be enabled. FALSE if
interrupts should be disabled.
@return InterruptState
**/
BOOLEAN
EFIAPI
SetInterruptState (
IN BOOLEAN InterruptState
)
{
if (InterruptState) {
EnableInterrupts ();
} else {
DisableInterrupts ();
}
return InterruptState;
}

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/** @file
Base Library CPU Functions for all architectures.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Base.h>
#include <Library/BaseLib.h>
/**
Executes an infinite loop.
Forces the CPU to execute an infinite loop. A debugger may be used to skip
past the loop and the code that follows the loop must execute properly. This
implies that the infinite loop must not cause the code that follow it to be
optimized away.
**/
VOID
EFIAPI
CpuDeadLoop (
VOID
)
{
volatile UINTN Index;
for (Index = 0; Index == 0;);
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Divides a 64-bit signed integer by a 64-bit signed integer and generates a
64-bit signed result and a optional 64-bit signed remainder.
This function divides the 64-bit signed value Dividend by the 64-bit signed
value Divisor and generates a 64-bit signed quotient. If Remainder is not
NULL, then the 64-bit signed remainder is returned in Remainder. This
function returns the 64-bit signed quotient.
It is the caller's responsibility to not call this function with a Divisor of 0.
If Divisor is 0, then the quotient and remainder should be assumed to be
the largest negative integer.
If Divisor is 0, then ASSERT().
@param Dividend A 64-bit signed value.
@param Divisor A 64-bit signed value.
@param Remainder A pointer to a 64-bit signed value. This parameter is
optional and may be NULL.
@return Dividend / Divisor
**/
INT64
EFIAPI
DivS64x64Remainder (
IN INT64 Dividend,
IN INT64 Divisor,
OUT INT64 *Remainder OPTIONAL
)
{
ASSERT (Divisor != 0);
return InternalMathDivRemS64x64 (Dividend, Divisor, Remainder);
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
a 64-bit unsigned result.
This function divides the 64-bit unsigned value Dividend by the 32-bit
unsigned value Divisor and generates a 64-bit unsigned quotient. This
function returns the 64-bit unsigned quotient.
If Divisor is 0, then ASSERT().
@param Dividend A 64-bit unsigned value.
@param Divisor A 32-bit unsigned value.
@return Dividend / Divisor
**/
UINT64
EFIAPI
DivU64x32 (
IN UINT64 Dividend,
IN UINT32 Divisor
)
{
ASSERT (Divisor != 0);
return InternalMathDivU64x32 (Dividend, Divisor);
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
a 64-bit unsigned result and an optional 32-bit unsigned remainder.
This function divides the 64-bit unsigned value Dividend by the 32-bit
unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
This function returns the 64-bit unsigned quotient.
If Divisor is 0, then ASSERT().
@param Dividend A 64-bit unsigned value.
@param Divisor A 32-bit unsigned value.
@param Remainder A pointer to a 32-bit unsigned value. This parameter is
optional and may be NULL.
@return Dividend / Divisor
**/
UINT64
EFIAPI
DivU64x32Remainder (
IN UINT64 Dividend,
IN UINT32 Divisor,
OUT UINT32 *Remainder OPTIONAL
)
{
ASSERT (Divisor != 0);
return InternalMathDivRemU64x32 (Dividend, Divisor, Remainder);
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
a 64-bit unsigned result and an optional 64-bit unsigned remainder.
This function divides the 64-bit unsigned value Dividend by the 64-bit
unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
This function returns the 64-bit unsigned quotient.
If Divisor is 0, then ASSERT().
@param Dividend A 64-bit unsigned value.
@param Divisor A 64-bit unsigned value.
@param Remainder A pointer to a 64-bit unsigned value. This parameter is
optional and may be NULL.
@return Dividend / Divisor
**/
UINT64
EFIAPI
DivU64x64Remainder (
IN UINT64 Dividend,
IN UINT64 Divisor,
OUT UINT64 *Remainder OPTIONAL
)
{
ASSERT (Divisor != 0);
return InternalMathDivRemU64x64 (Dividend, Divisor, Remainder);
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Returns the value of the highest bit set in a 32-bit value. Equivalent to
1 << log2(x).
This function computes the value of the highest bit set in the 32-bit value
specified by Operand. If Operand is zero, then zero is returned.
@param Operand The 32-bit operand to evaluate.
@return 1 << HighBitSet32(Operand)
@retval 0 Operand is zero.
**/
UINT32
EFIAPI
GetPowerOfTwo32 (
IN UINT32 Operand
)
{
if (0 == Operand) {
return 0;
}
return 1ul << HighBitSet32 (Operand);
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Returns the value of the highest bit set in a 64-bit value. Equivalent to
1 << log2(x).
This function computes the value of the highest bit set in the 64-bit value
specified by Operand. If Operand is zero, then zero is returned.
@param Operand The 64-bit operand to evaluate.
@return 1 << HighBitSet64(Operand)
@retval 0 Operand is zero.
**/
UINT64
EFIAPI
GetPowerOfTwo64 (
IN UINT64 Operand
)
{
if (Operand == 0) {
return 0;
}
return LShiftU64 (1, HighBitSet64 (Operand));
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Returns the bit position of the highest bit set in a 32-bit value. Equivalent
to log2(x).
This function computes the bit position of the highest bit set in the 32-bit
value specified by Operand. If Operand is zero, then -1 is returned.
Otherwise, a value between 0 and 31 is returned.
@param Operand The 32-bit operand to evaluate.
@retval 0..31 Position of the highest bit set in Operand if found.
@retval -1 Operand is zero.
**/
INTN
EFIAPI
HighBitSet32 (
IN UINT32 Operand
)
{
INTN BitIndex;
if (Operand == 0) {
return - 1;
}
for (BitIndex = 31; (INT32)Operand > 0; BitIndex--, Operand <<= 1);
return BitIndex;
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Returns the bit position of the highest bit set in a 64-bit value. Equivalent
to log2(x).
This function computes the bit position of the highest bit set in the 64-bit
value specified by Operand. If Operand is zero, then -1 is returned.
Otherwise, a value between 0 and 63 is returned.
@param Operand The 64-bit operand to evaluate.
@retval 0..63 Position of the highest bit set in Operand if found.
@retval -1 Operand is zero.
**/
INTN
EFIAPI
HighBitSet64 (
IN UINT64 Operand
)
{
if (Operand == (UINT32)Operand) {
//
// Operand is just a 32-bit integer
//
return HighBitSet32 ((UINT32)Operand);
}
//
// Operand is really a 64-bit integer
//
if (sizeof (UINTN) == sizeof (UINT32)) {
return HighBitSet32 (((UINT32*)&Operand)[1]) + 32;
} else {
return HighBitSet32 ((UINT32)RShiftU64 (Operand, 32)) + 32;
}
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
with the high bits that were rotated.
This function rotates the 32-bit value Operand to the left by Count bits. The
low Count bits are fill with the high Count bits of Operand. The rotated
value is returned.
If Count is greater than 31, then ASSERT().
@param Operand The 32-bit operand to rotate left.
@param Count The number of bits to rotate left.
@return Operand << Count
**/
UINT32
EFIAPI
LRotU32 (
IN UINT32 Operand,
IN UINTN Count
)
{
ASSERT (Count < 32);
return (Operand << Count) | (Operand >> (32 - Count));
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
with the high bits that were rotated.
This function rotates the 64-bit value Operand to the left by Count bits. The
low Count bits are fill with the high Count bits of Operand. The rotated
value is returned.
If Count is greater than 63, then ASSERT().
@param Operand The 64-bit operand to rotate left.
@param Count The number of bits to rotate left.
@return Operand << Count
**/
UINT64
EFIAPI
LRotU64 (
IN UINT64 Operand,
IN UINTN Count
)
{
ASSERT (Count < 64);
return InternalMathLRotU64 (Operand, Count);
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
with zeros. The shifted value is returned.
This function shifts the 64-bit value Operand to the left by Count bits. The
low Count bits are set to zero. The shifted value is returned.
If Count is greater than 63, then ASSERT().
@param Operand The 64-bit operand to shift left.
@param Count The number of bits to shift left.
@return Operand << Count.
**/
UINT64
EFIAPI
LShiftU64 (
IN UINT64 Operand,
IN UINTN Count
)
{
ASSERT (Count < 64);
return InternalMathLShiftU64 (Operand, Count);
}

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/** @file
Linked List Library Functions.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Worker function that locates the Node in the List.
By searching the List, finds the location of the Node in List. At the same time,
verifies the validity of this list.
If List is NULL, then ASSERT().
If List->ForwardLink is NULL, then ASSERT().
If List->backLink is NULL, then ASSERT().
If Node is NULL, then ASSERT().
If PcdVerifyNodeInList is TRUE and DoMembershipCheck is TRUE and Node
is in not a member of List, then return FALSE
If PcdMaximumLinkedListLenth is not zero, and List contains more than
PcdMaximumLinkedListLenth nodes, then ASSERT().
@param List A pointer to a node in a linked list.
@param Node A pointer to a node in a linked list.
@param VerifyNodeInList TRUE if a check should be made to see if Node is a
member of List. FALSE if no membership test should
be performed.
@retval TRUE if PcdVerifyNodeInList is FALSE
@retval TRUE if DoMembershipCheck is FALSE
@retval TRUE if PcdVerifyNodeInList is TRUE and DoMembershipCheck is TRUE
and Node is a member of List.
@retval FALSE if PcdVerifyNodeInList is TRUE and DoMembershipCheck is TRUE
and Node is in not a member of List.
**/
BOOLEAN
EFIAPI
InternalBaseLibIsNodeInList (
IN CONST LIST_ENTRY *List,
IN CONST LIST_ENTRY *Node,
IN BOOLEAN VerifyNodeInList
)
{
UINTN Count;
CONST LIST_ENTRY *Ptr;
//
// Test the validity of List and Node
//
ASSERT (List != NULL);
ASSERT (List->ForwardLink != NULL);
ASSERT (List->BackLink != NULL);
ASSERT (Node != NULL);
Count = 0;
Ptr = List;
if (FeaturePcdGet (PcdVerifyNodeInList) && VerifyNodeInList) {
//
// Check to see if Node is a member of List.
// Exit early if the number of nodes in List >= PcdMaximumLinkedListLength
//
do {
Ptr = Ptr->ForwardLink;
if (PcdGet32 (PcdMaximumLinkedListLength) > 0) {
Count++;
//
// ASSERT() if the linked list is too long
//
ASSERT (Count < PcdGet32 (PcdMaximumLinkedListLength));
//
// Return if the linked list is too long
//
if (Count >= PcdGet32 (PcdMaximumLinkedListLength)) {
return (BOOLEAN)(Ptr == Node);
}
}
} while ((Ptr != List) && (Ptr != Node));
if (Ptr != Node) {
return FALSE;
}
}
if (PcdGet32 (PcdMaximumLinkedListLength) > 0) {
//
// Count the total number of nodes in List.
// Exit early if the number of nodes in List >= PcdMaximumLinkedListLength
//
do {
Ptr = Ptr->ForwardLink;
Count++;
} while ((Ptr != List) && (Count < PcdGet32 (PcdMaximumLinkedListLength)));
//
// ASSERT() if the linked list is too long
//
ASSERT (Count < PcdGet32 (PcdMaximumLinkedListLength));
}
return TRUE;
}
/**
Initializes the head node of a doubly-linked list, and returns the pointer to
the head node of the doubly-linked list.
Initializes the forward and backward links of a new linked list. After
initializing a linked list with this function, the other linked list
functions may be used to add and remove nodes from the linked list. It is up
to the caller of this function to allocate the memory for ListHead.
If ListHead is NULL, then ASSERT().
@param ListHead A pointer to the head node of a new doubly-linked list.
@return ListHead
**/
LIST_ENTRY *
EFIAPI
InitializeListHead (
IN OUT LIST_ENTRY *ListHead
)
{
ASSERT (ListHead != NULL);
ListHead->ForwardLink = ListHead;
ListHead->BackLink = ListHead;
return ListHead;
}
/**
Adds a node to the beginning of a doubly-linked list, and returns the pointer
to the head node of the doubly-linked list.
Adds the node Entry at the beginning of the doubly-linked list denoted by
ListHead, and returns ListHead.
If ListHead is NULL, then ASSERT().
If Entry is NULL, then ASSERT().
If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
InitializeListHead(), then ASSERT().
If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
of nodes in ListHead, including the ListHead node, is greater than or
equal to PcdMaximumLinkedListLength, then ASSERT().
@param ListHead A pointer to the head node of a doubly-linked list.
@param Entry A pointer to a node that is to be inserted at the beginning
of a doubly-linked list.
@return ListHead
**/
LIST_ENTRY *
EFIAPI
InsertHeadList (
IN OUT LIST_ENTRY *ListHead,
IN OUT LIST_ENTRY *Entry
)
{
//
// ASSERT List not too long and Entry is not one of the nodes of List
//
ASSERT (InternalBaseLibIsNodeInList (ListHead, Entry, FALSE));
Entry->ForwardLink = ListHead->ForwardLink;
Entry->BackLink = ListHead;
Entry->ForwardLink->BackLink = Entry;
ListHead->ForwardLink = Entry;
return ListHead;
}
/**
Adds a node to the end of a doubly-linked list, and returns the pointer to
the head node of the doubly-linked list.
Adds the node Entry to the end of the doubly-linked list denoted by ListHead,
and returns ListHead.
If ListHead is NULL, then ASSERT().
If Entry is NULL, then ASSERT().
If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
InitializeListHead(), then ASSERT().
If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
of nodes in ListHead, including the ListHead node, is greater than or
equal to PcdMaximumLinkedListLength, then ASSERT().
@param ListHead A pointer to the head node of a doubly-linked list.
@param Entry A pointer to a node that is to be added at the end of the
doubly-linked list.
@return ListHead
**/
LIST_ENTRY *
EFIAPI
InsertTailList (
IN OUT LIST_ENTRY *ListHead,
IN OUT LIST_ENTRY *Entry
)
{
//
// ASSERT List not too long and Entry is not one of the nodes of List
//
ASSERT (InternalBaseLibIsNodeInList (ListHead, Entry, FALSE));
Entry->ForwardLink = ListHead;
Entry->BackLink = ListHead->BackLink;
Entry->BackLink->ForwardLink = Entry;
ListHead->BackLink = Entry;
return ListHead;
}
/**
Retrieves the first node of a doubly-linked list.
Returns the first node of a doubly-linked list. List must have been
initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
If List is empty, then List is returned.
If List is NULL, then ASSERT().
If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
InitializeListHead(), then ASSERT().
If PcdMaximumLinkedListLenth is not zero, and the number of nodes
in List, including the List node, is greater than or equal to
PcdMaximumLinkedListLength, then ASSERT().
@param List A pointer to the head node of a doubly-linked list.
@return The first node of a doubly-linked list.
@retval NULL The list is empty.
**/
LIST_ENTRY *
EFIAPI
GetFirstNode (
IN CONST LIST_ENTRY *List
)
{
//
// ASSERT List not too long
//
ASSERT (InternalBaseLibIsNodeInList (List, List, FALSE));
return List->ForwardLink;
}
/**
Retrieves the next node of a doubly-linked list.
Returns the node of a doubly-linked list that follows Node.
List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
or InitializeListHead(). If List is empty, then List is returned.
If List is NULL, then ASSERT().
If Node is NULL, then ASSERT().
If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
InitializeListHead(), then ASSERT().
If PcdMaximumLinkedListLenth is not zero, and List contains more than
PcdMaximumLinkedListLenth nodes, then ASSERT().
If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
@param List A pointer to the head node of a doubly-linked list.
@param Node A pointer to a node in the doubly-linked list.
@return A pointer to the next node if one exists. Otherwise List is returned.
**/
LIST_ENTRY *
EFIAPI
GetNextNode (
IN CONST LIST_ENTRY *List,
IN CONST LIST_ENTRY *Node
)
{
//
// ASSERT List not too long and Node is one of the nodes of List
//
ASSERT (InternalBaseLibIsNodeInList (List, Node, TRUE));
return Node->ForwardLink;
}
/**
Retrieves the previous node of a doubly-linked list.
Returns the node of a doubly-linked list that precedes Node.
List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
or InitializeListHead(). If List is empty, then List is returned.
If List is NULL, then ASSERT().
If Node is NULL, then ASSERT().
If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
InitializeListHead(), then ASSERT().
If PcdMaximumLinkedListLenth is not zero, and List contains more than
PcdMaximumLinkedListLenth nodes, then ASSERT().
If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
@param List A pointer to the head node of a doubly-linked list.
@param Node A pointer to a node in the doubly-linked list.
@return A pointer to the previous node if one exists. Otherwise List is returned.
**/
LIST_ENTRY *
EFIAPI
GetPreviousNode (
IN CONST LIST_ENTRY *List,
IN CONST LIST_ENTRY *Node
)
{
//
// ASSERT List not too long and Node is one of the nodes of List
//
ASSERT (InternalBaseLibIsNodeInList (List, Node, TRUE));
return Node->BackLink;
}
/**
Checks to see if a doubly-linked list is empty or not.
Checks to see if the doubly-linked list is empty. If the linked list contains
zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
If ListHead is NULL, then ASSERT().
If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
InitializeListHead(), then ASSERT().
If PcdMaximumLinkedListLenth is not zero, and the number of nodes
in List, including the List node, is greater than or equal to
PcdMaximumLinkedListLength, then ASSERT().
@param ListHead A pointer to the head node of a doubly-linked list.
@retval TRUE The linked list is empty.
@retval FALSE The linked list is not empty.
**/
BOOLEAN
EFIAPI
IsListEmpty (
IN CONST LIST_ENTRY *ListHead
)
{
//
// ASSERT List not too long
//
ASSERT (InternalBaseLibIsNodeInList (ListHead, ListHead, FALSE));
return (BOOLEAN)(ListHead->ForwardLink == ListHead);
}
/**
Determines if a node in a doubly-linked list is the head node of a the same
doubly-linked list. This function is typically used to terminate a loop that
traverses all the nodes in a doubly-linked list starting with the head node.
Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
nodes in the doubly-linked list specified by List. List must have been
initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
If List is NULL, then ASSERT().
If Node is NULL, then ASSERT().
If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
then ASSERT().
If PcdMaximumLinkedListLenth is not zero, and the number of nodes
in List, including the List node, is greater than or equal to
PcdMaximumLinkedListLength, then ASSERT().
If PcdVerifyNodeInList is TRUE and Node is not a node in List and Node is not
equal to List, then ASSERT().
@param List A pointer to the head node of a doubly-linked list.
@param Node A pointer to a node in the doubly-linked list.
@retval TRUE Node is one of the nodes in the doubly-linked list.
@retval FALSE Node is not one of the nodes in the doubly-linked list.
**/
BOOLEAN
EFIAPI
IsNull (
IN CONST LIST_ENTRY *List,
IN CONST LIST_ENTRY *Node
)
{
//
// ASSERT List not too long and Node is one of the nodes of List
//
ASSERT (InternalBaseLibIsNodeInList (List, Node, TRUE));
return (BOOLEAN)(Node == List);
}
/**
Determines if a node the last node in a doubly-linked list.
Returns TRUE if Node is the last node in the doubly-linked list specified by
List. Otherwise, FALSE is returned. List must have been initialized with
INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
If List is NULL, then ASSERT().
If Node is NULL, then ASSERT().
If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
InitializeListHead(), then ASSERT().
If PcdMaximumLinkedListLenth is not zero, and the number of nodes
in List, including the List node, is greater than or equal to
PcdMaximumLinkedListLength, then ASSERT().
If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
@param List A pointer to the head node of a doubly-linked list.
@param Node A pointer to a node in the doubly-linked list.
@retval TRUE Node is the last node in the linked list.
@retval FALSE Node is not the last node in the linked list.
**/
BOOLEAN
EFIAPI
IsNodeAtEnd (
IN CONST LIST_ENTRY *List,
IN CONST LIST_ENTRY *Node
)
{
//
// ASSERT List not too long and Node is one of the nodes of List
//
ASSERT (InternalBaseLibIsNodeInList (List, Node, TRUE));
return (BOOLEAN)(!IsNull (List, Node) && List->BackLink == Node);
}
/**
Swaps the location of two nodes in a doubly-linked list, and returns the
first node after the swap.
If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
Otherwise, the location of the FirstEntry node is swapped with the location
of the SecondEntry node in a doubly-linked list. SecondEntry must be in the
same double linked list as FirstEntry and that double linked list must have
been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
SecondEntry is returned after the nodes are swapped.
If FirstEntry is NULL, then ASSERT().
If SecondEntry is NULL, then ASSERT().
If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the
same linked list, then ASSERT().
If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
linked list containing the FirstEntry and SecondEntry nodes, including
the FirstEntry and SecondEntry nodes, is greater than or equal to
PcdMaximumLinkedListLength, then ASSERT().
@param FirstEntry A pointer to a node in a linked list.
@param SecondEntry A pointer to another node in the same linked list.
@return SecondEntry.
**/
LIST_ENTRY *
EFIAPI
SwapListEntries (
IN OUT LIST_ENTRY *FirstEntry,
IN OUT LIST_ENTRY *SecondEntry
)
{
LIST_ENTRY *Ptr;
if (FirstEntry == SecondEntry) {
return SecondEntry;
}
//
// ASSERT Entry1 and Entry2 are in the same linked list
//
ASSERT (InternalBaseLibIsNodeInList (FirstEntry, SecondEntry, TRUE));
//
// Ptr is the node pointed to by FirstEntry->ForwardLink
//
Ptr = RemoveEntryList (FirstEntry);
//
// If FirstEntry immediately follows SecondEntry, FirstEntry will be placed
// immediately in front of SecondEntry
//
if (Ptr->BackLink == SecondEntry) {
return InsertTailList (SecondEntry, FirstEntry);
}
//
// Ptr == SecondEntry means SecondEntry immediately follows FirstEntry,
// then there are no further steps necessary
//
if (Ptr == InsertHeadList (SecondEntry, FirstEntry)) {
return Ptr;
}
//
// Move SecondEntry to the front of Ptr
//
RemoveEntryList (SecondEntry);
InsertTailList (Ptr, SecondEntry);
return SecondEntry;
}
/**
Removes a node from a doubly-linked list, and returns the node that follows
the removed node.
Removes the node Entry from a doubly-linked list. It is up to the caller of
this function to release the memory used by this node if that is required. On
exit, the node following Entry in the doubly-linked list is returned. If
Entry is the only node in the linked list, then the head node of the linked
list is returned.
If Entry is NULL, then ASSERT().
If Entry is the head node of an empty list, then ASSERT().
If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
linked list containing Entry, including the Entry node, is greater than
or equal to PcdMaximumLinkedListLength, then ASSERT().
@param Entry A pointer to a node in a linked list.
@return Entry.
**/
LIST_ENTRY *
EFIAPI
RemoveEntryList (
IN CONST LIST_ENTRY *Entry
)
{
ASSERT (!IsListEmpty (Entry));
Entry->ForwardLink->BackLink = Entry->BackLink;
Entry->BackLink->ForwardLink = Entry->ForwardLink;
return Entry->ForwardLink;
}

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/** @file
Long Jump functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Restores the CPU context that was saved with SetJump().
Restores the CPU context from the buffer specified by JumpBuffer. This
function never returns to the caller. Instead is resumes execution based on
the state of JumpBuffer.
If JumpBuffer is NULL, then ASSERT().
For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
If Value is 0, then ASSERT().
@param JumpBuffer A pointer to CPU context buffer.
@param Value The value to return when the SetJump() context is
restored and must be non-zero.
**/
VOID
EFIAPI
LongJump (
IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
IN UINTN Value
)
{
InternalAssertJumpBuffer (JumpBuffer);
ASSERT (Value != 0);
InternalLongJump (JumpBuffer, Value);
}

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@ -0,0 +1,47 @@
/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Returns the bit position of the lowest bit set in a 32-bit value.
This function computes the bit position of the lowest bit set in the 32-bit
value specified by Operand. If Operand is zero, then -1 is returned.
Otherwise, a value between 0 and 31 is returned.
@param Operand The 32-bit operand to evaluate.
@retval 0..31 The lowest bit set in Operand was found.
@retval -1 Operand is zero.
**/
INTN
EFIAPI
LowBitSet32 (
IN UINT32 Operand
)
{
INTN BitIndex;
if (Operand == 0) {
return -1;
}
for (BitIndex = 0; 0 == (Operand & 1); BitIndex++, Operand >>= 1);
return BitIndex;
}

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@ -0,0 +1,50 @@
/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Returns the bit position of the lowest bit set in a 64-bit value.
This function computes the bit position of the lowest bit set in the 64-bit
value specified by Operand. If Operand is zero, then -1 is returned.
Otherwise, a value between 0 and 63 is returned.
@param Operand The 64-bit operand to evaluate.
@retval 0..63 The lowest bit set in Operand was found.
@retval -1 Operand is zero.
**/
INTN
EFIAPI
LowBitSet64 (
IN UINT64 Operand
)
{
INTN BitIndex;
if (Operand == 0) {
return -1;
}
for (BitIndex = 0;
(Operand & 1) == 0;
BitIndex++, Operand = RShiftU64 (Operand, 1));
return BitIndex;
}

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@ -0,0 +1,368 @@
/** @file
Leaf math worker functions that require 64-bit arithmetic support from the
compiler.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Shifts a 64-bit integer left between 0 and 63 bits. The low bits
are filled with zeros. The shifted value is returned.
This function shifts the 64-bit value Operand to the left by Count bits. The
low Count bits are set to zero. The shifted value is returned.
@param Operand The 64-bit operand to shift left.
@param Count The number of bits to shift left.
@return Operand << Count.
**/
UINT64
EFIAPI
InternalMathLShiftU64 (
IN UINT64 Operand,
IN UINTN Count
)
{
return Operand << Count;
}
/**
Shifts a 64-bit integer right between 0 and 63 bits. This high bits
are filled with zeros. The shifted value is returned.
This function shifts the 64-bit value Operand to the right by Count bits. The
high Count bits are set to zero. The shifted value is returned.
@param Operand The 64-bit operand to shift right.
@param Count The number of bits to shift right.
@return Operand >> Count.
**/
UINT64
EFIAPI
InternalMathRShiftU64 (
IN UINT64 Operand,
IN UINTN Count
)
{
return Operand >> Count;
}
/**
Shifts a 64-bit integer right between 0 and 63 bits. The high bits
are filled with original integer's bit 63. The shifted value is returned.
This function shifts the 64-bit value Operand to the right by Count bits. The
high Count bits are set to bit 63 of Operand. The shifted value is returned.
@param Operand The 64-bit operand to shift right.
@param Count The number of bits to shift right.
@return Operand arithmetically shifted right by Count.
**/
UINT64
EFIAPI
InternalMathARShiftU64 (
IN UINT64 Operand,
IN UINTN Count
)
{
INTN TestValue;
//
// Test if this compiler supports arithmetic shift
//
TestValue = (((-1) << (sizeof (-1) * 8 - 1)) >> (sizeof (-1) * 8 - 1));
if (TestValue == -1) {
//
// Arithmetic shift is supported
//
return (UINT64)((INT64)Operand >> Count);
}
//
// Arithmetic is not supported
//
return (Operand >> Count) |
((INTN)Operand < 0 ? ~((UINTN)-1 >> Count) : 0);
}
/**
Rotates a 64-bit integer left between 0 and 63 bits, filling
the low bits with the high bits that were rotated.
This function rotates the 64-bit value Operand to the left by Count bits. The
low Count bits are fill with the high Count bits of Operand. The rotated
value is returned.
@param Operand The 64-bit operand to rotate left.
@param Count The number of bits to rotate left.
@return Operand <<< Count.
**/
UINT64
EFIAPI
InternalMathLRotU64 (
IN UINT64 Operand,
IN UINTN Count
)
{
return (Operand << Count) | (Operand >> (64 - Count));
}
/**
Rotates a 64-bit integer right between 0 and 63 bits, filling
the high bits with the high low bits that were rotated.
This function rotates the 64-bit value Operand to the right by Count bits.
The high Count bits are fill with the low Count bits of Operand. The rotated
value is returned.
@param Operand The 64-bit operand to rotate right.
@param Count The number of bits to rotate right.
@return Operand >>> Count.
**/
UINT64
EFIAPI
InternalMathRRotU64 (
IN UINT64 Operand,
IN UINTN Count
)
{
return (Operand >> Count) | (Operand << (64 - Count));
}
/**
Switches the endianess of a 64-bit integer.
This function swaps the bytes in a 64-bit unsigned value to switch the value
from little endian to big endian or vice versa. The byte swapped value is
returned.
@param Operand A 64-bit unsigned value.
@return The byte swapped Operand.
**/
UINT64
EFIAPI
InternalMathSwapBytes64 (
IN UINT64 Operand
)
{
UINT64 LowerBytes;
UINT64 HigherBytes;
LowerBytes = (UINT64) SwapBytes32 ((UINT32) Operand);
HigherBytes = (UINT64) SwapBytes32 ((UINT32) (Operand >> 32));
return (LowerBytes << 32 | HigherBytes);
}
/**
Multiplies a 64-bit unsigned integer by a 32-bit unsigned integer
and generates a 64-bit unsigned result.
This function multiplies the 64-bit unsigned value Multiplicand by the 32-bit
unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
bit unsigned result is returned.
@param Multiplicand A 64-bit unsigned value.
@param Multiplier A 32-bit unsigned value.
@return Multiplicand * Multiplier
**/
UINT64
EFIAPI
InternalMathMultU64x32 (
IN UINT64 Multiplicand,
IN UINT32 Multiplier
)
{
return Multiplicand * Multiplier;
}
/**
Multiplies a 64-bit unsigned integer by a 64-bit unsigned integer
and generates a 64-bit unsigned result.
This function multiplies the 64-bit unsigned value Multiplicand by the 64-bit
unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
bit unsigned result is returned.
@param Multiplicand A 64-bit unsigned value.
@param Multiplier A 64-bit unsigned value.
@return Multiplicand * Multiplier.
**/
UINT64
EFIAPI
InternalMathMultU64x64 (
IN UINT64 Multiplicand,
IN UINT64 Multiplier
)
{
return Multiplicand * Multiplier;
}
/**
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
generates a 64-bit unsigned result.
This function divides the 64-bit unsigned value Dividend by the 32-bit
unsigned value Divisor and generates a 64-bit unsigned quotient. This
function returns the 64-bit unsigned quotient.
@param Dividend A 64-bit unsigned value.
@param Divisor A 32-bit unsigned value.
@return Dividend / Divisor.
**/
UINT64
EFIAPI
InternalMathDivU64x32 (
IN UINT64 Dividend,
IN UINT32 Divisor
)
{
return Dividend / Divisor;
}
/**
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
generates a 32-bit unsigned remainder.
This function divides the 64-bit unsigned value Dividend by the 32-bit
unsigned value Divisor and generates a 32-bit remainder. This function
returns the 32-bit unsigned remainder.
@param Dividend A 64-bit unsigned value.
@param Divisor A 32-bit unsigned value.
@return Dividend % Divisor.
**/
UINT32
EFIAPI
InternalMathModU64x32 (
IN UINT64 Dividend,
IN UINT32 Divisor
)
{
return (UINT32)(Dividend % Divisor);
}
/**
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
generates a 64-bit unsigned result and an optional 32-bit unsigned remainder.
This function divides the 64-bit unsigned value Dividend by the 32-bit
unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
This function returns the 64-bit unsigned quotient.
@param Dividend A 64-bit unsigned value.
@param Divisor A 32-bit unsigned value.
@param Remainder A pointer to a 32-bit unsigned value. This parameter is
optional and may be NULL.
@return Dividend / Divisor.
**/
UINT64
EFIAPI
InternalMathDivRemU64x32 (
IN UINT64 Dividend,
IN UINT32 Divisor,
OUT UINT32 *Remainder OPTIONAL
)
{
if (Remainder != NULL) {
*Remainder = (UINT32)(Dividend % Divisor);
}
return Dividend / Divisor;
}
/**
Divides a 64-bit unsigned integer by a 64-bit unsigned integer and
generates a 64-bit unsigned result and an optional 64-bit unsigned remainder.
This function divides the 64-bit unsigned value Dividend by the 64-bit
unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
This function returns the 64-bit unsigned quotient.
@param Dividend A 64-bit unsigned value.
@param Divisor A 64-bit unsigned value.
@param Remainder A pointer to a 64-bit unsigned value. This parameter is
optional and may be NULL.
@return Dividend / Divisor
**/
UINT64
EFIAPI
InternalMathDivRemU64x64 (
IN UINT64 Dividend,
IN UINT64 Divisor,
OUT UINT64 *Remainder OPTIONAL
)
{
if (Remainder != NULL) {
*Remainder = Dividend % Divisor;
}
return Dividend / Divisor;
}
/**
Divides a 64-bit signed integer by a 64-bit signed integer and
generates a 64-bit signed result and an optional 64-bit signed remainder.
This function divides the 64-bit signed value Dividend by the 64-bit
signed value Divisor and generates a 64-bit signed quotient. If Remainder
is not NULL, then the 64-bit signed remainder is returned in Remainder.
This function returns the 64-bit signed quotient.
@param Dividend A 64-bit signed value.
@param Divisor A 64-bit signed value.
@param Remainder A pointer to a 64-bit signed value. This parameter is
optional and may be NULL.
@return Dividend / Divisor.
**/
INT64
EFIAPI
InternalMathDivRemS64x64 (
IN INT64 Dividend,
IN INT64 Divisor,
OUT INT64 *Remainder OPTIONAL
)
{
if (Remainder != NULL) {
*Remainder = Dividend % Divisor;
}
return Dividend / Divisor;
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
a 32-bit unsigned remainder.
This function divides the 64-bit unsigned value Dividend by the 32-bit
unsigned value Divisor and generates a 32-bit remainder. This function
returns the 32-bit unsigned remainder.
If Divisor is 0, then ASSERT().
@param Dividend A 64-bit unsigned value.
@param Divisor A 32-bit unsigned value.
@return Dividend % Divisor.
**/
UINT32
EFIAPI
ModU64x32 (
IN UINT64 Dividend,
IN UINT32 Divisor
)
{
ASSERT (Divisor != 0);
return InternalMathModU64x32 (Dividend, Divisor);
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Multiplies a 64-bit signed integer by a 64-bit signed integer and generates a
64-bit signed result.
This function multiplies the 64-bit signed value Multiplicand by the 64-bit
signed value Multiplier and generates a 64-bit signed result. This 64-bit
signed result is returned.
@param Multiplicand A 64-bit signed value.
@param Multiplier A 64-bit signed value.
@return Multiplicand * Multiplier.
**/
INT64
EFIAPI
MultS64x64 (
IN INT64 Multiplicand,
IN INT64 Multiplier
)
{
return (INT64)MultU64x64 (Multiplicand, Multiplier);
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Multiplies a 64-bit unsigned integer by a 32-bit unsigned integer and
generates a 64-bit unsigned result.
This function multiplies the 64-bit unsigned value Multiplicand by the 32-bit
unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
bit unsigned result is returned.
@param Multiplicand A 64-bit unsigned value.
@param Multiplier A 32-bit unsigned value.
@return Multiplicand * Multiplier.
**/
UINT64
EFIAPI
MultU64x32 (
IN UINT64 Multiplicand,
IN UINT32 Multiplier
)
{
UINT64 Result;
Result = InternalMathMultU64x32 (Multiplicand, Multiplier);
return Result;
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Multiplies a 64-bit unsigned integer by a 64-bit unsigned integer and
generates a 64-bit unsigned result.
This function multiplies the 64-bit unsigned value Multiplicand by the 64-bit
unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
bit unsigned result is returned.
@param Multiplicand A 64-bit unsigned value.
@param Multiplier A 64-bit unsigned value.
@return Multiplicand * Multiplier.
**/
UINT64
EFIAPI
MultU64x64 (
IN UINT64 Multiplicand,
IN UINT64 Multiplier
)
{
UINT64 Result;
Result = InternalMathMultU64x64 (Multiplicand, Multiplier);
return Result;
}

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/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
with the low bits that were rotated.
This function rotates the 32-bit value Operand to the right by Count bits.
The high Count bits are fill with the low Count bits of Operand. The rotated
value is returned.
If Count is greater than 31, then ASSERT().
@param Operand The 32-bit operand to rotate right.
@param Count The number of bits to rotate right.
@return Operand >> Count.
**/
UINT32
EFIAPI
RRotU32 (
IN UINT32 Operand,
IN UINTN Count
)
{
ASSERT (Count < 32);
return (Operand >> Count) | (Operand << (32 - Count));
}

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@ -0,0 +1,42 @@
/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
with the high low bits that were rotated.
This function rotates the 64-bit value Operand to the right by Count bits.
The high Count bits are fill with the low Count bits of Operand. The rotated
value is returned.
If Count is greater than 63, then ASSERT().
@param Operand The 64-bit operand to rotate right.
@param Count The number of bits to rotate right.
@return Operand >> Count.
**/
UINT64
EFIAPI
RRotU64 (
IN UINT64 Operand,
IN UINTN Count
)
{
ASSERT (Count < 64);
return InternalMathRRotU64 (Operand, Count);
}

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@ -0,0 +1,41 @@
/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
filled with zeros. The shifted value is returned.
This function shifts the 64-bit value Operand to the right by Count bits. The
high Count bits are set to zero. The shifted value is returned.
If Count is greater than 63, then ASSERT().
@param Operand The 64-bit operand to shift right.
@param Count The number of bits to shift right.
@return Operand >> Count.
**/
UINT64
EFIAPI
RShiftU64 (
IN UINT64 Operand,
IN UINTN Count
)
{
ASSERT (Count < 64);
return InternalMathRShiftU64 (Operand, Count);
}

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@ -0,0 +1,40 @@
/** @file
Internal ASSERT () functions for SetJump.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Worker function that checks ASSERT condition for JumpBuffer
Checks ASSERT condition for JumpBuffer.
If JumpBuffer is NULL, then ASSERT().
For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
@param JumpBuffer A pointer to CPU context buffer.
**/
VOID
EFIAPI
InternalAssertJumpBuffer (
IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
)
{
ASSERT (JumpBuffer != NULL);
ASSERT (((UINTN)JumpBuffer & (BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT - 1)) == 0);
}

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,39 @@
/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Switches the endianess of a 16-bit integer.
This function swaps the bytes in a 16-bit unsigned value to switch the value
from little endian to big endian or vice versa. The byte swapped value is
returned.
@param Value A 16-bit unsigned value.
@return The byte swapped Value.
**/
UINT16
EFIAPI
SwapBytes16 (
IN UINT16 Value
)
{
return (UINT16) ((Value<< 8) | (Value>> 8));
}

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@ -0,0 +1,45 @@
/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Switches the endianess of a 32-bit integer.
This function swaps the bytes in a 32-bit unsigned value to switch the value
from little endian to big endian or vice versa. The byte swapped value is
returned.
@param Value A 32-bit unsigned value.
@return The byte swapped Value.
**/
UINT32
EFIAPI
SwapBytes32 (
IN UINT32 Value
)
{
UINT32 LowerBytes;
UINT32 HigherBytes;
LowerBytes = (UINT32) SwapBytes16 ((UINT16) Value);
HigherBytes = (UINT32) SwapBytes16 ((UINT16) (Value >> 16));
return (LowerBytes << 16 | HigherBytes);
}

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@ -0,0 +1,39 @@
/** @file
Math worker functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Switches the endianess of a 64-bit integer.
This function swaps the bytes in a 64-bit unsigned value to switch the value
from little endian to big endian or vice versa. The byte swapped value is
returned.
@param Value A 64-bit unsigned value.
@return The byte swapped Value.
**/
UINT64
EFIAPI
SwapBytes64 (
IN UINT64 Value
)
{
return InternalMathSwapBytes64 (Value);
}

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@ -0,0 +1,76 @@
/** @file
Switch Stack functions.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Transfers control to a function starting with a new stack.
Transfers control to the function specified by EntryPoint using the
new stack specified by NewStack and passing in the parameters specified
by Context1 and Context2. Context1 and Context2 are optional and may
be NULL. The function EntryPoint must never return. This function
supports a variable number of arguments following the NewStack parameter.
These additional arguments are ignored on IA-32, x64, and EBC.
IPF CPUs expect one additional parameter of type VOID * that specifies
the new backing store pointer.
If EntryPoint is NULL, then ASSERT().
If NewStack is NULL, then ASSERT().
@param EntryPoint A pointer to function to call with the new stack.
@param Context1 A pointer to the context to pass into the EntryPoint
function.
@param Context2 A pointer to the context to pass into the EntryPoint
function.
@param NewStack A pointer to the new stack to use for the EntryPoint
function.
@param ... This variable argument list is ignored for IA32, x64, and EBC.
For IPF, this variable argument list is expected to contain
a single parameter of type VOID * that specifies the new backing
store pointer.
**/
VOID
EFIAPI
SwitchStack (
IN SWITCH_STACK_ENTRY_POINT EntryPoint,
IN VOID *Context1, OPTIONAL
IN VOID *Context2, OPTIONAL
IN VOID *NewStack,
...
)
{
VA_LIST Marker;
ASSERT (EntryPoint != NULL);
ASSERT (NewStack != NULL);
//
// New stack must be aligned with CPU_STACK_ALIGNMENT
//
ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);
VA_START (Marker, NewStack);
InternalSwitchStack (EntryPoint, Context1, Context2, NewStack, Marker);
VA_END (Marker);
//
// InternalSwitchStack () will never return
//
ASSERT (FALSE);
}

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@ -0,0 +1,222 @@
/** @file
Unaligned access functions of BaseLib.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
/**
Reads a 16-bit value from memory that may be unaligned.
This function returns the 16-bit value pointed to by Buffer. The function
guarantees that the read operation does not produce an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer A pointer to a 16-bit value that may be unaligned.
@return The 16-bit value read from Buffer.
**/
UINT16
EFIAPI
ReadUnaligned16 (
IN CONST UINT16 *Buffer
)
{
ASSERT (Buffer != NULL);
return *Buffer;
}
/**
Writes a 16-bit value to memory that may be unaligned.
This function writes the 16-bit value specified by Value to Buffer. Value is
returned. The function guarantees that the write operation does not produce
an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer A pointer to a 16-bit value that may be unaligned.
@param Value 16-bit value to write to Buffer.
@return The 16-bit value to write to Buffer.
**/
UINT16
EFIAPI
WriteUnaligned16 (
OUT UINT16 *Buffer,
IN UINT16 Value
)
{
ASSERT (Buffer != NULL);
return *Buffer = Value;
}
/**
Reads a 24-bit value from memory that may be unaligned.
This function returns the 24-bit value pointed to by Buffer. The function
guarantees that the read operation does not produce an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer A pointer to a 24-bit value that may be unaligned.
@return The 24-bit value read from Buffer.
**/
UINT32
EFIAPI
ReadUnaligned24 (
IN CONST UINT32 *Buffer
)
{
ASSERT (Buffer != NULL);
return *Buffer & 0xffffff;
}
/**
Writes a 24-bit value to memory that may be unaligned.
This function writes the 24-bit value specified by Value to Buffer. Value is
returned. The function guarantees that the write operation does not produce
an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer A pointer to a 24-bit value that may be unaligned.
@param Value 24-bit value to write to Buffer.
@return The 24-bit value to write to Buffer.
**/
UINT32
EFIAPI
WriteUnaligned24 (
OUT UINT32 *Buffer,
IN UINT32 Value
)
{
ASSERT (Buffer != NULL);
*Buffer = BitFieldWrite32 (*Buffer, 0, 23, Value);
return Value;
}
/**
Reads a 32-bit value from memory that may be unaligned.
This function returns the 32-bit value pointed to by Buffer. The function
guarantees that the read operation does not produce an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer A pointer to a 32-bit value that may be unaligned.
@return The 32-bit value read from Buffer.
**/
UINT32
EFIAPI
ReadUnaligned32 (
IN CONST UINT32 *Buffer
)
{
ASSERT (Buffer != NULL);
return *Buffer;
}
/**
Writes a 32-bit value to memory that may be unaligned.
This function writes the 32-bit value specified by Value to Buffer. Value is
returned. The function guarantees that the write operation does not produce
an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer A pointer to a 32-bit value that may be unaligned.
@param Value The 32-bit value to write to Buffer.
@return The 32-bit value to write to Buffer.
**/
UINT32
EFIAPI
WriteUnaligned32 (
OUT UINT32 *Buffer,
IN UINT32 Value
)
{
ASSERT (Buffer != NULL);
return *Buffer = Value;
}
/**
Reads a 64-bit value from memory that may be unaligned.
This function returns the 64-bit value pointed to by Buffer. The function
guarantees that the read operation does not produce an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer A pointer to a 64-bit value that may be unaligned.
@return The 64-bit value read from Buffer.
**/
UINT64
EFIAPI
ReadUnaligned64 (
IN CONST UINT64 *Buffer
)
{
ASSERT (Buffer != NULL);
return *Buffer;
}
/**
Writes a 64-bit value to memory that may be unaligned.
This function writes the 64-bit value specified by Value to Buffer. Value is
returned. The function guarantees that the write operation does not produce
an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer A pointer to a 64-bit value that may be unaligned.
@param Value The 64-bit value to write to Buffer.
@return The 64-bit value to write to Buffer.
**/
UINT64
EFIAPI
WriteUnaligned64 (
OUT UINT64 *Buffer,
IN UINT64 Value
)
{
ASSERT (Buffer != NULL);
return *Buffer = Value;
}

View File

@ -0,0 +1,201 @@
## @file
# Base Library implementation for X64 UnixPkg. X64 code writes CR3 so to
# not change MdeModulePkg DxeIpl we need a UnixPkg copy of the BaseLib.
#
# Currently I'm debugging UnixPkg with SVR V ABI so there are some
# temp changes for that too.
#
#
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = BaseLib
FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = BaseLib
#
# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM
#
[Sources]
CheckSum.c
SwitchStack.c
SwapBytes64.c
SwapBytes32.c
SwapBytes16.c
LongJump.c
SetJump.c
RShiftU64.c
RRotU64.c
RRotU32.c
MultU64x64.c
MultU64x32.c
MultS64x64.c
ModU64x32.c
LShiftU64.c
LRotU64.c
LRotU32.c
LowBitSet64.c
LowBitSet32.c
HighBitSet64.c
HighBitSet32.c
GetPowerOfTwo64.c
GetPowerOfTwo32.c
DivU64x64Remainder.c
DivU64x32Remainder.c
DivU64x32.c
DivS64x64Remainder.c
ARShiftU64.c
BitField.c
CpuDeadLoop.c
Cpu.c
LinkedList.c
String.c
BaseLibInternals.h
[Sources.X64]
X64/Thunk16.asm
X64/CpuPause.asm
X64/EnableDisableInterrupts.asm
X64/DisableInterrupts.asm
X64/EnableInterrupts.asm
X64/FlushCacheLine.asm
X64/Invd.asm
X64/Wbinvd.asm
X64/DisablePaging64.asm
X64/Mwait.asm
X64/Monitor.asm
X64/ReadPmc.asm
X64/ReadTsc.asm
X64/WriteMm7.asm
X64/WriteMm6.asm
X64/WriteMm5.asm
X64/WriteMm4.asm
X64/WriteMm3.asm
X64/WriteMm2.asm
X64/WriteMm1.asm
X64/WriteMm0.asm
X64/ReadMm7.asm
X64/ReadMm6.asm
X64/ReadMm5.asm
X64/ReadMm4.asm
X64/ReadMm3.asm
X64/ReadMm2.asm
X64/ReadMm1.asm
X64/ReadMm0.asm
X64/FxRestore.asm
X64/FxSave.asm
X64/WriteLdtr.asm
X64/ReadLdtr.asm
X64/WriteIdtr.asm
X64/ReadIdtr.asm
X64/WriteGdtr.asm
X64/ReadGdtr.asm
X64/ReadTr.asm
X64/ReadSs.asm
X64/ReadGs.asm
X64/ReadFs.asm
X64/ReadEs.asm
X64/ReadDs.asm
X64/ReadCs.asm
X64/WriteDr7.asm
X64/WriteDr6.asm
X64/WriteDr5.asm
X64/WriteDr4.asm
X64/WriteDr3.asm
X64/WriteDr2.asm
X64/WriteDr1.asm
X64/WriteDr0.asm
X64/ReadDr7.asm
X64/ReadDr6.asm
X64/ReadDr5.asm
X64/ReadDr4.asm
X64/ReadDr3.asm
X64/ReadDr2.asm
X64/ReadDr1.asm
X64/ReadDr0.asm
X64/WriteCr4.asm
X64/WriteCr3.asm
X64/WriteCr2.asm
X64/WriteCr0.asm
X64/ReadCr4.asm
X64/ReadCr3.asm
X64/ReadCr2.asm
X64/ReadCr0.asm
X64/ReadEflags.asm
X64/CpuIdEx.asm
X64/CpuId.asm
X64/LongJump.asm
X64/SetJump.asm
X64/SwitchStack.asm
X64/EnableCache.asm
X64/DisableCache.asm
X64/CpuBreakpoint.c | MSFT
X64/WriteMsr64.c | MSFT
X64/ReadMsr64.c | MSFT
X64/CpuBreakpoint.asm | INTEL
X64/WriteMsr64.asm | INTEL
X64/ReadMsr64.asm | INTEL
X64/Non-existing.c
Math64.c
Unaligned.c
X86WriteIdtr.c
X86WriteGdtr.c
X86Thunk.c
X86ReadIdtr.c
X86ReadGdtr.c
X86Msr.c
X86MemoryFence.c | MSFT
X86MemoryFence.c | INTEL
X86GetInterruptState.c
X86FxSave.c
X86FxRestore.c
X86EnablePaging64.c
X86EnablePaging32.c
X86DisablePaging64.c
X86DisablePaging32.c
X64/GccInline.c | GCC
X64/Thunk16.S | GCC
X64/SwitchStack.S | GCC
X64/SetJump.S | GCC
X64/LongJump.S | GCC
X64/EnableDisableInterrupts.S | GCC
X64/DisablePaging64.S | GCC
X64/CpuId.S | GCC
X64/CpuIdEx.S | GCC
X64/EnableCache.S | GCC
X64/DisableCache.S | GCC
ChkStkGcc.c | GCC
[Packages]
MdePkg/MdePkg.dec
[LibraryClasses]
PcdLib
DebugLib
BaseMemoryLib
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength
gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength
gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength
gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList

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#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# CpuBreakpoint.S
#
# Abstract:
#
# Implementation of CpuBreakpoint() on x86_64
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(CpuBreakpoint)
ASM_PFX(CpuBreakpoint):
int $0x3
ret

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;------------------------------------------------------------------------------ ;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; CpuBreakpoint.Asm
;
; Abstract:
;
; CpuBreakpoint function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; CpuBreakpoint (
; VOID
; );
;------------------------------------------------------------------------------
CpuBreakpoint PROC
int 3
ret
CpuBreakpoint ENDP
END

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/** @file
CpuBreakpoint function.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
/**
Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.
**/
void __debugbreak ();
#pragma intrinsic(__debugbreak)
/**
Generates a breakpoint on the CPU.
Generates a breakpoint on the CPU. The breakpoint must be implemented such
that code can resume normal execution after the breakpoint.
**/
VOID
EFIAPI
CpuBreakpoint (
VOID
)
{
__debugbreak ();
}

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#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# CpuId.S
#
# Abstract:
#
# AsmCpuid function
#
# Notes:
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# AsmCpuid (
# IN UINT32 RegisterInEax,
# OUT UINT32 *RegisterOutEax OPTIONAL,
# OUT UINT32 *RegisterOutEbx OPTIONAL,
# OUT UINT32 *RegisterOutEcx OPTIONAL,
# OUT UINT32 *RegisterOutEdx OPTIONAL
# )
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmCpuid)
ASM_PFX(AsmCpuid):
push %rbx
mov %ecx, %eax
push %rax # save Index on stack
push %rdx
cpuid
test %r9, %r9
jz L1
mov %ecx, (%r9)
L1:
pop %rcx
jrcxz L2
mov %eax, (%rcx)
L2:
mov %r8, %rcx
jrcxz L3
mov %ebx, (%rcx)
L3:
mov 0x38(%rsp), %rcx
jrcxz L4
mov %edx, (%rcx)
L4:
pop %rax # restore Index to rax as return value
pop %rbx
ret

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; CpuId.Asm
;
; Abstract:
;
; AsmCpuid function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; AsmCpuid (
; IN UINT32 RegisterInEax,
; OUT UINT32 *RegisterOutEax OPTIONAL,
; OUT UINT32 *RegisterOutEbx OPTIONAL,
; OUT UINT32 *RegisterOutEcx OPTIONAL,
; OUT UINT32 *RegisterOutEdx OPTIONAL
; )
;------------------------------------------------------------------------------
AsmCpuid PROC USES rbx
mov eax, ecx
push rax ; save Index on stack
push rdx
cpuid
test r9, r9
jz @F
mov [r9], ecx
@@:
pop rcx
jrcxz @F
mov [rcx], eax
@@:
mov rcx, r8
jrcxz @F
mov [rcx], ebx
@@:
mov rcx, [rsp + 38h]
jrcxz @F
mov [rcx], edx
@@:
pop rax ; restore Index to rax as return value
ret
AsmCpuid ENDP
END

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#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# CpuIdEx.S
#
# Abstract:
#
# AsmCpuidEx function
#
# Notes:
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# UINT32
# EFIAPI
# AsmCpuidEx (
# IN UINT32 RegisterInEax,
# IN UINT32 RegisterInEcx,
# OUT UINT32 *RegisterOutEax OPTIONAL,
# OUT UINT32 *RegisterOutEbx OPTIONAL,
# OUT UINT32 *RegisterOutEcx OPTIONAL,
# OUT UINT32 *RegisterOutEdx OPTIONAL
# )
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmCpuidEx)
ASM_PFX(AsmCpuidEx):
push %rbx
movl %ecx,%eax
movl %edx,%ecx
push %rax # save Index on stack
cpuid
mov 0x38(%rsp), %r10
test %r10, %r10
jz L1
mov %ecx,(%r10)
L1:
mov %r8, %rcx
jrcxz L2
movl %eax,(%rcx)
L2:
mov %r9, %rcx
jrcxz L3
mov %ebx, (%rcx)
L3:
mov 0x40(%rsp), %rcx
jrcxz L4
mov %edx, (%rcx)
L4:
pop %rax # restore Index to rax as return value
pop %rbx
ret

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; CpuIdEx.Asm
;
; Abstract:
;
; AsmCpuidEx function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT32
; EFIAPI
; AsmCpuidEx (
; IN UINT32 RegisterInEax,
; IN UINT32 RegisterInEcx,
; OUT UINT32 *RegisterOutEax OPTIONAL,
; OUT UINT32 *RegisterOutEbx OPTIONAL,
; OUT UINT32 *RegisterOutEcx OPTIONAL,
; OUT UINT32 *RegisterOutEdx OPTIONAL
; )
;------------------------------------------------------------------------------
AsmCpuidEx PROC USES rbx
mov eax, ecx
mov ecx, edx
push rax ; save Index on stack
cpuid
mov r10, [rsp + 38h]
test r10, r10
jz @F
mov [r10], ecx
@@:
mov rcx, r8
jrcxz @F
mov [rcx], eax
@@:
mov rcx, r9
jrcxz @F
mov [rcx], ebx
@@:
mov rcx, [rsp + 40h]
jrcxz @F
mov [rcx], edx
@@:
pop rax ; restore Index to rax as return value
ret
AsmCpuidEx ENDP
END

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;------------------------------------------------------------------------------ ;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; CpuPause.Asm
;
; Abstract:
;
; CpuPause function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; CpuPause (
; VOID
; );
;------------------------------------------------------------------------------
CpuPause PROC
pause
ret
CpuPause ENDP
END

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#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# DisableCache.S
#
# Abstract:
#
# Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
# WBINVD instruction.
#
# Notes:
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# AsmDisableCache (
# VOID
# );
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmDisableCache)
ASM_PFX(AsmDisableCache):
movq %cr0, %rax
btsq $30, %rax
btrq $29, %rax
movq %rax, %cr0
wbinvd
ret

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; DisableCache.Asm
;
; Abstract:
;
; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
; WBINVD instruction.
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; AsmDisableCache (
; VOID
; );
;------------------------------------------------------------------------------
AsmDisableCache PROC
mov rax, cr0
bts rax, 30
btr rax, 29
mov cr0, rax
wbinvd
ret
AsmDisableCache ENDP
END

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; DisableInterrupts.Asm
;
; Abstract:
;
; DisableInterrupts function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; DisableInterrupts (
; VOID
; );
;------------------------------------------------------------------------------
DisableInterrupts PROC
cli
ret
DisableInterrupts ENDP
END

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#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# DisablePaging64.S
#
# Abstract:
#
# AsmDisablePaging64 function
#
# Notes:
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# InternalX86DisablePaging64 (
# IN UINT16 Cs,
# IN UINT32 EntryPoint,
# IN UINT32 Context1, OPTIONAL
# IN UINT32 Context2, OPTIONAL
# IN UINT32 NewStack
# );
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalX86DisablePaging64)
ASM_PFX(InternalX86DisablePaging64):
cli
lea L1(%rip), %rsi # rsi <- The start address of transition code
mov 0x28(%rsp), %edi # rdi <- New stack
lea _mTransitionEnd(%rip), %rax # rax <- end of transition code
sub %rsi, %rax # rax <- The size of transition piece code
add $4, %rax # round rax up to the next 4 byte boundary
and $0xfc, %al
sub %rax, %rdi # rdi <- use stack to hold transition code
mov %edi, %r10d # r10 <- The start address of transicition code below 4G
push %rcx # save rcx to stack
mov %rax, %rcx # rcx <- The size of transition piece code
rep
movsb # copy transition code to (new stack - 64byte) below 4G
pop %rcx # restore rcx
mov %r8d, %esi
mov %r9d, %edi
mov %r10d, %eax
sub $4, %eax
push %rcx # push Cs to stack
push %r10 # push address of transition code on stack
.byte 0x48, 0xcb # retq: Use far return to load CS register from stack
# (Use raw byte code since some GNU assemblers generates incorrect code for "retq")
L1:
mov %eax,%esp # set up new stack
mov %cr0,%rax
btr $0x1f,%eax # clear CR0.PG
mov %rax,%cr0 # disable paging
mov %edx,%ebx # save EntryPoint to ebx, for rdmsr will overwrite edx
mov $0xc0000080,%ecx
rdmsr
and $0xfe,%ah # clear LME
wrmsr
mov %cr4,%rax
and $0xdf,%al # clear PAE
mov %rax,%cr4
push %rdi # push Context2
push %rsi # push Context1
callq *%rbx # transfer control to EntryPoint
jmp . # no one should get here
_mTransitionEnd :

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; DisablePaging64.Asm
;
; Abstract:
;
; AsmDisablePaging64 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; InternalX86DisablePaging64 (
; IN UINT16 Cs,
; IN UINT32 EntryPoint,
; IN UINT32 Context1, OPTIONAL
; IN UINT32 Context2, OPTIONAL
; IN UINT32 NewStack
; );
;------------------------------------------------------------------------------
InternalX86DisablePaging64 PROC
cli
lea rsi, @F ; rsi <- The start address of transition code
mov edi, [rsp + 28h] ; rdi <- New stack
lea rax, mTransitionEnd ; rax <- end of transition code
sub rax, rsi ; rax <- The size of transition piece code
add rax, 4 ; Round RAX up to the next 4 byte boundary
and al, 0fch
sub rdi, rax ; rdi <- Use stack to hold transition code
mov r10d, edi ; r10 <- The start address of transicition code below 4G
push rcx ; save rcx to stack
mov rcx, rax ; rcx <- The size of transition piece code
rep movsb ; copy transition code to top of new stack which must be below 4GB
pop rcx ; restore rcx
mov esi, r8d
mov edi, r9d
mov eax, r10d ; eax <- start of the transition code on the stack
sub eax, 4 ; eax <- One slot below transition code on the stack
push rcx ; push Cs to stack
push r10 ; push address of tansition code on stack
DB 48h ; prefix to composite "retq" with next "retf"
retf ; Use far return to load CS register from stack
; Start of transition code
@@:
mov esp, eax ; set up new stack
mov rax, cr0
btr eax, 31 ; Clear CR0.PG
mov cr0, rax ; disable paging and caches
mov ebx, edx ; save EntryPoint to rbx, for rdmsr will overwrite rdx
mov ecx, 0c0000080h
rdmsr
and ah, NOT 1 ; clear LME
wrmsr
mov rax, cr4
and al, NOT (1 SHL 5) ; clear PAE
mov cr4, rax
push rdi ; push Context2
push rsi ; push Context1
call rbx ; transfer control to EntryPoint
hlt ; no one should get here
InternalX86DisablePaging64 ENDP
mTransitionEnd LABEL BYTE
END

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#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# EnableCache.S
#
# Abstract:
#
# Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
# the NW bit of CR0 to 0
#
# Notes:
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# AsmEnableCache (
# VOID
# );
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmEnableCache)
ASM_PFX(AsmEnableCache):
wbinvd
movq %cr0, %rax
btrq $30, %rax
btrq $29, %rax
movq %rax, %cr0
ret

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; EnableCache.Asm
;
; Abstract:
;
; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
; the NW bit of CR0 to 0
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; AsmEnableCache (
; VOID
; );
;------------------------------------------------------------------------------
AsmEnableCache PROC
wbinvd
mov rax, cr0
btr rax, 29
btr rax, 30
mov cr0, rax
ret
AsmEnableCache ENDP
END

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#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# EnableDisableInterrupts.S
#
# Abstract:
#
# EnableDisableInterrupts function
#
# Notes:
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# EnableDisableInterrupts (
# VOID
# );
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(EnableDisableInterrupts)
ASM_PFX(EnableDisableInterrupts):
sti
cli
ret

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; EnableDisableInterrupts.Asm
;
; Abstract:
;
; EnableDisableInterrupts function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; EnableDisableInterrupts (
; VOID
; );
;------------------------------------------------------------------------------
EnableDisableInterrupts PROC
sti
cli
ret
EnableDisableInterrupts ENDP
END

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; EnableInterrupts.Asm
;
; Abstract:
;
; EnableInterrupts function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; EnableInterrupts (
; VOID
; );
;------------------------------------------------------------------------------
EnableInterrupts PROC
sti
ret
EnableInterrupts ENDP
END

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@ -0,0 +1,39 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; FlushCacheLine.Asm
;
; Abstract:
;
; AsmFlushCacheLine function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID *
; EFIAPI
; AsmFlushCacheLine (
; IN VOID *LinearAddress
; );
;------------------------------------------------------------------------------
AsmFlushCacheLine PROC
clflush [rcx]
mov rax, rcx
ret
AsmFlushCacheLine ENDP
END

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; FxRestore.Asm
;
; Abstract:
;
; AsmFxRestore function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; InternalX86FxRestore (
; IN CONST IA32_FX_BUFFER *Buffer
; );
;------------------------------------------------------------------------------
InternalX86FxRestore PROC
fxrstor [rcx]
ret
InternalX86FxRestore ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; FxSave.Asm
;
; Abstract:
;
; AsmFxSave function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; InternalX86FxSave (
; OUT IA32_FX_BUFFER *Buffer
; );
;------------------------------------------------------------------------------
InternalX86FxSave PROC
fxsave [rcx]
ret
InternalX86FxSave ENDP
END

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; Invd.Asm
;
; Abstract:
;
; AsmInvd function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; AsmInvd (
; VOID
; );
;------------------------------------------------------------------------------
AsmInvd PROC
invd
ret
AsmInvd ENDP
END

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#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# LongJump.S
#
# Abstract:
#
# Implementation of _LongJump() on x64.
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# InternalLongJump (
# IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer, // %rcx
# IN UINTN Value // %rdx
# );
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(EfiInternalLongJump)
ASM_PFX(EfiInternalLongJump):
mov (%rcx), %rbx
mov 0x8(%rcx), %rsp
mov 0x10(%rcx), %rbp
mov 0x18(%rcx), %rdi
mov 0x20(%rcx), %rsi
mov 0x28(%rcx), %r12
mov 0x30(%rcx), %r13
mov 0x38(%rcx), %r14
mov 0x40(%rcx), %r15
# load non-volatile fp registers
ldmxcsr 0x50(%rcx)
movdqu 0x58(%rcx), %xmm6
movdqu 0x68(%rcx), %xmm7
movdqu 0x78(%rcx), %xmm8
movdqu 0x88(%rcx), %xmm9
movdqu 0x98(%rcx), %xmm10
movdqu 0xA8(%rcx), %xmm11
movdqu 0xB8(%rcx), %xmm12
movdqu 0xC8(%rcx), %xmm13
movdqu 0xD8(%rcx), %xmm14
movdqu 0xE8(%rcx), %xmm15
mov %rdx, %rax # set return value
jmp *0x48(%rcx)
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# UnixInternalLongJump (
# IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer, // %rdi
# IN UINTN Value // %rsi
# );
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalLongJump)
ASM_PFX(InternalLongJump):
mov (%rdi), %rbx
mov 0x8(%rdi), %rsp
mov 0x10(%rdi), %rbp
mov 0x18(%rdi), %rdi
mov 0x20(%rdi), %rsi
mov 0x28(%rdi), %r12
mov 0x30(%rdi), %r13
mov 0x38(%rdi), %r14
mov 0x40(%rdi), %r15
# load non-volatile fp registers
ldmxcsr 0x50(%rdi)
movdqu 0x58(%rdi), %xmm6
movdqu 0x68(%rdi), %xmm7
movdqu 0x78(%rdi), %xmm8
movdqu 0x88(%rdi), %xmm9
movdqu 0x98(%rdi), %xmm10
movdqu 0xA8(%rdi), %xmm11
movdqu 0xB8(%rdi), %xmm12
movdqu 0xC8(%rdi), %xmm13
movdqu 0xD8(%rdi), %xmm14
movdqu 0xE8(%rdi), %xmm15
mov %rsi, %rax # set return value
jmp *0x48(%rdi)

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@ -0,0 +1,58 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; LongJump.Asm
;
; Abstract:
;
; Implementation of _LongJump() on x64.
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; InternalLongJump (
; IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
; IN UINTN Value
; );
;------------------------------------------------------------------------------
InternalLongJump PROC
mov rbx, [rcx]
mov rsp, [rcx + 8]
mov rbp, [rcx + 10h]
mov rdi, [rcx + 18h]
mov rsi, [rcx + 20h]
mov r12, [rcx + 28h]
mov r13, [rcx + 30h]
mov r14, [rcx + 38h]
mov r15, [rcx + 40h]
; load non-volatile fp registers
ldmxcsr [rcx + 50h]
movdqu xmm6, [rcx + 58h]
movdqu xmm7, [rcx + 68h]
movdqu xmm8, [rcx + 78h]
movdqu xmm9, [rcx + 88h]
movdqu xmm10, [rcx + 98h]
movdqu xmm11, [rcx + 0A8h]
movdqu xmm12, [rcx + 0B8h]
movdqu xmm13, [rcx + 0C8h]
movdqu xmm14, [rcx + 0D8h]
movdqu xmm15, [rcx + 0E8h]
mov rax, rdx ; set return value
jmp qword ptr [rcx + 48h]
InternalLongJump ENDP
END

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@ -0,0 +1,43 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; Monitor.Asm
;
; Abstract:
;
; AsmMonitor function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmMonitor (
; IN UINTN Eax,
; IN UINTN Ecx,
; IN UINTN Edx
; );
;------------------------------------------------------------------------------
AsmMonitor PROC
mov eax, ecx
mov ecx, edx
mov edx, r8d
DB 0fh, 1, 0c8h ; monitor
ret
AsmMonitor ENDP
END

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@ -0,0 +1,41 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; Mwait.Asm
;
; Abstract:
;
; AsmMwait function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmMwait (
; IN UINTN Eax,
; IN UINTN Ecx
; );
;------------------------------------------------------------------------------
AsmMwait PROC
mov eax, ecx
mov ecx, edx
DB 0fh, 1, 0c9h ; mwait
ret
AsmMwait ENDP
END

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/** @file
Non-existing BaseLib functions on x64
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
/**
Enables the 32-bit paging mode on the CPU.
Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
must be properly initialized prior to calling this service. This function
assumes the current execution mode is 32-bit protected mode. This function is
only available on IA-32. After the 32-bit paging mode is enabled, control is
transferred to the function specified by EntryPoint using the new stack
specified by NewStack and passing in the parameters specified by Context1 and
Context2. Context1 and Context2 are optional and may be NULL. The function
EntryPoint must never return.
There are a number of constraints that must be followed before calling this
function:
1) Interrupts must be disabled.
2) The caller must be in 32-bit protected mode with flat descriptors. This
means all descriptors must have a base of 0 and a limit of 4GB.
3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
descriptors.
4) CR3 must point to valid page tables that will be used once the transition
is complete, and those page tables must guarantee that the pages for this
function and the stack are identity mapped.
@param EntryPoint A pointer to function to call with the new stack after
paging is enabled.
@param Context1 A pointer to the context to pass into the EntryPoint
function as the first parameter after paging is enabled.
@param Context2 A pointer to the context to pass into the EntryPoint
function as the second parameter after paging is enabled.
@param NewStack A pointer to the new stack to use for the EntryPoint
function after paging is enabled.
**/
VOID
EFIAPI
InternalX86EnablePaging32 (
IN SWITCH_STACK_ENTRY_POINT EntryPoint,
IN VOID *Context1, OPTIONAL
IN VOID *Context2, OPTIONAL
IN VOID *NewStack
)
{
//
// This function cannot work on x64 platform
//
ASSERT (FALSE);
}
/**
Disables the 32-bit paging mode on the CPU.
Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
mode. This function assumes the current execution mode is 32-paged protected
mode. This function is only available on IA-32. After the 32-bit paging mode
is disabled, control is transferred to the function specified by EntryPoint
using the new stack specified by NewStack and passing in the parameters
specified by Context1 and Context2. Context1 and Context2 are optional and
may be NULL. The function EntryPoint must never return.
There are a number of constraints that must be followed before calling this
function:
1) Interrupts must be disabled.
2) The caller must be in 32-bit paged mode.
3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
4) CR3 must point to valid page tables that guarantee that the pages for
this function and the stack are identity mapped.
@param EntryPoint A pointer to function to call with the new stack after
paging is disabled.
@param Context1 A pointer to the context to pass into the EntryPoint
function as the first parameter after paging is disabled.
@param Context2 A pointer to the context to pass into the EntryPoint
function as the second parameter after paging is
disabled.
@param NewStack A pointer to the new stack to use for the EntryPoint
function after paging is disabled.
**/
VOID
EFIAPI
InternalX86DisablePaging32 (
IN SWITCH_STACK_ENTRY_POINT EntryPoint,
IN VOID *Context1, OPTIONAL
IN VOID *Context2, OPTIONAL
IN VOID *NewStack
)
{
//
// This function cannot work on x64 platform
//
ASSERT (FALSE);
}
/**
Enables the 64-bit paging mode on the CPU.
Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
must be properly initialized prior to calling this service. This function
assumes the current execution mode is 32-bit protected mode with flat
descriptors. This function is only available on IA-32. After the 64-bit
paging mode is enabled, control is transferred to the function specified by
EntryPoint using the new stack specified by NewStack and passing in the
parameters specified by Context1 and Context2. Context1 and Context2 are
optional and may be 0. The function EntryPoint must never return.
@param Cs The 16-bit selector to load in the CS before EntryPoint
is called. The descriptor in the GDT that this selector
references must be setup for long mode.
@param EntryPoint The 64-bit virtual address of the function to call with
the new stack after paging is enabled.
@param Context1 The 64-bit virtual address of the context to pass into
the EntryPoint function as the first parameter after
paging is enabled.
@param Context2 The 64-bit virtual address of the context to pass into
the EntryPoint function as the second parameter after
paging is enabled.
@param NewStack The 64-bit virtual address of the new stack to use for
the EntryPoint function after paging is enabled.
**/
VOID
EFIAPI
InternalX86EnablePaging64 (
IN UINT16 Cs,
IN UINT64 EntryPoint,
IN UINT64 Context1, OPTIONAL
IN UINT64 Context2, OPTIONAL
IN UINT64 NewStack
)
{
//
// This function cannot work on x64 platform.
//
ASSERT (FALSE);
}

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadCr0.Asm
;
; Abstract:
;
; AsmReadCr0 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadCr0 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadCr0 PROC
mov rax, cr0
ret
AsmReadCr0 ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadCr2.Asm
;
; Abstract:
;
; AsmReadCr2 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadCr2 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadCr2 PROC
mov rax, cr2
ret
AsmReadCr2 ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadCr3.Asm
;
; Abstract:
;
; AsmReadCr3 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadCr3 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadCr3 PROC
mov rax, cr3
ret
AsmReadCr3 ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadCr4.Asm
;
; Abstract:
;
; AsmReadCr4 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadCr4 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadCr4 PROC
mov rax, cr4
ret
AsmReadCr4 ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadCs.Asm
;
; Abstract:
;
; AsmReadCs function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT16
; EFIAPI
; AsmReadCs (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadCs PROC
mov eax, cs
ret
AsmReadCs ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadDr0.Asm
;
; Abstract:
;
; AsmReadDr0 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadDr0 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadDr0 PROC
mov rax, dr0
ret
AsmReadDr0 ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadDr1.Asm
;
; Abstract:
;
; AsmReadDr1 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadDr1 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadDr1 PROC
mov rax, dr1
ret
AsmReadDr1 ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadDr2.Asm
;
; Abstract:
;
; AsmReadDr2 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadDr2 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadDr2 PROC
mov rax, dr2
ret
AsmReadDr2 ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadDr3.Asm
;
; Abstract:
;
; AsmReadDr3 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadDr3 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadDr3 PROC
mov rax, dr3
ret
AsmReadDr3 ENDP
END

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@ -0,0 +1,42 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadDr4.Asm
;
; Abstract:
;
; AsmReadDr4 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadDr4 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadDr4 PROC
;
; There's no obvious reason to access this register, since it's aliased to
; DR7 when DE=0 or an exception generated when DE=1
;
DB 0fh, 21h, 0e0h
ret
AsmReadDr4 ENDP
END

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@ -0,0 +1,42 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadDr5.Asm
;
; Abstract:
;
; AsmReadDr5 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadDr5 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadDr5 PROC
;
; There's no obvious reason to access this register, since it's aliased to
; DR7 when DE=0 or an exception generated when DE=1
;
DB 0fh, 21h, 0e8h
ret
AsmReadDr5 ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadDr6.Asm
;
; Abstract:
;
; AsmReadDr6 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadDr6 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadDr6 PROC
mov rax, dr6
ret
AsmReadDr6 ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadDr7.Asm
;
; Abstract:
;
; AsmReadDr7 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadDr7 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadDr7 PROC
mov rax, dr7
ret
AsmReadDr7 ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadDs.Asm
;
; Abstract:
;
; AsmReadDs function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT16
; EFIAPI
; AsmReadDs (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadDs PROC
mov eax, ds
ret
AsmReadDs ENDP
END

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@ -0,0 +1,39 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadEflags.Asm
;
; Abstract:
;
; AsmReadEflags function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmReadEflags (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadEflags PROC
pushfq
pop rax
ret
AsmReadEflags ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadEs.Asm
;
; Abstract:
;
; AsmReadEs function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT16
; EFIAPI
; AsmReadEs (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadEs PROC
mov eax, es
ret
AsmReadEs ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadFs.Asm
;
; Abstract:
;
; AsmReadFs function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT16
; EFIAPI
; AsmReadFs (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadFs PROC
mov eax, fs
ret
AsmReadFs ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadGdtr.Asm
;
; Abstract:
;
; AsmReadGdtr function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; InternalX86ReadGdtr (
; OUT IA32_DESCRIPTOR *Gdtr
; );
;------------------------------------------------------------------------------
InternalX86ReadGdtr PROC
sgdt fword ptr [rcx]
ret
InternalX86ReadGdtr ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadGs.Asm
;
; Abstract:
;
; AsmReadGs function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT16
; EFIAPI
; AsmReadGs (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadGs PROC
mov eax, gs
ret
AsmReadGs ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadIdtr.Asm
;
; Abstract:
;
; AsmReadIdtr function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; InternalX86ReadIdtr (
; OUT IA32_DESCRIPTOR *Idtr
; );
;------------------------------------------------------------------------------
InternalX86ReadIdtr PROC
sidt fword ptr [rcx]
ret
InternalX86ReadIdtr ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadLdtr.Asm
;
; Abstract:
;
; AsmReadLdtr function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT16
; EFIAPI
; AsmReadLdtr (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadLdtr PROC
sldt eax
ret
AsmReadLdtr ENDP
END

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@ -0,0 +1,41 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadMm0.Asm
;
; Abstract:
;
; AsmReadMm0 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadMm0 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadMm0 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0c0h
ret
AsmReadMm0 ENDP
END

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@ -0,0 +1,41 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadMm1.Asm
;
; Abstract:
;
; AsmReadMm1 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadMm1 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadMm1 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0c8h
ret
AsmReadMm1 ENDP
END

View File

@ -0,0 +1,41 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadMm2.Asm
;
; Abstract:
;
; AsmReadMm2 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadMm2 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadMm2 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0d0h
ret
AsmReadMm2 ENDP
END

View File

@ -0,0 +1,41 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadMm3.Asm
;
; Abstract:
;
; AsmReadMm3 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadMm3 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadMm3 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0d8h
ret
AsmReadMm3 ENDP
END

View File

@ -0,0 +1,41 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadMm4.Asm
;
; Abstract:
;
; AsmReadMm4 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadMm4 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadMm4 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0e0h
ret
AsmReadMm4 ENDP
END

View File

@ -0,0 +1,41 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadMm5.Asm
;
; Abstract:
;
; AsmReadMm5 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadMm5 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadMm5 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0e8h
ret
AsmReadMm5 ENDP
END

View File

@ -0,0 +1,41 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadMm6.Asm
;
; Abstract:
;
; AsmReadMm6 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadMm6 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadMm6 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0f0h
ret
AsmReadMm6 ENDP
END

View File

@ -0,0 +1,41 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadMm7.Asm
;
; Abstract:
;
; AsmReadMm7 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadMm7 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadMm7 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0f8h
ret
AsmReadMm7 ENDP
END

View File

@ -0,0 +1,40 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadMsr64.Asm
;
; Abstract:
;
; AsmReadMsr64 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadMsr64 (
; IN UINT32 Index
; );
;------------------------------------------------------------------------------
AsmReadMsr64 PROC
rdmsr ; edx & eax are zero extended
shl rdx, 20h
or rax, rdx
ret
AsmReadMsr64 ENDP
END

View File

@ -0,0 +1,39 @@
/** @file
CpuBreakpoint function.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
/**
Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.
**/
unsigned __int64 __readmsr (int register);
#pragma intrinsic(__readmsr)
/**
Read data to MSR.
@param Index Register index of MSR.
@return Value read from MSR.
**/
UINT64
EFIAPI
AsmReadMsr64 (
IN UINT32 Index
)
{
return __readmsr (Index);
}

View File

@ -0,0 +1,40 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadPmc.Asm
;
; Abstract:
;
; AsmReadPmc function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadPmc (
; IN UINT32 PmcIndex
; );
;------------------------------------------------------------------------------
AsmReadPmc PROC
rdpmc
shl rdx, 20h
or rax, rdx
ret
AsmReadPmc ENDP
END

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadSs.Asm
;
; Abstract:
;
; AsmReadSs function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT16
; EFIAPI
; AsmReadSs (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadSs PROC
mov eax, ss
ret
AsmReadSs ENDP
END

View File

@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadTr.Asm
;
; Abstract:
;
; AsmReadTr function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT16
; EFIAPI
; AsmReadTr (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadTr PROC
str eax
ret
AsmReadTr ENDP
END

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