UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473

X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entries. using the 1-GByte Page table user can use more than
4G Memory by reducing the page table entries using 1-GByte Page,
this patch attached can access memory range till 512GByte via Linear-
Address Translation to a 1-GByte Page.

Build Tool: if the nasm is not found it will throw Build errors like
FileNotFoundError: [WinError 2]The system cannot find the file specified
run the command wil try except block to get meaningful error message

Test Result: Tested in both Simulation environment and Hardware
both works fine without any issues.

Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Harry Han <harry.han@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Cc: Sangeetha V <sangeetha.v@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Sahil Dureja <sahil.dureja@intel.com>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@intel.com>
This commit is contained in:
Ashraf Ali S
2021-09-11 16:55:51 +05:30
committed by mergify[bot]
parent 89f7ed8b29
commit 60d8bb9f28
21 changed files with 186 additions and 48 deletions

View File

@@ -35,8 +35,14 @@
%include "PostCodes.inc"
%include "PageTables.inc"
%ifdef ARCH_X64
%include "X64/PageTables.asm"
%ifdef PAGE_TABLE_1G
%include "X64/PageTables1G.asm"
%else
%include "X64/PageTables2M.asm"
%endif
%endif
%ifdef DEBUG_PORT80