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1) Changed the file including as '#include "Ipf\IpfCpuCore.i"' for Intel compiler supporting

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2) Added the Intel IPF Compiler setting in the tools_def.template

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2195 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
zliu3
2007-01-08 14:13:56 +00:00
parent 2384947051
commit 66d8c20686
2 changed files with 127 additions and 41 deletions
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82
EdkModulePkg/Core/Pei/Ipf/IpfCpuCore.s
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@@ -1,13 +1,13 @@
//++
// Copyright (c) 2006, Intel Corporation
// All rights reserved. This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
// Copyright (c) 2006, Intel Corporation
// All rights reserved. This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Module Name:
//
// IpfCpuCore.s
@@ -15,12 +15,12 @@
// Abstract:
// IPF Specific assembly routines
//
//--
//--
.file "IpfCpuCore.s"
#include "IpfMacro.i"
#include "IpfCpuCore.i"
#include "Ipf\IpfCpuCore.i"
//----------------------------------------------------------------------------------
// This module supports terminating CAR (Cache As RAM) stage. It copies all the
@@ -48,7 +48,7 @@ PROCEDURE_ENTRY (SwitchCoreStacks)
NESTED_SETUP (4,2,0,0)
// first save all stack registers in GPRs.
mov r13 = in0;; // this is a pointer to the PLABEL of the continuation function.
mov r13 = in0;; // this is a pointer to the PLABEL of the continuation function.
ld8 r16 = [r13],8;; // r16 = address of continuation function from the PLABEL
ld8 gp = [r13];; // gp = gp of continuation function from the PLABEL
mov b1 = r16;;
@@ -60,7 +60,7 @@ PROCEDURE_ENTRY (SwitchCoreStacks)
mov r8 = in3;; // new stack pointer.
// r8 has the sp, this is 128K stack size, from this we will reserve 16K for the bspstore
// r8 has the sp, this is 128K stack size, from this we will reserve 16K for the bspstore
movl r15 = PEI_BSP_STORE_SIZE;;
sub r8 = r8, r15;;
add r15 = (GuardBand),r8;; // some little buffer, now r15 will be our bspstore
@@ -69,21 +69,21 @@ PROCEDURE_ENTRY (SwitchCoreStacks)
mov r4 = r15
mov r7 = r8
mov r16 = r8;; // will be the new sp in uncache mode
alloc r11=0,0,0,0;; // Set 0-size frame
flushrs;;
mov r21 = RSC_KERNEL_DISABLED;; // for rse disable
mov ar.rsc = r21;; // turn off RSE
mov r21 = RSC_KERNEL_DISABLED;; // for rse disable
mov ar.rsc = r21;; // turn off RSE
add sp = r0, r16 // transfer to the EFI stack
mov ar.bspstore = r15 // switch to EFI BSP
invala // change of ar.bspstore needs invala.
mov ar.bspstore = r15 // switch to EFI BSP
invala // change of ar.bspstore needs invala.
mov r19 = RSC_KERNEL_LAZ;; // RSC enabled, Lazy mode
mov ar.rsc = r19;; // turn rse on, in kernel mode
mov ar.rsc = r19;; // turn rse on, in kernel mode
//-----------------------------------------------------------------------------------
// Save here the meaningful stuff for next few lines and then make the PAL call.
// Make PAL call to terminate the CAR status.
@@ -91,7 +91,7 @@ PROCEDURE_ENTRY (SwitchCoreStacks)
mov r28=ar.k3;;
dep r2 = r28,r0,0,8;; // Extract Function bits from GR20.
cmp.eq p6,p7 = RecoveryFn,r2;; // Is it Recovery check
cmp.eq p6,p7 = RecoveryFn,r2;; // Is it Recovery check
(p7) br.sptk.few DoneCARTermination; // if not, don't terminate car..
TerminateCAR::
@@ -120,37 +120,37 @@ ReturnToPEIMain::
//
// dead loop if the PAL call failed, we have the CAR on but the stack is now pointing to memory
//
(p7) br.sptk.few ReturnToPEIMain;;
(p7) br.sptk.few ReturnToPEIMain;;
//
// PAL call successed,now the stack are in memory so come into cache mode
// PAL call successed,now the stack are in memory so come into cache mode
// instead of uncache mode
//
alloc r11=0,0,0,0;; // Set 0-size frame
flushrs;;
mov r21 = RSC_KERNEL_DISABLED;; // for rse disable
mov ar.rsc = r21;; // turn off RSE
dep r6 = 0,r6,63,1 // zero the bit 63
dep r7 = 0,r7,63,1 // zero the bit 63
dep r4 = 0,r4,63,1;; // zero the bit 63
add sp = r0, r7 // transfer to the EFI stack in cache mode
mov ar.bspstore = r4 // switch to EFI BSP
invala // change of ar.bspstore needs invala.
mov r21 = RSC_KERNEL_DISABLED;; // for rse disable
mov ar.rsc = r21;; // turn off RSE
dep r6 = 0,r6,63,1 // zero the bit 63
dep r7 = 0,r7,63,1 // zero the bit 63
dep r4 = 0,r4,63,1;; // zero the bit 63
add sp = r0, r7 // transfer to the EFI stack in cache mode
mov ar.bspstore = r4 // switch to EFI BSP
invala // change of ar.bspstore needs invala.
mov r19 = RSC_KERNEL_LAZ;; // RSC enabled, Lazy mode
mov ar.rsc = r19;; // turn rse on, in kernel mode
#endif
DoneCARTermination::
DoneCARTermination::
// allocate a stack frame:
// allocate a stack frame:
alloc r11=0,2,2,0 ;; // alloc outs going to ensuing DXE IPL service
// on the new stack
mov out0 = r5;;
mov out1 = r6;;
mov out1 = r6;;
mov r16 = b1;;
mov b6 = r16;;
@@ -168,23 +168,23 @@ PROCEDURE_EXIT(SwitchCoreStacks)
// This routine is called by all processors simultaneously, to get some hand-off
// status that has been captured by IPF dispatcher and recorded in kernel registers.
//
// Arguments :
// Arguments :
//
// On Entry : None.
//
// Return Value: Lid, R20Status.
//
//
//--
//----------------------------------------------------------------------------------
PROCEDURE_ENTRY (GetHandOffStatus)
NESTED_SETUP (0,2+0,0,0)
mov r8 = ar.k6 // Health Status (Self test params)
mov r9 = ar.k4 // LID bits
mov r10 = ar.k3;; // SAL_E entry state
mov r11 = ar.k7 // Return address to PAL
NESTED_RETURN
PROCEDURE_EXIT (GetHandOffStatus)
//----------------------------------------------------------------------------------