Save original PCI attributes in start() function and restore it in Stop() for those PCI device drivers.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@4212 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -1,13 +1,13 @@
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/*++
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Copyright (c) 2006, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Copyright (c) 2006, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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@@ -113,15 +113,15 @@ typedef struct CONFIG_HEADER {
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//-------------------------------------------------------------------------
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// Offsets to the various registers.
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// All accesses need not be longword aligned.
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// All accesses need not be longword aligned.
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//-------------------------------------------------------------------------
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enum speedo_offsets {
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SCBStatus = 0, SCBCmd = 2, // Rx/Command Unit command and status.
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SCBPointer = 4, // General purpose pointer.
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SCBPort = 8, // Misc. commands and operands.
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SCBflash = 12, SCBeeprom = 14, // EEPROM and flash memory control.
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SCBCtrlMDI = 16, // MDI interface control.
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SCBEarlyRx = 20, // Early receive byte count.
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SCBStatus = 0, SCBCmd = 2, // Rx/Command Unit command and status.
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SCBPointer = 4, // General purpose pointer.
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SCBPort = 8, // Misc. commands and operands.
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SCBflash = 12, SCBeeprom = 14, // EEPROM and flash memory control.
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SCBCtrlMDI = 16, // MDI interface control.
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SCBEarlyRx = 20, // Early receive byte count.
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SCBEarlyRxInt = 24, SCBFlowCtrlReg = 25, SCBPmdr = 27,
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// offsets for general control registers (GCRs)
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SCBGenCtrl = 28, SCBGenStatus = 29, SCBGenCtrl2 = 30, SCBRsvd = 31
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@@ -130,7 +130,7 @@ enum speedo_offsets {
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#define GCR2_EEPROM_ACCESS_SEMAPHORE 0x80 // bit offset into the gcr2
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//-------------------------------------------------------------------------
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// Action commands - Commands that can be put in a command list entry.
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// Action commands - Commands that can be put in a command list entry.
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//-------------------------------------------------------------------------
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enum commands {
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CmdNOp = 0, CmdIASetup = 1, CmdConfigure = 2, CmdMulticastList = 3,
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@@ -249,7 +249,7 @@ enum commands {
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#define BIT_4_6 0x0070
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#define BIT_4_7 0x00F0
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#define BIT_5_7 0x00E0
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#define BIT_5_9 0x03E0
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#define BIT_5_9 0x03E0
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#define BIT_5_12 0x1FE0
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#define BIT_5_15 0xFFE0
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#define BIT_6_7 0x00c0
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@@ -640,6 +640,10 @@ typedef struct s_data_instance {
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UINT64 Unique_ID;
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EFI_PCI_IO_PROTOCOL *Io_Function;
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//
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// Original PCI attributes
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//
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UINT64 OriginalPciAttributes;
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VOID (*Delay_30)(UINTN); // call back routine
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VOID (*Virt2Phys_30)(UINT64 virtual_addr, UINT64 physical_ptr); // call back routine
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