IntelSiliconPkg/IntelVTdPmrPei: Parse RMRR table.
In order to support PEI graphic, we let VTdPmrPei driver
parse DMAR table RMRR entry and allow the UMA access.
If a system has no PEI IGD, no RMRR is needed. The behavior
is unchanged.
If a system has PEI IGD, it must report RMRR in PEI phase.
The PeiVTdPrm will program the IGD VTd engine to skip the
RMRR region, and program the rest PCI VTd engine to skip
the another DMA buffer allocated in PEI phase for other
device driver.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 8e9da4ba3c
)
This commit is contained in:
@@ -15,9 +15,16 @@
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#ifndef __DMA_ACCESS_LIB_H__
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#define __DMA_ACCESS_LIB_H__
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typedef struct {
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UINT8 HostAddressWidth;
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UINTN VTdEngineCount;
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UINT64 VTdEngineAddress[1];
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} VTD_INFO;
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/**
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Set DMA protected region.
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@param EngineMask The mask of the VTd engine to be accessed.
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@param LowMemoryBase The protected low memory region base.
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@param LowMemoryLength The protected low memory region length.
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@param HighMemoryBase The protected high memory region base.
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@@ -28,6 +35,7 @@
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**/
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EFI_STATUS
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SetDmaProtectedRange (
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IN UINT64 EngineMask,
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IN UINT32 LowMemoryBase,
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IN UINT32 LowMemoryLength,
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IN UINT64 HighMemoryBase,
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@@ -37,31 +45,37 @@ SetDmaProtectedRange (
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/**
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Diable DMA protection.
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@param EngineMask The mask of the VTd engine to be accessed.
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@retval DMA protection is disabled.
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**/
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EFI_STATUS
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DisableDmaProtection (
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VOID
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IN UINT64 EngineMask
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);
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/**
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Get protected low memory alignment.
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@param EngineMask The mask of the VTd engine to be accessed.
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@return protected low memory alignment.
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**/
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UINT32
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GetLowMemoryAlignment (
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VOID
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IN UINT64 EngineMask
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);
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/**
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Get protected high memory alignment.
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@param EngineMask The mask of the VTd engine to be accessed.
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@return protected high memory alignment.
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**/
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UINT64
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GetHighMemoryAlignment (
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VOID
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IN UINT64 EngineMask
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);
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#endif
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