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MdeModulePkg: The patch eliminates two assumptions

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1) XHCI host controller hw always provides more than 5 interrupters.
Now using interrupter 0 to accommodate all received events.
2) XHCI host controller hw always provides 32bytes context size.
Now it dynamically detect context size and construct it.

also solved several issues:
1) Divides 64byte width register access to two 32bit registers access because some XHCI chipsets cannot support a single 64bit access.
2) Remove halt host controller statement in UsbBusDriverBindingStop(). It has been done by host controller’s DriverBindingStop(). And XhciDriverBindingStop() need XHCI host controller is in running state because it need execute DISABLE_SLOT cmd to release h/w resource.

signed-off-by: erictian
Reviewed-by: li-elvin

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12785 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
erictian
2011-11-25 08:08:54 +00:00
parent 4d6afad3b9
commit 6b4483cdbd
7 changed files with 1051 additions and 404 deletions
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93
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
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@@ -721,7 +721,6 @@ XhcControlTransfer (
URB *Urb;
UINT8 Endpoint;
UINT8 Index;
UINT8 XhciDevAddr;
UINT8 DescriptorType;
UINT8 SlotId;
UINT8 TTT;
@@ -793,11 +792,6 @@ XhcControlTransfer (
goto ON_EXIT;
}
//
// Acquire the actual device address assigned by XHCI's Address_Device cmd.
//
XhciDevAddr = Xhc->UsbDevContext[SlotId].XhciDevAddr;
//
// Hook the Set_Address request from UsbBus.
// According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
@@ -810,7 +804,7 @@ XhcControlTransfer (
//
for (Index = 0; Index < 255; Index++) {
if (!Xhc->UsbDevContext[Index + 1].Enabled &&
(Xhc->UsbDevContext[Index + 1].SlotId != 0) &&
(Xhc->UsbDevContext[Index + 1].SlotId == 0) &&
(Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value)) {
Xhc->UsbDevContext[Index + 1].BusDevAddr = 0;
}
@@ -850,7 +844,7 @@ XhcControlTransfer (
Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
Urb = XhcCreateUrb (
Xhc,
XhciDevAddr,
DeviceAddress,
Endpoint,
DeviceSpeed,
MaximumPacketLength,
@@ -867,7 +861,7 @@ XhcControlTransfer (
Status = EFI_OUT_OF_RESOURCES;
goto ON_EXIT;
}
ASSERT (Urb->EvtRing == &Xhc->CtrlTrEventRing);
ASSERT (Urb->EvtRing == &Xhc->EventRing);
Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
//
@@ -909,7 +903,11 @@ XhcControlTransfer (
MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
}
Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
if (Xhc->HcCParams.Data.Csz == 0) {
Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
} else {
Status = XhcEvaluateContext64 (Xhc, SlotId, MaxPacket0);
}
ASSERT_EFI_ERROR (Status);
@@ -940,13 +938,12 @@ XhcControlTransfer (
ASSERT (FALSE);
} else {
MTT = 0;
Status = XhcConfigHubContext (
Xhc,
SlotId,
HubDesc->NumPorts,
TTT,
MTT
);
}
if (Xhc->HcCParams.Data.Csz == 0) {
Status = XhcConfigHubContext (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
} else {
Status = XhcConfigHubContext64 (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
}
ASSERT_EFI_ERROR (Status);
}
@@ -955,7 +952,12 @@ XhcControlTransfer (
//
// Hook Set_Config request from UsbBus as we need configure device endpoint.
//
XhcSetConfigCmd (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
for (Index = 0; Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations; Index++) {
if (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->ConfigurationValue == (UINT8)Request->Value) {
if (Xhc->HcCParams.Data.Csz == 0) {
Status = XhcSetConfigCmd (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
} else {
Status = XhcSetConfigCmd64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
}
ASSERT_EFI_ERROR (Status);
break;
@@ -1073,7 +1075,6 @@ XhcBulkTransfer (
OUT UINT32 *TransferResult
)
{
UINT8 XhciDevAddr;
USB_XHCI_INSTANCE *Xhc;
URB *Urb;
UINT8 SlotId;
@@ -1118,18 +1119,13 @@ XhcBulkTransfer (
SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
if (SlotId == 0) {
goto ON_EXIT;
//
// Acquire the actual device address assigned by XHCI's Address_Device cmd.
//
XhciDevAddr = Xhc->UsbDevContext[SlotId].XhciDevAddr;
}
//
// Create a new URB, insert it into the asynchronous
// schedule list, then poll the execution status.
//
XhciDevAddr,
Urb = XhcCreateUrb (
Xhc,
DeviceAddress,
EndPointAddress,
@@ -1147,7 +1143,7 @@ XhcBulkTransfer (
DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: failed to create URB\n"));
Status = EFI_OUT_OF_RESOURCES;
goto ON_EXIT;
ASSERT (Urb->EvtRing == &Xhc->BulkTrEventRing);
}
ASSERT (Urb->EvtRing == &Xhc->EventRing);
@@ -1223,7 +1219,6 @@ XhcAsyncInterruptTransfer (
)
{
USB_XHCI_INSTANCE *Xhc;
UINT8 XhciDevAddr;
URB *Urb;
EFI_STATUS Status;
UINT8 SlotId;
@@ -1262,8 +1257,7 @@ XhcAsyncInterruptTransfer (
if (!IsNewTransfer) {
//
// The delete request may happen after device is detached.
if ((Xhc->UsbDevContext[Index + 1].SlotId != 0) &&
(Xhc->UsbDevContext[Index + 1].BusDevAddr == DeviceAddress)) {
//
for (Index = 0; Index < 255; Index++) {
if (Xhc->UsbDevContext[Index + 1].BusDevAddr == DeviceAddress) {
break;
@@ -1273,12 +1267,7 @@ XhcAsyncInterruptTransfer (
if (Index == 255) {
Status = EFI_INVALID_PARAMETER;
goto ON_EXIT;
//
// Acquire the actual device address assigned by XHCI's Address_Device cmd.
//
XhciDevAddr = Xhc->UsbDevContext[Index + 1].XhciDevAddr;
Status = XhciDelAsyncIntTransfer (Xhc, XhciDevAddr, EndPointAddress);
}
Status = XhciDelAsyncIntTransfer (Xhc, DeviceAddress, EndPointAddress);
DEBUG ((EFI_D_INFO, "XhcAsyncInterruptTransfer: remove old transfer, Status = %r\n", Status));
@@ -1299,11 +1288,6 @@ XhcAsyncInterruptTransfer (
SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
if (SlotId == 0) {
goto ON_EXIT;
//
// Acquire the actual device address assigned by XHCI's Address_Device cmd.
//
XhciDevAddr = Xhc->UsbDevContext[SlotId].XhciDevAddr;
}
Data = AllocateZeroPool (DataLength);
@@ -1314,7 +1298,7 @@ XhcAsyncInterruptTransfer (
goto ON_EXIT;
}
XhciDevAddr,
Urb = XhcCreateUrb (
Xhc,
DeviceAddress,
EndPointAddress,
@@ -1333,7 +1317,7 @@ XhcAsyncInterruptTransfer (
FreePool (Data);
Status = EFI_OUT_OF_RESOURCES;
goto ON_EXIT;
ASSERT (Urb->EvtRing == &Xhc->AsynIntTrEventRing);
}
ASSERT (Urb->EvtRing == &Xhc->EventRing);
@@ -1393,7 +1377,6 @@ XhcSyncInterruptTransfer (
OUT UINT32 *TransferResult
)
{
UINT8 XhciDevAddr;
USB_XHCI_INSTANCE *Xhc;
URB *Urb;
UINT8 SlotId;
@@ -1441,14 +1424,9 @@ XhcSyncInterruptTransfer (
SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
if (SlotId == 0) {
goto ON_EXIT;
//
// Acquire the actual device address assigned by XHCI's Address_Device cmd.
//
XhciDevAddr = Xhc->UsbDevContext[SlotId].XhciDevAddr;
}
XhciDevAddr,
Urb = XhcCreateUrb (
Xhc,
DeviceAddress,
EndPointAddress,
@@ -2072,8 +2050,11 @@ XhcDriverBindingStop (
for (Index = 0; Index < 255; Index++) {
if (!Xhc->UsbDevContext[Index + 1].Enabled ||
(Xhc->UsbDevContext[Index + 1].SlotId == 0)) {
XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
continue;
}
if (Xhc->HcCParams.Data.Csz == 0) {
XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
} else {
XhcDisableSlotCmd64 (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
}
}
@@ -2108,11 +2089,11 @@ XhcDriverBindingStop (
//
// Restore original PCI attributes
PciIo,
EfiPciIoAttributeOperationSet,
Xhc->OriginalPciAttributes,
NULL
);
//
PciIo->Attributes (
PciIo,
EfiPciIoAttributeOperationSet,
Xhc->OriginalPciAttributes,
NULL
);