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MdeModulePkg: The patch eliminates two assumptions

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1) XHCI host controller hw always provides more than 5 interrupters.
Now using interrupter 0 to accommodate all received events.
2) XHCI host controller hw always provides 32bytes context size.
Now it dynamically detect context size and construct it.

also solved several issues:
1) Divides 64byte width register access to two 32bit registers access because some XHCI chipsets cannot support a single 64bit access.
2) Remove halt host controller statement in UsbBusDriverBindingStop(). It has been done by host controller’s DriverBindingStop(). And XhciDriverBindingStop() need XHCI host controller is in running state because it need execute DISABLE_SLOT cmd to release h/w resource.

signed-off-by: erictian
Reviewed-by: li-elvin

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12785 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
erictian
2011-11-25 08:08:54 +00:00
parent 4d6afad3b9
commit 6b4483cdbd
7 changed files with 1051 additions and 404 deletions
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22
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
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@@ -93,7 +93,7 @@ typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0xFFFFFFFF))
#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0xFFFFFFFF))
#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINT64)(UINTN)(Addr64), 32) & 0xFFFFFFFF))
#define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
#define XHC_REG_BIT_IS_SET(Xhc, Offset, Bit) \
@@ -228,25 +228,9 @@ struct _USB_XHCI_INSTANCE {
//
TRANSFER_RING CmdRing;
//
// CmdEventRing
// EventRing
//
EVENT_RING CmdEventRing;
//
// ControlTREventRing
//
EVENT_RING CtrlTrEventRing;
//
// BulkTREventRing
//
EVENT_RING BulkTrEventRing;
//
// IntTREventRing
//
EVENT_RING IntTrEventRing;
//
// AsyncIntTREventRing
//
EVENT_RING AsynIntTrEventRing;
EVENT_RING EventRing;
//
// Misc
//