MdeModulePkg: Remove X86 ASM and S files

NASM has replaced ASM and S files.
1. Remove ASM from all modules.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
This commit is contained in:
Liming Gao
2018-06-04 13:35:58 +08:00
parent 13688930ae
commit 6d614649ab
22 changed files with 6 additions and 3510 deletions

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@@ -4,7 +4,7 @@
# This is a standalone Boot Script Executor. Standalone means it does not
# depends on any PEI or DXE service.
#
# Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# This program and the accompanying materials are
@@ -40,14 +40,10 @@
[Sources.X64]
X64/SetIdtEntry.c
X64/S3Asm.nasm
X64/S3Asm.asm
X64/S3Asm.S
[Sources.Ia32]
IA32/SetIdtEntry.c
IA32/S3Asm.nasm
IA32/S3Asm.asm
IA32/S3Asm.S
[Packages]
MdePkg/MdePkg.dec

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@@ -1,66 +0,0 @@
## @file
#
# Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are
# licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
#-----------------------------------------
#VOID
#AsmTransferControl (
# IN UINT32 S3WakingVector,
# IN UINT32 AcpiLowMemoryBase
# );
#-----------------------------------------
ASM_GLOBAL ASM_PFX(AsmTransferControl)
ASM_PFX(AsmTransferControl):
# S3WakingVector :DWORD
# AcpiLowMemoryBase :DWORD
pushl %ebp
movl %esp,%ebp
leal LABLE, %eax
pushl $0x28 # CS
pushl %eax
movl 8(%ebp),%ecx
shrdl $20,%ecx,%ebx
andl $0xf,%ecx
movw %cx,%bx
movl %ebx, jmp_addr
lret
LABLE:
.byte 0xb8,0x30,0 # mov ax, 30h as selector
movw %ax,%ds
movw %ax,%es
movw %ax,%fs
movw %ax,%gs
movw %ax,%ss
movl %cr0, %eax # Get control register 0
.byte 0x66
.byte 0x83,0xe0,0xfe # and eax, 0fffffffeh ; Clear PE bit (bit #0)
.byte 0xf,0x22,0xc0 # mov cr0, eax ; Activate real mode
.byte 0xea # jmp far @jmp_addr
jmp_addr:
.long 0
ASM_GLOBAL ASM_PFX(AsmTransferControl32)
ASM_PFX(AsmTransferControl32):
jmp ASM_PFX(AsmTransferControl)
# dummy
ASM_GLOBAL ASM_PFX(AsmTransferControl16)
ASM_PFX(AsmTransferControl16):
ASM_GLOBAL ASM_PFX(AsmFixAddress16)
ASM_PFX(AsmFixAddress16):
.long 0
ASM_GLOBAL ASM_PFX(AsmJmpAddr32)
ASM_PFX(AsmJmpAddr32):
.long 0

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@@ -1,71 +0,0 @@
;; @file
; This is the assembly code for transferring to control to OS S3 waking vector
; for IA32 platform
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;;
.586P
.model flat,C
.code
PUBLIC AsmFixAddress16
PUBLIC AsmJmpAddr32
;-----------------------------------------
;VOID
;AsmTransferControl (
; IN UINT32 S3WakingVector,
; IN UINT32 AcpiLowMemoryBase
; );
;-----------------------------------------
AsmTransferControl PROC
; S3WakingVector :DWORD
; AcpiLowMemoryBase :DWORD
push ebp
mov ebp, esp
lea eax, @F
push 28h ; CS
push eax
mov ecx, [ebp + 8]
shrd ebx, ecx, 20
and ecx, 0fh
mov bx, cx
mov [@jmp_addr], ebx
retf
@@:
DB 0b8h, 30h, 0 ; mov ax, 30h as selector
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
mov eax, cr0 ; Get control register 0
DB 66h
DB 83h, 0e0h, 0feh ; and eax, 0fffffffeh ; Clear PE bit (bit #0)
DB 0fh, 22h, 0c0h ; mov cr0, eax ; Activate real mode
DB 0eah ; jmp far @jmp_addr
@jmp_addr DD ?
AsmTransferControl ENDP
AsmTransferControl32 PROC
jmp AsmTransferControl
AsmTransferControl32 ENDP
; dummy
AsmTransferControl16 PROC
AsmFixAddress16 DD ?
AsmJmpAddr32 DD ?
AsmTransferControl16 ENDP
END

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@@ -1,130 +0,0 @@
## @file
# This is the assembly code for transferring to control to OS S3 waking vector
# for X64 platform
#
# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are
# licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
ASM_GLOBAL ASM_PFX(AsmTransferControl)
ASM_PFX(AsmTransferControl):
# rcx S3WakingVector :DWORD
# rdx AcpiLowMemoryBase :DWORD
lea _AsmTransferControl_al_0000(%rip), %eax
movq $0x2800000000, %r8
orq %r8, %rax
pushq %rax
shrd $20, %ecx, %ebx
andl $0x0f, %ecx
movw %cx, %bx
movl %ebx, jmp_addr(%rip)
lret
_AsmTransferControl_al_0000:
.byte 0x0b8, 0x30, 0 # mov ax, 30h as selector
movl %eax, %ds
movl %eax, %es
movl %eax, %fs
movl %eax, %gs
movl %eax, %ss
movq %cr0, %rax
movq %cr4, %rbx
.byte 0x66
andl $0x7ffffffe, %eax
andb $0xdf, %bl
movq %rax, %cr0
.byte 0x66
movl $0x0c0000080, %ecx
rdmsr
andb $0xfe, %ah
wrmsr
movq %rbx, %cr4
.byte 0x0ea # jmp far jmp_addr
jmp_addr:
.long 0
ASM_GLOBAL ASM_PFX(AsmTransferControl32)
ASM_PFX(AsmTransferControl32):
# S3WakingVector :DWORD
# AcpiLowMemoryBase :DWORD
pushq %rbp
movl %esp,%ebp
.byte 0x8d, 0x05 # lea eax, AsmTransferControl16
ASM_GLOBAL ASM_PFX(AsmFixAddress16)
ASM_PFX(AsmFixAddress16):
.long 0
pushq $0x28 # CS
pushq %rax
lret
ASM_GLOBAL ASM_PFX(AsmTransferControl16)
ASM_PFX(AsmTransferControl16):
.byte 0xb8,0x30,0 # mov ax, 30h as selector
movw %ax,%ds
movw %ax,%es
movw %ax,%fs
movw %ax,%gs
movw %ax,%ss
movq %cr0, %rax # Get control register 0
.byte 0x66
.byte 0x83,0xe0,0xfe # and eax, 0fffffffeh ; Clear PE bit (bit #0)
.byte 0xf,0x22,0xc0 # mov cr0, eax ; Activate real mode
.byte 0xea # jmp far AsmJmpAddr32
ASM_GLOBAL ASM_PFX(AsmJmpAddr32)
ASM_PFX(AsmJmpAddr32):
.long 0
ASM_GLOBAL ASM_PFX(PageFaultHandlerHook)
ASM_PFX(PageFaultHandlerHook):
pushq %rax # save all volatile registers
pushq %rcx
pushq %rdx
pushq %r8
pushq %r9
pushq %r10
pushq %r11
# save volatile fp registers
addq $-0x68, %rsp
stmxcsr 0x60(%rsp)
movdqa %xmm0, 0x0(%rsp)
movdqa %xmm1, 0x10(%rsp)
movdqa %xmm2, 0x20(%rsp)
movdqa %xmm3, 0x30(%rsp)
movdqa %xmm4, 0x40(%rsp)
movdqa %xmm5, 0x50(%rsp)
addq $-0x20, %rsp
call ASM_PFX(PageFaultHandler)
addq $0x20, %rsp
# load volatile fp registers
ldmxcsr 0x60(%rsp)
movdqa 0x0(%rsp), %xmm0
movdqa 0x10(%rsp), %xmm1
movdqa 0x20(%rsp), %xmm2
movdqa 0x30(%rsp), %xmm3
movdqa 0x40(%rsp), %xmm4
movdqa 0x50(%rsp), %xmm5
addq $0x68, %rsp
testb %al, %al
popq %r11
popq %r10
popq %r9
popq %r8
popq %rdx
popq %rcx
popq %rax # restore all volatile registers
jnz L1
jmpq *ASM_PFX(mOriginalHandler)(%rip)
L1:
addq $0x08, %rsp # skip error code for PF
iretq

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@@ -1,135 +0,0 @@
;; @file
; This is the assembly code for transferring to control to OS S3 waking vector
; for X64 platform
;
; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;;
EXTERN mOriginalHandler:QWORD
EXTERN PageFaultHandler:PROC
.code
PUBLIC AsmFixAddress16
PUBLIC AsmJmpAddr32
AsmTransferControl PROC
; rcx S3WakingVector :DWORD
; rdx AcpiLowMemoryBase :DWORD
lea eax, @F
mov r8, 2800000000h
or rax, r8
push rax
shrd ebx, ecx, 20
and ecx, 0fh
mov bx, cx
mov [@jmp_addr], ebx
retf
@@:
DB 0b8h, 30h, 0 ; mov ax, 30h as selector
mov ds, eax
mov es, eax
mov fs, eax
mov gs, eax
mov ss, eax
mov rax, cr0
mov rbx, cr4
DB 66h
and eax, ((NOT 080000001h) AND 0ffffffffh)
and bl, NOT (1 SHL 5)
mov cr0, rax
DB 66h
mov ecx, 0c0000080h
rdmsr
and ah, NOT 1
wrmsr
mov cr4, rbx
DB 0eah ; jmp far @jmp_addr
@jmp_addr DD ?
AsmTransferControl ENDP
AsmTransferControl32 PROC
; S3WakingVector :DWORD
; AcpiLowMemoryBase :DWORD
push rbp
mov ebp, esp
DB 8dh, 05h ; lea eax, AsmTransferControl16
AsmFixAddress16 DD ?
push 28h ; CS
push rax
retf
AsmTransferControl32 ENDP
AsmTransferControl16 PROC
DB 0b8h, 30h, 0 ; mov ax, 30h as selector
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
mov rax, cr0 ; Get control register 0
DB 66h
DB 83h, 0e0h, 0feh ; and eax, 0fffffffeh ; Clear PE bit (bit #0)
DB 0fh, 22h, 0c0h ; mov cr0, eax ; Activate real mode
DB 0eah ; jmp far AsmJmpAddr32
AsmJmpAddr32 DD ?
AsmTransferControl16 ENDP
PageFaultHandlerHook PROC
push rax ; save all volatile registers
push rcx
push rdx
push r8
push r9
push r10
push r11
; save volatile fp registers
add rsp, -68h
stmxcsr [rsp + 60h]
movdqa [rsp + 0h], xmm0
movdqa [rsp + 10h], xmm1
movdqa [rsp + 20h], xmm2
movdqa [rsp + 30h], xmm3
movdqa [rsp + 40h], xmm4
movdqa [rsp + 50h], xmm5
add rsp, -20h
call PageFaultHandler
add rsp, 20h
; load volatile fp registers
ldmxcsr [rsp + 60h]
movdqa xmm0, [rsp + 0h]
movdqa xmm1, [rsp + 10h]
movdqa xmm2, [rsp + 20h]
movdqa xmm3, [rsp + 30h]
movdqa xmm4, [rsp + 40h]
movdqa xmm5, [rsp + 50h]
add rsp, 68h
test al, al
pop r11
pop r10
pop r9
pop r8
pop rdx
pop rcx
pop rax ; restore all volatile registers
jnz @F
jmp mOriginalHandler
@@:
add rsp, 08h ; skip error code for PF
iretq
PageFaultHandlerHook ENDP
END