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UefiPayloadPkg: Fix ECC reported issues

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V2: Fix more header files on #ifdef variable

ECC reported some issues on UefiPayloadPkg, this patch fixed
most of them except several files including ElfLib\Elf32.h,
coreboot.h, CbParseLib.c, etc.
It also removed unused functions in ResetSystemLib and Hob.c.

Signed-off-by: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
This commit is contained in:
Guo Dong
2021-10-15 12:10:11 -07:00
committed by mergify[bot]
parent 91a978ce7e
commit 6ef5797447
25 changed files with 98 additions and 99 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridge.h
View File

@@ -8,8 +8,8 @@
**/
#ifndef _PCI_HOST_BRIDGE_H
#define _PCI_HOST_BRIDGE_H
#ifndef PCI_HOST_BRIDGE_H_
#define PCI_HOST_BRIDGE_H_
#include <UniversalPayload/PciRootBridges.h>

4
UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
View File

@@ -210,8 +210,8 @@ PciHostBridgeGetRootBridges (
Free the root bridge instances array returned from
PciHostBridgeGetRootBridges().
@param The root bridge instances array.
@param The count of the array.
@param Bridges The root bridge instances array.
@param Count The count of the array.
**/
VOID
EFIAPI

15
UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
View File

@@ -205,7 +205,7 @@ PcatPciRootBridgeParseBars (
//
// IO Bar
//
if (Command & EFI_PCI_COMMAND_IO_SPACE) {
if ((Command & EFI_PCI_COMMAND_IO_SPACE) != 0) {
Mask = 0xfffffffc;
Base = OriginalValue & Mask;
Length = ((~(Value & Mask)) & Mask) + 0x04;
@@ -227,7 +227,7 @@ PcatPciRootBridgeParseBars (
//
// Mem Bar
//
if (Command & EFI_PCI_COMMAND_MEMORY_SPACE) {
if ((Command & EFI_PCI_COMMAND_MEMORY_SPACE) != 0) {
Mask = 0xfffffff0;
Base = OriginalValue & Mask;
@@ -306,9 +306,14 @@ ScanForRootBridges (
UINT64 Base;
UINT64 Limit;
UINT64 Value;
PCI_ROOT_BRIDGE_APERTURE Io, Mem, MemAbove4G, PMem, PMemAbove4G, *MemAperture;
PCI_ROOT_BRIDGE *RootBridges;
UINTN BarOffsetEnd;
PCI_ROOT_BRIDGE_APERTURE Io;
PCI_ROOT_BRIDGE_APERTURE Mem;
PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
PCI_ROOT_BRIDGE_APERTURE PMem;
PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
PCI_ROOT_BRIDGE_APERTURE *MemAperture;
PCI_ROOT_BRIDGE *RootBridges;
UINTN BarOffsetEnd;
*NumberOfRootBridges = 0;