sravan/system76-edk2
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Added a library for the default exception handler and started to add a dissasembler. Cleaned up some issues with BlockIo in BeagleBoard and add some extra info on Ebl devices command to show if a blk device has a file system on it.

Browse Source 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9830 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
andrewfish
2010-01-27 02:47:47 +00:00
parent 3b66da9498
commit 6f72e28d04
22 changed files with 1328 additions and 217 deletions
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1
ArmPkg/Drivers/CpuDxe/CpuDxe.c
View File

@@ -53,7 +53,6 @@ CpuFlushCpuDataCache (
IN EFI_CPU_FLUSH_TYPE FlushType
)
{
DEBUG ((EFI_D_ERROR, "CpuFlushCpuDataCache (%lx, %lx, %x)\n", Start, Length, FlushType));
switch (FlushType) {
case EfiCpuFlushTypeWriteBack:

1
ArmPkg/Drivers/CpuDxe/CpuDxe.h
View File

@@ -27,6 +27,7 @@
#include <Library/PeCoffGetEntryPointLib.h>
#include <Library/UefiLib.h>
#include <Library/CpuLib.h>
#include <Library/DefaultExceptionHandlerLib.h>
#include <Guid/DebugImageInfoTable.h>
#include <Protocol/Cpu.h>

2
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
View File

@@ -41,6 +41,7 @@
# ExceptionSupport.ARMv6.S | GCC
Mmu.c
[Packages]
ArmPkg/ArmPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
@@ -55,6 +56,7 @@
PeCoffGetEntryPointLib
UefiLib
CpuLib
DefaultExceptioHandlerLib
[Protocols]
gEfiCpuArchProtocolGuid

172
ArmPkg/Drivers/CpuDxe/Exception.c
View File

@@ -14,7 +14,6 @@
#include "CpuDxe.h"
EFI_DEBUG_IMAGE_INFO_TABLE_HEADER *gDebugImageTableHeader = NULL;
VOID
ExceptionHandlersStart (
@@ -123,125 +122,6 @@ RegisterDebuggerInterruptHandler (
CHAR8 *
GetImageName (
IN UINT32 FaultAddress,
OUT UINT32 *ImageBase,
OUT UINT32 *PeCoffSizeOfHeaders
)
{
EFI_DEBUG_IMAGE_INFO *DebugTable;
UINTN Entry;
CHAR8 *Address;
DebugTable = gDebugImageTableHeader->EfiDebugImageInfoTable;
if (DebugTable == NULL) {
return NULL;
}
Address = (CHAR8 *)(UINTN)FaultAddress;
for (Entry = 0; Entry < gDebugImageTableHeader->TableSize; Entry++, DebugTable++) {
if (DebugTable->NormalImage != NULL) {
if ((DebugTable->NormalImage->ImageInfoType == EFI_DEBUG_IMAGE_INFO_TYPE_NORMAL) &&
(DebugTable->NormalImage->LoadedImageProtocolInstance != NULL)) {
if ((Address >= (CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase) &&
(Address <= ((CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase + DebugTable->NormalImage->LoadedImageProtocolInstance->ImageSize))) {
*ImageBase = (UINT32)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase;
*PeCoffSizeOfHeaders = PeCoffGetSizeOfHeaders ((VOID *)(UINTN)*ImageBase);
return PeCoffLoaderGetPdbPointer (DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase);
}
}
}
}
return NULL;
}
typedef struct {
UINT32 Bit;
CHAR8 Char;
} CPSR_CHAR;
VOID
CpsrString (
IN UINT32 Cpsr,
OUT CHAR8 *ReturnStr
)
{
UINTN Index;
CHAR8 *Str = ReturnStr;
CHAR8 *ModeStr;
CPSR_CHAR CpsrChar[] = {
{ 31, 'n' },
{ 30, 'z' },
{ 29, 'c' },
{ 28, 'v' },
{ 9, 'e' },
{ 8, 'a' },
{ 7, 'i' },
{ 6, 'f' },
{ 5, 't' },
{ 0, '?' }
};
for (Index = 0; CpsrChar[Index].Bit != 0; Index++, Str++) {
*Str = CpsrChar[Index].Char;
if ((Cpsr & (1 << CpsrChar[Index].Bit)) != 0) {
// Concert to upper case if bit is set
*Str &= ~0x20;
}
}
*Str++ = '_';
*Str = '\0';
switch (Cpsr & 0x1f) {
case 0x17:
ModeStr = "abt";
break;
case 0x011:
ModeStr = "fiq";
break;
case 0x12:
ModeStr = "irq";
break;
case 0x13:
ModeStr = "svc";
break;
case 0x1f:
ModeStr = "sys";
break;
case 0x1b:
ModeStr = "und";
break;
case 0x10:
ModeStr = "usr";
break;
default:
ModeStr = "???";
break;
}
AsciiStrCat (Str, ModeStr);
return;
}
CHAR8 *gExceptionTypeString[] = {
"Reset",
"Undefined Instruction",
"SWI",
"Prefetch Abort",
"Data Abort",
"Undefined",
"IRQ",
"FIQ"
};
VOID
EFIAPI
CommonCExceptionHandler (
@@ -284,52 +164,7 @@ CommonCExceptionHandler (
return;
}
//
// Code after here is the default exception handler... Dump the context
//
DEBUG ((EFI_D_ERROR, "\n%a Exception PC at 0x%08x CPSR 0x%08x ", gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR));
DEBUG_CODE_BEGIN ();
CHAR8 *Pdb;
UINT32 ImageBase;
UINT32 PeCoffSizeOfHeader;
UINT32 Offset;
CHAR8 CpsrStr[32]; // char per bit. Lower 5-bits are mode that is a 3 char string
CpsrString (SystemContext.SystemContextArm->CPSR, CpsrStr);
DEBUG ((EFI_D_ERROR, "%a\n", CpsrStr));
Pdb = GetImageName (SystemContext.SystemContextArm->PC, &ImageBase, &PeCoffSizeOfHeader);
Offset = SystemContext.SystemContextArm->PC - ImageBase;
if (Pdb != NULL) {
DEBUG ((EFI_D_ERROR, "%a\n", Pdb));
//
// A PE/COFF image loads its headers into memory so the headers are
// included in the linked addressess. ELF and Mach-O images do not
// include the headers so the first byte of the image is usually
// text (code). If you look at link maps from ELF or Mach-O images
// you need to subtact out the size of the PE/COFF header to get
// get the offset that matches the link map.
//
DEBUG ((EFI_D_ERROR, "loaded at 0x%08x (PE/COFF offset) 0x%x (ELF or Mach-O offset) 0x%x", ImageBase, Offset, Offset - PeCoffSizeOfHeader));
// If we come from an image it is safe to show the instruction. We know it should not fault
if ((SystemContext.SystemContextArm->CPSR & 0x20) == 0) {
// ARM
DEBUG ((EFI_D_ERROR, "\nFaulting Instruction 0x%08x", *(UINT32 *)(UINTN)SystemContext.SystemContextArm->PC));
} else {
// Thumb
DEBUG ((EFI_D_ERROR, "\nFaulting Instruction 0x%04x", *(UINT16 *)(UINTN)SystemContext.SystemContextArm->PC));
}
}
DEBUG_CODE_END ();
DEBUG ((EFI_D_ERROR, "\n R0 0x%08x R1 0x%08x R2 0x%08x R3 0x%08x\n", SystemContext.SystemContextArm->R0, SystemContext.SystemContextArm->R1, SystemContext.SystemContextArm->R2, SystemContext.SystemContextArm->R3));
DEBUG ((EFI_D_ERROR, " R4 0x%08x R5 0x%08x R6 0x%08x R7 0x%08x\n", SystemContext.SystemContextArm->R4, SystemContext.SystemContextArm->R5, SystemContext.SystemContextArm->R6, SystemContext.SystemContextArm->R7));
DEBUG ((EFI_D_ERROR, " R8 0x%08x R9 0x%08x R10 0x%08x R11 0x%08x\n", SystemContext.SystemContextArm->R8, SystemContext.SystemContextArm->R9, SystemContext.SystemContextArm->R10, SystemContext.SystemContextArm->R11));
DEBUG ((EFI_D_ERROR, " R12 0x%08x SP 0x%08x LR 0x%08x PC 0x%08x\n", SystemContext.SystemContextArm->R12, SystemContext.SystemContextArm->SP, SystemContext.SystemContextArm->LR, SystemContext.SystemContextArm->PC));
DEBUG ((EFI_D_ERROR, "DFSR 0x%08x DFAR 0x%08x IFSR 0x%08x IFAR 0x%08x\n\n", SystemContext.SystemContextArm->DFSR, SystemContext.SystemContextArm->DFAR, SystemContext.SystemContextArm->IFSR, SystemContext.SystemContextArm->IFAR));
ASSERT (FALSE);
DefaultExceptionHandler (ExceptionType, SystemContext);
}
@@ -346,11 +181,6 @@ InitializeExceptions (
BOOLEAN Enabled;
EFI_PHYSICAL_ADDRESS Base;
Status = EfiGetSystemConfigurationTable (&gEfiDebugImageInfoTableGuid, (VOID **)&gDebugImageTableHeader);
if (EFI_ERROR (Status)) {
gDebugImageTableHeader = NULL;
}
//
// Disable interrupts
//

36
ArmPkg/Drivers/CpuDxe/ExceptionSupport.ARMv6.asm
View File

@@ -101,6 +101,7 @@ ResetEntry
bx R1
UndefinedInstructionEntry
sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
srsfd #0x13! ; Store return state on SVC stack
cps #0x13 ; Switch to SVC for common stack
stmfd SP!,{LR} ; Store the link register for the current mode
@@ -112,6 +113,7 @@ UndefinedInstructionEntry
bx R1
SoftwareInterruptEntry
sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
srsfd #0x13! ; Store return state on SVC stack
; We are already in SVC mode
stmfd SP!,{LR} ; Store the link register for the current mode
@@ -211,15 +213,26 @@ AsmCommonExceptionEntry
str R1, [SP, #0x40] ; Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR
add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
and R1, R1, #0x1f ; Check CPSR to see if User or System Mode
cmp R1, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1df))
cmpne R1, #0x10 ;
and R3, R1, #0x1f ; Check CPSR to see if User or System Mode
cmp R3, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1df))
cmpne R3, #0x10 ;
stmeqed R2, {lr}^ ; save unbanked lr
; else
stmneed R2, {lr} ; save SVC lr
ldr R1, [SP, #0x58] ; PC is the LR pushed by srsfd
str R1, [SP, #0x3c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.PC
ldr R5, [SP, #0x58] ; PC is the LR pushed by srsfd
; Check to see if we have to adjust for Thumb entry
sub r4, r0, #1 ; if (ExceptionType == 1 || ExceptionType ==2)) {
cmp r4, #1 ; // UND & SVC have differnt LR adjust for Thumb
bhi NoAdjustNeeded
tst r1, #0x20 ; if ((CPSR & T)) == T) { // Thumb Mode on entry
addne R5, R5, #2 ; PC += 2;
NoAdjustNeeded
str R5, [SP, #0x3c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.PC
sub R1, SP, #0x60 ; We pused 0x60 bytes on the stack
str R1, [SP, #0x34] ; Store it in EFI_SYSTEM_CONTEXT_ARM.SP
@@ -228,12 +241,13 @@ AsmCommonExceptionEntry
mov R1,SP ; R1 is SystemContext
/*
VOID
EFIAPI
CommonCExceptionHandler (
IN EFI_EXCEPTION_TYPE ExceptionType, R0
IN OUT EFI_SYSTEM_CONTEXT SystemContext R1
)
VOID
EFIAPI
CommonCExceptionHandler (
IN EFI_EXCEPTION_TYPE ExceptionType, R0
IN OUT EFI_SYSTEM_CONTEXT SystemContext R1
)
*/
blx CommonCExceptionHandler ; Call exception handler

13
ArmPkg/Drivers/CpuDxe/Mmu.c
View File

@@ -848,13 +848,15 @@ CpuConvertPagesToUncachedVirtualAddress (
Status = SetMemoryAttributes (Address | VirtualMask, Length, EFI_MEMORY_UC, VirtualMask);
}
DEBUG ((DEBUG_INFO | DEBUG_LOAD, "ConvertPagesToUncachedVirtualAddress()\n Unmapped 0x%08lx Mapped 0x%08lx 0x%x bytes\n", Address, Address | VirtualMask, Length));
return Status;
}
EFI_STATUS
EFIAPI
CpuReconvertPagesPages (
CpuReconvertPages (
IN VIRTUAL_UNCACHED_PAGES_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS Address,
IN UINTN Length,
@@ -863,9 +865,10 @@ CpuReconvertPagesPages (
)
{
EFI_STATUS Status;
DEBUG ((EFI_D_ERROR, "CpuReconvertPagesPages(%lx, %x, %lx, %lx)\n", Address, Length, VirtualMask, Attributes));
ASSERT (FALSE);
//
DEBUG ((DEBUG_INFO | DEBUG_LOAD, "CpuReconvertPages(%lx, %x, %lx, %lx)\n", Address, Length, VirtualMask, Attributes));
//
// Unmap the alaised Address
//
Status = SetMemoryAttributes (Address | VirtualMask, Length, EFI_MEMORY_WP, 0);
@@ -882,7 +885,7 @@ ASSERT (FALSE);
VIRTUAL_UNCACHED_PAGES_PROTOCOL gVirtualUncachedPages = {
CpuConvertPagesToUncachedVirtualAddress,
CpuReconvertPagesPages
CpuReconvertPages
};