diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm
index a64f96bf7e..1979f6d9eb 100644
--- a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm
@@ -39,7 +39,9 @@ AsmFlushCacheLine   PROC
     ; then promote flush range to flush entire cache.
     ;
     mov     eax, 1
+    push    ebx
     cpuid
+    pop     ebx
     mov     eax, [esp + 4]
     test    edx, BIT19
     jz      @F
diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
index 7ad12aba14..7ac4af353f 100644
--- a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
@@ -45,7 +45,7 @@ AsmFlushCacheLine (
     cpuid
     test    edx, BIT19
     jz      NoClflush
-    mov     eax, [esp + 4]
+    mov     eax, dword ptr [LinearAddress]
     clflush [eax]
     jmp     Done
 NoClflush: