UefiCpuPkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
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@@ -4,7 +4,7 @@
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Local APIC library assumes local APIC is enabled. It does not
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handles cases where local APIC is disabled.
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Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@@ -82,7 +82,7 @@ SetApicMode (
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Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
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In xAPIC mode, the initial local APIC ID may be different from current APIC ID.
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In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case,
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In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case,
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the 32-bit local APIC ID is returned as initial APIC ID.
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@return 32-bit initial local APIC ID of the executing processor.
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@@ -118,7 +118,7 @@ GetApicVersion (
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/**
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Send a Fixed IPI to a specified target processor.
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This function returns after the IPI has been accepted by the target processor.
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This function returns after the IPI has been accepted by the target processor.
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@param ApicId The local APIC ID of the target processor.
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@param Vector The vector number of the interrupt being sent.
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@@ -133,7 +133,7 @@ SendFixedIpi (
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/**
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Send a Fixed IPI to all processors excluding self.
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This function returns after the IPI has been accepted by the target processors.
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This function returns after the IPI has been accepted by the target processors.
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@param Vector The vector number of the interrupt being sent.
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**/
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@@ -146,7 +146,7 @@ SendFixedIpiAllExcludingSelf (
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/**
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Send a SMI IPI to a specified target processor.
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This function returns after the IPI has been accepted by the target processor.
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This function returns after the IPI has been accepted by the target processor.
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@param ApicId Specify the local APIC ID of the target processor.
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**/
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@@ -159,7 +159,7 @@ SendSmiIpi (
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/**
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Send a SMI IPI to all processors excluding self.
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This function returns after the IPI has been accepted by the target processors.
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This function returns after the IPI has been accepted by the target processors.
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**/
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VOID
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EFIAPI
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@@ -170,7 +170,7 @@ SendSmiIpiAllExcludingSelf (
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/**
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Send an INIT IPI to a specified target processor.
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This function returns after the IPI has been accepted by the target processor.
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This function returns after the IPI has been accepted by the target processor.
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@param ApicId Specify the local APIC ID of the target processor.
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**/
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@@ -183,7 +183,7 @@ SendInitIpi (
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/**
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Send an INIT IPI to all processors excluding self.
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This function returns after the IPI has been accepted by the target processors.
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This function returns after the IPI has been accepted by the target processors.
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**/
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VOID
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EFIAPI
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@@ -194,7 +194,7 @@ SendInitIpiAllExcludingSelf (
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/**
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Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.
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This function returns after the IPI has been accepted by the target processor.
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This function returns after the IPI has been accepted by the target processor.
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if StartupRoutine >= 1M, then ASSERT.
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if StartupRoutine is not multiple of 4K, then ASSERT.
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@@ -213,7 +213,7 @@ SendInitSipiSipi (
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/**
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Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.
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This function returns after the IPI has been accepted by the target processors.
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This function returns after the IPI has been accepted by the target processors.
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if StartupRoutine >= 1M, then ASSERT.
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if StartupRoutine is not multiple of 4K, then ASSERT.
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@@ -363,27 +363,27 @@ SendApicEoi (
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);
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/**
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Get the 32-bit address that a device should use to send a Message Signaled
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Get the 32-bit address that a device should use to send a Message Signaled
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Interrupt (MSI) to the Local APIC of the currently executing processor.
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@return 32-bit address used to send an MSI to the Local APIC.
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**/
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UINT32
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EFIAPI
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EFIAPI
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GetApicMsiAddress (
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VOID
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);
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/**
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Get the 64-bit data value that a device should use to send a Message Signaled
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Get the 64-bit data value that a device should use to send a Message Signaled
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Interrupt (MSI) to the Local APIC of the currently executing processor.
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If Vector is not in range 0x10..0xFE, then ASSERT().
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If DeliveryMode is not supported, then ASSERT().
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@param Vector The 8-bit interrupt vector associated with the MSI.
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@param Vector The 8-bit interrupt vector associated with the MSI.
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Must be in the range 0x10..0xFE
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@param DeliveryMode A 3-bit value that specifies how the recept of the MSI
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@param DeliveryMode A 3-bit value that specifies how the recept of the MSI
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is handled. The only supported values are:
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0: LOCAL_APIC_DELIVERY_MODE_FIXED
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1: LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY
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@@ -391,19 +391,19 @@ GetApicMsiAddress (
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4: LOCAL_APIC_DELIVERY_MODE_NMI
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5: LOCAL_APIC_DELIVERY_MODE_INIT
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7: LOCAL_APIC_DELIVERY_MODE_EXTINT
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@param LevelTriggered TRUE specifies a level triggered interrupt.
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@param LevelTriggered TRUE specifies a level triggered interrupt.
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FALSE specifies an edge triggered interrupt.
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@param AssertionLevel Ignored if LevelTriggered is FALSE.
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TRUE specifies a level triggered interrupt that active
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TRUE specifies a level triggered interrupt that active
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when the interrupt line is asserted.
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FALSE specifies a level triggered interrupt that active
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FALSE specifies a level triggered interrupt that active
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when the interrupt line is deasserted.
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@return 64-bit data value used to send an MSI to the Local APIC.
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**/
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UINT64
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EFIAPI
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EFIAPI
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GetApicMsiValue (
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IN UINT8 Vector,
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IN UINTN DeliveryMode,
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@@ -431,6 +431,6 @@ GetProcessorLocationByApicId (
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OUT UINT32 *Core OPTIONAL,
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OUT UINT32 *Thread OPTIONAL
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);
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#endif
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