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MdeModulePkg/NvmExpressDxe: Add SecurityStorageProtocol support

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Produce this protocol for each namespace at NVMe controller.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tian Feng <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17638 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Tian Feng
2015-06-16 01:04:47 +00:00
committed by erictian
parent 9c4ae34ebb
commit 754b489b46
8 changed files with 628 additions and 42 deletions
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36
MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
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@@ -433,7 +433,7 @@ NvmExpressPassThru (
// these two cmds are special which requires their data buffer must support simultaneous access by both the
// processor and a PCI Bus Master. It's caller's responsbility to ensure this.
//
if (((Sq->Opc & (BIT0 | BIT1)) != 0) && (Sq->Opc != NVME_ADMIN_CRIOCQ_OPC) && (Sq->Opc != NVME_ADMIN_CRIOSQ_OPC)) {
if (((Sq->Opc & (BIT0 | BIT1)) != 0) && (Sq->Opc != NVME_ADMIN_CRIOCQ_CMD) && (Sq->Opc != NVME_ADMIN_CRIOSQ_CMD)) {
if ((Sq->Opc & BIT0) != 0) {
Flag = EfiPciIoOperationBusMasterRead;
} else {
@@ -567,22 +567,32 @@ NvmExpressPassThru (
}
}
//
// Check the NVMe cmd execution result
//
if (Status != EFI_TIMEOUT) {
if ((Cq->Sct == 0) && (Cq->Sc == 0)) {
Status = EFI_SUCCESS;
} else {
Status = EFI_DEVICE_ERROR;
//
// Copy the Respose Queue entry for this command to the callers response buffer
//
CopyMem(Packet->NvmeCompletion, Cq, sizeof(EFI_NVM_EXPRESS_COMPLETION));
//
// Dump every completion entry status for debugging.
//
DEBUG_CODE_BEGIN();
NvmeDumpStatus(Cq);
DEBUG_CODE_END();
}
}
if ((Private->CqHdbl[QueueType].Cqh ^= 1) == 0) {
Private->Pt[QueueType] ^= 1;
}
//
// Copy the Respose Queue entry for this command to the callers response buffer
//
CopyMem(Packet->NvmeCompletion, Cq, sizeof(EFI_NVM_EXPRESS_COMPLETION));
//
// Dump every completion entry status for debugging.
//
DEBUG_CODE_BEGIN();
NvmeDumpStatus(Cq);
DEBUG_CODE_END();
Data = ReadUnaligned32 ((UINT32*)&Private->CqHdbl[QueueType]);
PciIo->Mem.Write (
PciIo,