ArmPlatformPkg: Added initial support for the FVP Base and Foundation Models
The FVP Base Model has GICv3 support. UEFI SEC does limited configuration of GICv3 if present. This is required for Linux to use GICv3. UEFI itself uses the GICv3 in legacy mode (GICv2). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14824 6f19259b-4bc3-4df7-8a09-765794883524
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oliviermartin
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@@ -1,18 +1,19 @@
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/** @file
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*
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* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include <Library/IoLib.h>
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#include <Library/ArmGicLib.h>
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#include <Library/ArmPlatformLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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@@ -22,6 +23,12 @@
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#include <ArmPlatform.h>
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// Initialize GICv3 to expose it as a GICv2 as UEFI does not support GICv3 yet
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VOID
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InitializeGicV3 (
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VOID
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);
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/**
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Initialize the Secure peripherals and memory regions
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@@ -49,6 +56,8 @@ ArmPlatformSecInitialize (
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IN UINTN MpId
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)
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{
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UINT32 Identification;
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// If it is not the primary core then there is nothing to do
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if (!ArmPlatformIsPrimaryCore (MpId)) {
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return RETURN_SUCCESS;
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@@ -63,6 +72,14 @@ ArmPlatformSecInitialize (
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// Configure SP810 to use 1MHz clock and disable
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MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
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// Read the GIC Identification Register
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Identification = MmioRead32 (PcdGet32(PcdGicInterruptInterfaceBase) + ARM_GIC_ICCIDR);
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// Check if we are GICv3
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if (ARM_GIC_ICCIDR_GET_ARCH_VERSION(Identification) >= 0x3) {
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InitializeGicV3 ();
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}
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return RETURN_SUCCESS;
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}
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