sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

UefiCpuPkg: Simplify the implementation when separate exception stacks

Browse Source 
The API of InitializeSeparateExceptionStacks is just changed before, and
makes the struct CPU_EXCEPTION_INIT_DATA an internal definition.
Furthermore, we can even remove the struct to make core simpler.

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
This commit is contained in:
Liu, Zhiguang
2022-08-26 15:04:47 +08:00
committed by mergify[bot]
parent d1abb876f4
commit 76cf3d35e6
8 changed files with 177 additions and 387 deletions
Download Patch File Download Diff File Expand all files Collapse all files

77
UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
View File

@@ -170,84 +170,9 @@ InitializeSeparateExceptionStacks (
IN OUT UINTN *BufferSize
)
{
CPU_EXCEPTION_INIT_DATA EssData;
IA32_DESCRIPTOR Idtr;
IA32_DESCRIPTOR Gdtr;
UINTN NeedBufferSize;
UINTN StackTop;
UINT8 *NewGdtTable;
//
// X64 needs only one TSS of current task working for all exceptions
// because of its IST feature. IA32 needs one TSS for each exception
// in addition to current task. To simplify the code, we report the
// needed memory for IA32 case to cover both IA32 and X64 exception
// stack switch.
//
// Layout of memory needed for each processor:
// --------------------------------
// | Alignment | (just in case)
// --------------------------------
// | |
// | Original GDT |
// | |
// --------------------------------
// | Current task descriptor |
// --------------------------------
// | |
// | Exception task descriptors | X ExceptionNumber
// | |
// --------------------------------
// | Current task-state segment |
// --------------------------------
// | |
// | Exception task-state segment | X ExceptionNumber
// | |
// --------------------------------
//
if ((Buffer == NULL) && (BufferSize == NULL)) {
return EFI_UNSUPPORTED;
}
if (BufferSize == NULL) {
return EFI_INVALID_PARAMETER;
}
AsmReadGdtr (&Gdtr);
//
// Total needed size includes stack size, new GDT table size, TSS size.
// Add another DESCRIPTOR size for alignment requiremet.
//
NeedBufferSize = CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE +
CPU_TSS_DESC_SIZE + Gdtr.Limit + 1 +
CPU_TSS_SIZE +
sizeof (IA32_TSS_DESCRIPTOR);
if (*BufferSize < NeedBufferSize) {
*BufferSize = NeedBufferSize;
return EFI_BUFFER_TOO_SMALL;
}
if (Buffer == NULL) {
return EFI_INVALID_PARAMETER;
}
StackTop = (UINTN)Buffer + CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE;
NewGdtTable = ALIGN_POINTER (StackTop, sizeof (IA32_TSS_DESCRIPTOR));
AsmReadIdtr (&Idtr);
EssData.KnownGoodStackTop = StackTop;
EssData.KnownGoodStackSize = CPU_KNOWN_GOOD_STACK_SIZE;
EssData.StackSwitchExceptions = CPU_STACK_SWITCH_EXCEPTION_LIST;
EssData.StackSwitchExceptionNumber = CPU_STACK_SWITCH_EXCEPTION_NUMBER;
EssData.IdtTable = (VOID *)Idtr.Base;
EssData.IdtTableSize = Idtr.Limit + 1;
EssData.GdtTable = NewGdtTable;
EssData.GdtTableSize = CPU_TSS_DESC_SIZE + Gdtr.Limit + 1;
EssData.ExceptionTssDesc = NewGdtTable + Gdtr.Limit + 1;
EssData.ExceptionTssDescSize = CPU_TSS_DESC_SIZE;
EssData.ExceptionTss = NewGdtTable + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE;
EssData.ExceptionTssSize = CPU_TSS_SIZE;
return ArchSetupExceptionStack (&EssData);
return ArchSetupExceptionStack (Buffer, BufferSize);
}